1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2012 Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
4 * Copyright (C) 2012 Renesas Solutions Corp.
6 * NOTE: This driver should be converted to driver model before June 2017.
7 * Please see doc/driver-model/i2c-howto.txt for instructions.
28 static struct sh_i2c *base;
29 static u8 iccr1_cks, nf2cyc;
32 #define SH_I2C_ICCR1_ICE (1 << 7)
33 #define SH_I2C_ICCR1_RCVD (1 << 6)
34 #define SH_I2C_ICCR1_MST (1 << 5)
35 #define SH_I2C_ICCR1_TRS (1 << 4)
36 #define SH_I2C_ICCR1_MTRS \
37 (SH_I2C_ICCR1_MST | SH_I2C_ICCR1_TRS)
40 #define SH_I2C_ICCR2_BBSY (1 << 7)
41 #define SH_I2C_ICCR2_SCP (1 << 6)
42 #define SH_I2C_ICCR2_SDAO (1 << 5)
43 #define SH_I2C_ICCR2_SDAOP (1 << 4)
44 #define SH_I2C_ICCR2_SCLO (1 << 3)
45 #define SH_I2C_ICCR2_IICRST (1 << 1)
47 #define SH_I2C_ICIER_TIE (1 << 7)
48 #define SH_I2C_ICIER_TEIE (1 << 6)
49 #define SH_I2C_ICIER_RIE (1 << 5)
50 #define SH_I2C_ICIER_NAKIE (1 << 4)
51 #define SH_I2C_ICIER_STIE (1 << 3)
52 #define SH_I2C_ICIER_ACKE (1 << 2)
53 #define SH_I2C_ICIER_ACKBR (1 << 1)
54 #define SH_I2C_ICIER_ACKBT (1 << 0)
56 #define SH_I2C_ICSR_TDRE (1 << 7)
57 #define SH_I2C_ICSR_TEND (1 << 6)
58 #define SH_I2C_ICSR_RDRF (1 << 5)
59 #define SH_I2C_ICSR_NACKF (1 << 4)
60 #define SH_I2C_ICSR_STOP (1 << 3)
61 #define SH_I2C_ICSR_ALOVE (1 << 2)
62 #define SH_I2C_ICSR_AAS (1 << 1)
63 #define SH_I2C_ICSR_ADZ (1 << 0)
67 static void sh_i2c_send_stop(struct sh_i2c *base)
69 clrbits_8(&base->iccr2, SH_I2C_ICCR2_BBSY | SH_I2C_ICCR2_SCP);
72 static int check_icsr_bits(struct sh_i2c *base, u8 bits)
76 for (i = 0; i < IRQ_WAIT; i++) {
77 if (bits & readb(&base->icsr))
85 static int check_stop(struct sh_i2c *base)
87 int ret = check_icsr_bits(base, SH_I2C_ICSR_STOP);
88 clrbits_8(&base->icsr, SH_I2C_ICSR_STOP);
93 static int check_tend(struct sh_i2c *base, int stop)
95 int ret = check_icsr_bits(base, SH_I2C_ICSR_TEND);
98 clrbits_8(&base->icsr, SH_I2C_ICSR_STOP);
99 sh_i2c_send_stop(base);
102 clrbits_8(&base->icsr, SH_I2C_ICSR_TEND);
106 static int check_tdre(struct sh_i2c *base)
108 return check_icsr_bits(base, SH_I2C_ICSR_TDRE);
111 static int check_rdrf(struct sh_i2c *base)
113 return check_icsr_bits(base, SH_I2C_ICSR_RDRF);
116 static int check_bbsy(struct sh_i2c *base)
120 for (i = 0 ; i < IRQ_WAIT ; i++) {
121 if (!(SH_I2C_ICCR2_BBSY & readb(&base->iccr2)))
128 static int check_ackbr(struct sh_i2c *base)
132 for (i = 0 ; i < IRQ_WAIT ; i++) {
133 if (!(SH_I2C_ICIER_ACKBR & readb(&base->icier)))
141 static void sh_i2c_reset(struct sh_i2c *base)
143 setbits_8(&base->iccr2, SH_I2C_ICCR2_IICRST);
147 clrbits_8(&base->iccr2, SH_I2C_ICCR2_IICRST);
150 static int i2c_set_addr(struct sh_i2c *base, u8 id, u8 reg)
152 if (check_bbsy(base)) {
153 puts("i2c bus busy\n");
157 setbits_8(&base->iccr1, SH_I2C_ICCR1_MTRS);
158 clrsetbits_8(&base->iccr2, SH_I2C_ICCR2_SCP, SH_I2C_ICCR2_BBSY);
160 writeb((id << 1), &base->icdrt);
162 if (check_tend(base, 0)) {
163 puts("TEND check fail...\n");
167 if (check_ackbr(base)) {
169 sh_i2c_send_stop(base);
173 writeb(reg, &base->icdrt);
175 if (check_tdre(base)) {
176 puts("TDRE check fail...\n");
180 if (check_tend(base, 0)) {
181 puts("TEND check fail...\n");
192 i2c_raw_write(struct sh_i2c *base, u8 id, u8 reg, u8 *val, int size)
196 if (i2c_set_addr(base, id, reg)) {
197 puts("Fail set slave address\n");
201 for (i = 0; i < size; i++) {
202 writeb(val[i], &base->icdrt);
211 clrbits_8(&base->iccr1, SH_I2C_ICCR1_MTRS);
212 clrbits_8(&base->icsr, SH_I2C_ICSR_TDRE);
218 static u8 i2c_raw_read(struct sh_i2c *base, u8 id, u8 reg)
222 if (i2c_set_addr(base, id, reg)) {
223 puts("Fail set slave address\n");
227 clrsetbits_8(&base->iccr2, SH_I2C_ICCR2_SCP, SH_I2C_ICCR2_BBSY);
228 writeb((id << 1) | 1, &base->icdrt);
230 if (check_tend(base, 0))
231 puts("TDRE check fail...\n");
233 clrsetbits_8(&base->iccr1, SH_I2C_ICCR1_TRS, SH_I2C_ICCR1_MST);
234 clrbits_8(&base->icsr, SH_I2C_ICSR_TDRE);
235 setbits_8(&base->icier, SH_I2C_ICIER_ACKBT);
236 setbits_8(&base->iccr1, SH_I2C_ICCR1_RCVD);
238 /* read data (dummy) */
239 ret = readb(&base->icdrr);
241 if (check_rdrf(base)) {
242 puts("check RDRF error\n");
246 clrbits_8(&base->icsr, SH_I2C_ICSR_STOP);
249 sh_i2c_send_stop(base);
251 if (check_stop(base)) {
252 puts("check STOP error\n");
256 clrbits_8(&base->iccr1, SH_I2C_ICCR1_MTRS);
257 clrbits_8(&base->icsr, SH_I2C_ICSR_TDRE);
260 ret = readb(&base->icdrr);
263 clrbits_8(&base->iccr1, SH_I2C_ICCR1_RCVD);
268 #ifdef CONFIG_I2C_MULTI_BUS
269 static unsigned int current_bus;
272 * i2c_set_bus_num - change active I2C bus
273 * @bus: bus index, zero based
274 * @returns: 0 on success, non-0 on failure
276 int i2c_set_bus_num(unsigned int bus)
280 base = (void *)CONFIG_SH_I2C_BASE0;
283 base = (void *)CONFIG_SH_I2C_BASE1;
286 printf("Bad bus: %d\n", bus);
296 * i2c_get_bus_num - returns index of active I2C bus
298 unsigned int i2c_get_bus_num(void)
304 void i2c_init(int speed, int slaveaddr)
306 #ifdef CONFIG_I2C_MULTI_BUS
309 base = (struct sh_i2c *)CONFIG_SH_I2C_BASE0;
321 /* ICE enable and set clock */
322 writeb(SH_I2C_ICCR1_ICE | iccr1_cks, &base->iccr1);
323 writeb(nf2cyc, &base->nf2cyc);
327 * i2c_read: - Read multiple bytes from an i2c device
329 * The higher level routines take into account that this function is only
330 * called with len < page length of the device (see configuration file)
332 * @chip: address of the chip which is to be read
333 * @addr: i2c data address within the chip
334 * @alen: length of the i2c data address (1..2 bytes)
335 * @buffer: where to write the data
336 * @len: how much byte do we want to read
337 * @return: 0 in case of success
339 int i2c_read(u8 chip, u32 addr, int alen, u8 *buffer, int len)
342 for (i = 0; i < len; i++)
343 buffer[i] = i2c_raw_read(base, chip, addr + i);
349 * i2c_write: - Write multiple bytes to an i2c device
351 * The higher level routines take into account that this function is only
352 * called with len < page length of the device (see configuration file)
354 * @chip: address of the chip which is to be written
355 * @addr: i2c data address within the chip
356 * @alen: length of the i2c data address (1..2 bytes)
357 * @buffer: where to find the data to be written
358 * @len: how much byte do we want to read
359 * @return: 0 in case of success
361 int i2c_write(u8 chip, u32 addr, int alen, u8 *buffer, int len)
363 return i2c_raw_write(base, chip, addr, buffer, len);
367 * i2c_probe: - Test if a chip answers for a given i2c address
369 * @chip: address of the chip which is searched for
370 * @return: 0 if a chip was found, -1 otherwhise
372 int i2c_probe(u8 chip)
375 return i2c_read(chip, 0, 0, &byte, 1);