2 * Copyright (C) 2012 Samsung Electronics
4 * SPDX-License-Identifier: GPL-2.0+
18 struct exynos5_hsi2c {
50 struct s3c24x0_i2c_bus {
51 bool active; /* port is active and available */
52 int node; /* device tree node */
53 int bus_num; /* i2c bus number */
54 struct s3c24x0_i2c *regs;
55 struct exynos5_hsi2c *hsregs;
56 int is_highspeed; /* High speed type, rather than I2C */
57 unsigned clock_frequency;
69 #define I2C_NOK_LA 3 /* Lost arbitration */
70 #define I2C_NOK_TOUT 4 /* time out */
72 /* S3C I2C Controller bits */
73 #define I2CSTAT_BSY 0x20 /* Busy bit */
74 #define I2CSTAT_NACK 0x01 /* Nack bit */
75 #define I2CCON_ACKGEN 0x80 /* Acknowledge generation */
76 #define I2CCON_IRPND 0x10 /* Interrupt pending bit */
77 #define I2C_MODE_MT 0xC0 /* Master Transmit Mode */
78 #define I2C_MODE_MR 0x80 /* Master Receive Mode */
79 #define I2C_START_STOP 0x20 /* START / STOP */
80 #define I2C_TXRX_ENA 0x10 /* I2C Tx/Rx enable */
82 #define I2C_TIMEOUT_MS 10 /* 10 ms */
84 #endif /* _S3C24X0_I2C_H */