4 * Copyright (c) 2004 Texas Instruments
6 * This package is free software; you can redistribute it and/or
7 * modify it under the terms of the license found in the file
8 * named COPYING that should have accompanied this file.
10 * THIS PACKAGE IS PROVIDED ``AS IS'' AND WITHOUT ANY EXPRESS OR
11 * IMPLIED WARRANTIES, INCLUDING, WITHOUT LIMITATION, THE IMPLIED
12 * WARRANTIES OF MERCHANTIBILITY AND FITNESS FOR A PARTICULAR PURPOSE.
14 * Author: Jian Zhang jzhang@ti.com, Texas Instruments
16 * Copyright (c) 2003 Wolfgang Denk, wd@denx.de
17 * Rewritten to fit into the current U-Boot framework
19 * Adapted for OMAP2420 I2C, r-woodruff2@ti.com
25 #include <asm/arch/i2c.h>
28 static void wait_for_bb (void);
29 static u16 wait_for_pin (void);
30 static void flush_fifo(void);
32 void i2c_init (int speed, int slaveadd)
36 writew(0x2, I2C_SYSC); /* for ES2 after soft reset */
38 writew(0x0, I2C_SYSC); /* will probably self clear but */
40 if (readw (I2C_CON) & I2C_CON_EN) {
45 /* 12MHz I2C module clock */
47 speed = speed/1000; /* 100 or 400 */
48 scl = ((12000/(speed*2)) - 7); /* use 7 when PSC = 0 */
49 writew (scl, I2C_SCLL);
50 writew (scl, I2C_SCLH);
52 writew (slaveadd, I2C_OA);
53 writew (I2C_CON_EN, I2C_CON);
55 /* have to enable intrrupts or OMAP i2c module doesn't work */
56 writew (I2C_IE_XRDY_IE | I2C_IE_RRDY_IE | I2C_IE_ARDY_IE |
57 I2C_IE_NACK_IE | I2C_IE_AL_IE, I2C_IE);
60 writew (0xFFFF, I2C_STAT);
64 static int i2c_read_byte (u8 devaddr, u8 regoffset, u8 * value)
69 /* wait until bus not busy */
74 /* set slave address */
75 writew (devaddr, I2C_SA);
76 /* no stop bit needed here */
77 writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX, I2C_CON);
79 status = wait_for_pin ();
81 if (status & I2C_STAT_XRDY) {
82 /* Important: have to use byte access */
83 writeb (regoffset, I2C_DATA);
85 if (readw (I2C_STAT) & I2C_STAT_NACK) {
93 /* free bus, otherwise we can't use a combined transction */
95 while (readw (I2C_STAT) || (readw (I2C_CON) & I2C_CON_MST)) {
97 /* Have to clear pending interrupt to clear I2C_STAT */
98 writew (0xFFFF, I2C_STAT);
102 /* set slave address */
103 writew (devaddr, I2C_SA);
104 /* read one byte from slave */
106 /* need stop bit here */
107 writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP,
110 status = wait_for_pin ();
111 if (status & I2C_STAT_RRDY) {
112 *value = readw (I2C_DATA);
119 writew (I2C_CON_EN, I2C_CON);
120 while (readw (I2C_STAT)
121 || (readw (I2C_CON) & I2C_CON_MST)) {
123 writew (0xFFFF, I2C_STAT);
128 writew (0xFFFF, I2C_STAT);
133 static int i2c_write_byte (u8 devaddr, u8 regoffset, u8 value)
138 /* wait until bus not busy */
143 /* set slave address */
144 writew (devaddr, I2C_SA);
145 /* stop bit needed here */
146 writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_TRX |
147 I2C_CON_STP, I2C_CON);
149 /* wait until state change */
150 status = wait_for_pin ();
152 if (status & I2C_STAT_XRDY) {
153 /* send out two bytes */
154 writew ((value << 8) + regoffset, I2C_DATA);
155 /* must have enough delay to allow BB bit to go low */
157 if (readw (I2C_STAT) & I2C_STAT_NACK) {
167 writew (I2C_CON_EN, I2C_CON);
168 while ((stat = readw (I2C_STAT)) || (readw (I2C_CON) & I2C_CON_MST)) {
170 /* have to read to clear intrrupt */
171 writew (0xFFFF, I2C_STAT);
172 if(--eout == 0) /* better leave with error than hang */
177 writew (0xFFFF, I2C_STAT);
182 static void flush_fifo(void)
185 /* note: if you try and read data when its not there or ready
186 * you get a bus error
189 stat = readw(I2C_STAT);
190 if(stat == I2C_STAT_RRDY){
192 writew(I2C_STAT_RRDY,I2C_STAT);
199 int i2c_probe (uchar chip)
201 int res = 1; /* default = fail */
203 if (chip == readw (I2C_OA)) {
207 /* wait until bus not busy */
210 /* try to read one byte */
212 /* set slave address */
213 writew (chip, I2C_SA);
214 /* stop bit needed here */
215 writew (I2C_CON_EN | I2C_CON_MST | I2C_CON_STT | I2C_CON_STP, I2C_CON);
216 /* enough delay for the NACK bit set */
219 if (!(readw (I2C_STAT) & I2C_STAT_NACK)) {
220 res = 0; /* success case */
222 writew(0xFFFF, I2C_STAT);
224 writew(0xFFFF, I2C_STAT); /* failue, clear sources*/
225 writew (readw (I2C_CON) | I2C_CON_STP, I2C_CON); /* finish up xfer */
230 writew (0, I2C_CNT); /* don't allow any more data in...we don't want it.*/
231 writew(0xFFFF, I2C_STAT);
235 int i2c_read (uchar chip, uint addr, int alen, uchar * buffer, int len)
240 printf ("I2C read: addr len %d not supported\n", alen);
244 if (addr + len > 256) {
245 printf ("I2C read: address out of range\n");
249 for (i = 0; i < len; i++) {
250 if (i2c_read_byte (chip, addr + i, &buffer[i])) {
251 printf ("I2C read: I/O error\n");
252 i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
260 int i2c_write (uchar chip, uint addr, int alen, uchar * buffer, int len)
265 printf ("I2C read: addr len %d not supported\n", alen);
269 if (addr + len > 256) {
270 printf ("I2C read: address out of range\n");
274 for (i = 0; i < len; i++) {
275 if (i2c_write_byte (chip, addr + i, buffer[i])) {
276 printf ("I2C read: I/O error\n");
277 i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
285 static void wait_for_bb (void)
290 writew(0xFFFF, I2C_STAT); /* clear current interruts...*/
291 while ((stat = readw (I2C_STAT) & I2C_STAT_BB) && timeout--) {
292 writew (stat, I2C_STAT);
297 printf ("timed out in wait_for_bb: I2C_STAT=%x\n",
300 writew(0xFFFF, I2C_STAT); /* clear delayed stuff*/
303 static u16 wait_for_pin (void)
310 status = readw (I2C_STAT);
312 (I2C_STAT_ROVR | I2C_STAT_XUDF | I2C_STAT_XRDY |
313 I2C_STAT_RRDY | I2C_STAT_ARDY | I2C_STAT_NACK |
314 I2C_STAT_AL)) && timeout--);
317 printf ("timed out in wait_for_pin: I2C_STAT=%x\n",
319 writew(0xFFFF, I2C_STAT);