drivers/i2c/lpc32xx_i2c.c

   1 /*
   2  * LPC32xx I2C interface driver
   3  *
   4  * (C) Copyright 2014-2015  DENX Software Engineering GmbH
   5  * Written-by: Albert ARIBAUD - 3ADEV <albert.aribaud@3adev.fr>
   6  *
   7  * SPDX-License-Identifier:     GPL-2.0+
   8  *
   9  * NOTE: This driver should be converted to driver model before June 2017.
  10  * Please see doc/driver-model/i2c-howto.txt for instructions.
  11  */
  12
  13 #include <common.h>
  14 #include <asm/io.h>
  15 #include <i2c.h>
  16 #include <linux/errno.h>
  17 #include <asm/arch/clk.h>
  18
  19 /*
  20  * Provide default speed and slave if target did not
  21  */
  22
  23 #if !defined(CONFIG_SYS_I2C_LPC32XX_SPEED)
  24 #define CONFIG_SYS_I2C_LPC32XX_SPEED 350000
  25 #endif
  26
  27 #if !defined(CONFIG_SYS_I2C_LPC32XX_SLAVE)
  28 #define CONFIG_SYS_I2C_LPC32XX_SLAVE 0
  29 #endif
  30
  31 /* i2c register set */
  32 struct lpc32xx_i2c_registers {
  33         union {
  34                 u32 rx;
  35                 u32 tx;
  36         };
  37         u32 stat;
  38         u32 ctrl;
  39         u32 clk_hi;
  40         u32 clk_lo;
  41         u32 adr;
  42         u32 rxfl;
  43         u32 txfl;
  44         u32 rxb;
  45         u32 txb;
  46         u32 stx;
  47         u32 stxfl;
  48 };
  49
  50 /* TX register fields */
  51 #define LPC32XX_I2C_TX_START            0x00000100
  52 #define LPC32XX_I2C_TX_STOP             0x00000200
  53
  54 /* Control register values */
  55 #define LPC32XX_I2C_SOFT_RESET          0x00000100
  56
  57 /* Status register values */
  58 #define LPC32XX_I2C_STAT_TFF            0x00000400
  59 #define LPC32XX_I2C_STAT_RFE            0x00000200
  60 #define LPC32XX_I2C_STAT_DRMI           0x00000008
  61 #define LPC32XX_I2C_STAT_NAI            0x00000004
  62 #define LPC32XX_I2C_STAT_TDI            0x00000001
  63
  64 static struct lpc32xx_i2c_registers *lpc32xx_i2c[] = {
  65         (struct lpc32xx_i2c_registers *)I2C1_BASE,
  66         (struct lpc32xx_i2c_registers *)I2C2_BASE,
  67         (struct lpc32xx_i2c_registers *)(USB_BASE + 0x300)
  68 };
  69
  70 /* Set I2C bus speed */
  71 static unsigned int lpc32xx_i2c_set_bus_speed(struct i2c_adapter *adap,
  72                         unsigned int speed)
  73 {
  74         int half_period;
  75
  76         if (speed == 0)
  77                 return -EINVAL;
  78
  79         /* OTG I2C clock source and CLK registers are different */
  80         if (adap->hwadapnr == 2) {
  81                 half_period = (get_periph_clk_rate() / speed) / 2;
  82                 if (half_period > 0xFF)
  83                         return -EINVAL;
  84         } else {
  85                 half_period = (get_hclk_clk_rate() / speed) / 2;
  86                 if (half_period > 0x3FF)
  87                         return -EINVAL;
  88         }
  89
  90         writel(half_period, &lpc32xx_i2c[adap->hwadapnr]->clk_hi);
  91         writel(half_period, &lpc32xx_i2c[adap->hwadapnr]->clk_lo);
  92         return 0;
  93 }
  94
  95 /* I2C init called by cmd_i2c when doing 'i2c reset'. */
  96 static void _i2c_init(struct i2c_adapter *adap,
  97         int requested_speed, int slaveadd)
  98 {
  99         struct lpc32xx_i2c_registers *i2c = lpc32xx_i2c[adap->hwadapnr];
 100
 101         /* soft reset (auto-clears) */
 102         writel(LPC32XX_I2C_SOFT_RESET, &i2c->ctrl);
 103         /* set HI and LO periods for half of the default speed */
 104         lpc32xx_i2c_set_bus_speed(adap, requested_speed);
 105 }
 106
 107 /* I2C probe called by cmd_i2c when doing 'i2c probe'. */
 108 static int lpc32xx_i2c_probe(struct i2c_adapter *adap, u8 dev)
 109 {
 110         struct lpc32xx_i2c_registers *i2c = lpc32xx_i2c[adap->hwadapnr];
 111         int stat;
 112
 113         /* Soft-reset the controller */
 114         writel(LPC32XX_I2C_SOFT_RESET, &i2c->ctrl);
 115         while (readl(&i2c->ctrl) & LPC32XX_I2C_SOFT_RESET)
 116                 ;
 117         /* Addre slave for write with start before and stop after */
 118         writel((dev<<1) | LPC32XX_I2C_TX_START | LPC32XX_I2C_TX_STOP,
 119                &i2c->tx);
 120         /* wait for end of transation */
 121         while (!((stat = readl(&i2c->stat)) & LPC32XX_I2C_STAT_TDI))
 122                 ;
 123         /* was there no acknowledge? */
 124         return (stat & LPC32XX_I2C_STAT_NAI) ? -1 : 0;
 125 }
 126
 127 /*
 128  * I2C read called by cmd_i2c when doing 'i2c read' and by cmd_eeprom.c
 129  * Begin write, send address byte(s), begin read, receive data bytes, end.
 130  */
 131 static int lpc32xx_i2c_read(struct i2c_adapter *adap, u8 dev, uint addr,
 132                          int alen, u8 *data, int length)
 133 {
 134         struct lpc32xx_i2c_registers *i2c = lpc32xx_i2c[adap->hwadapnr];
 135         int stat, wlen;
 136
 137         /* Soft-reset the controller */
 138         writel(LPC32XX_I2C_SOFT_RESET, &i2c->ctrl);
 139         while (readl(&i2c->ctrl) & LPC32XX_I2C_SOFT_RESET)
 140                 ;
 141         /* do we need to write an address at all? */
 142         if (alen) {
 143                 /* Address slave in write mode */
 144                 writel((dev<<1) | LPC32XX_I2C_TX_START, &i2c->tx);
 145                 /* write address bytes */
 146                 while (alen--) {
 147                         /* compute address byte + stop for the last one */
 148                         int a = (addr >> (8 * alen)) & 0xff;
 149                         if (!alen)
 150                                 a |= LPC32XX_I2C_TX_STOP;
 151                         /* Send address byte */
 152                         writel(a, &i2c->tx);
 153                 }
 154                 /* wait for end of transation */
 155                 while (!((stat = readl(&i2c->stat)) & LPC32XX_I2C_STAT_TDI))
 156                         ;
 157                 /* clear end-of-transaction flag */
 158                 writel(1, &i2c->stat);
 159         }
 160         /* do we have to read data at all? */
 161         if (length) {
 162                 /* Address slave in read mode */
 163                 writel(1 | (dev<<1) | LPC32XX_I2C_TX_START, &i2c->tx);
 164                 wlen = length;
 165                 /* get data */
 166                 while (length | wlen) {
 167                         /* read status for TFF and RFE */
 168                         stat = readl(&i2c->stat);
 169                         /* must we, can we write a trigger byte? */
 170                         if ((wlen > 0)
 171                            & (!(stat & LPC32XX_I2C_STAT_TFF))) {
 172                                 wlen--;
 173                                 /* write trigger byte + stop if last */
 174                                 writel(wlen ? 0 :
 175                                 LPC32XX_I2C_TX_STOP, &i2c->tx);
 176                         }
 177                         /* must we, can we read a data byte? */
 178                         if ((length > 0)
 179                            & (!(stat & LPC32XX_I2C_STAT_RFE))) {
 180                                 length--;
 181                                 /* read byte */
 182                                 *(data++) = readl(&i2c->rx);
 183                         }
 184                 }
 185                 /* wait for end of transation */
 186                 while (!((stat = readl(&i2c->stat)) & LPC32XX_I2C_STAT_TDI))
 187                         ;
 188                 /* clear end-of-transaction flag */
 189                 writel(1, &i2c->stat);
 190         }
 191         /* success */
 192         return 0;
 193 }
 194
 195 /*
 196  * I2C write called by cmd_i2c when doing 'i2c write' and by cmd_eeprom.c
 197  * Begin write, send address byte(s), send data bytes, end.
 198  */
 199 static int lpc32xx_i2c_write(struct i2c_adapter *adap, u8 dev, uint addr,
 200                           int alen, u8 *data, int length)
 201 {
 202         struct lpc32xx_i2c_registers *i2c = lpc32xx_i2c[adap->hwadapnr];
 203         int stat;
 204
 205         /* Soft-reset the controller */
 206         writel(LPC32XX_I2C_SOFT_RESET, &i2c->ctrl);
 207         while (readl(&i2c->ctrl) & LPC32XX_I2C_SOFT_RESET)
 208                 ;
 209         /* do we need to write anything at all? */
 210         if (alen | length)
 211                 /* Address slave in write mode */
 212                 writel((dev<<1) | LPC32XX_I2C_TX_START, &i2c->tx);
 213         else
 214                 return 0;
 215         /* write address bytes */
 216         while (alen) {
 217                 /* wait for transmit fifo not full */
 218                 stat = readl(&i2c->stat);
 219                 if (!(stat & LPC32XX_I2C_STAT_TFF)) {
 220                         alen--;
 221                         int a = (addr >> (8 * alen)) & 0xff;
 222                         if (!(alen | length))
 223                                 a |= LPC32XX_I2C_TX_STOP;
 224                         /* Send address byte */
 225                         writel(a, &i2c->tx);
 226                 }
 227         }
 228         while (length) {
 229                 /* wait for transmit fifo not full */
 230                 stat = readl(&i2c->stat);
 231                 if (!(stat & LPC32XX_I2C_STAT_TFF)) {
 232                         /* compute data byte, add stop if length==0 */
 233                         length--;
 234                         int d = *(data++);
 235                         if (!length)
 236                                 d |= LPC32XX_I2C_TX_STOP;
 237                         /* Send data byte */
 238                         writel(d, &i2c->tx);
 239                 }
 240         }
 241         /* wait for end of transation */
 242         while (!((stat = readl(&i2c->stat)) & LPC32XX_I2C_STAT_TDI))
 243                 ;
 244         /* clear end-of-transaction flag */
 245         writel(1, &i2c->stat);
 246         return 0;
 247 }
 248
 249 U_BOOT_I2C_ADAP_COMPLETE(lpc32xx_0, _i2c_init, lpc32xx_i2c_probe,
 250                          lpc32xx_i2c_read, lpc32xx_i2c_write,
 251                          lpc32xx_i2c_set_bus_speed,
 252                          CONFIG_SYS_I2C_LPC32XX_SPEED,
 253                          CONFIG_SYS_I2C_LPC32XX_SLAVE,
 254                          0)
 255
 256 U_BOOT_I2C_ADAP_COMPLETE(lpc32xx_1, _i2c_init, lpc32xx_i2c_probe,
 257                          lpc32xx_i2c_read, lpc32xx_i2c_write,
 258                          lpc32xx_i2c_set_bus_speed,
 259                          CONFIG_SYS_I2C_LPC32XX_SPEED,
 260                          CONFIG_SYS_I2C_LPC32XX_SLAVE,
 261                          1)
 262
 263 U_BOOT_I2C_ADAP_COMPLETE(lpc32xx_2, _i2c_init, NULL,
 264                          lpc32xx_i2c_read, lpc32xx_i2c_write,
 265                          lpc32xx_i2c_set_bus_speed,
 266                          100000,
 267                          0,
 268                          2)