2 * Faraday I2C Controller
4 * (C) Copyright 2010 Faraday Technology
5 * Dante Su <dantesu@faraday-tech.com>
7 * SPDX-License-Identifier: GPL-2.0+
16 #ifndef CONFIG_HARD_I2C
17 #error "fti2c010: CONFIG_HARD_I2C is not defined"
20 #ifndef CONFIG_SYS_I2C_SPEED
21 #define CONFIG_SYS_I2C_SPEED 5000
24 #ifndef CONFIG_FTI2C010_CLOCK
25 #define CONFIG_FTI2C010_CLOCK clk_get_rate("I2C")
28 #ifndef CONFIG_FTI2C010_TIMEOUT
29 #define CONFIG_FTI2C010_TIMEOUT 10 /* ms */
32 /* 7-bit dev address + 1-bit read/write */
33 #define I2C_RD(dev) ((((dev) << 1) & 0xfe) | 1)
34 #define I2C_WR(dev) (((dev) << 1) & 0xfe)
36 struct fti2c010_chip {
37 struct fti2c010_regs *regs;
42 static struct fti2c010_chip chip_list[] = {
45 .regs = (struct fti2c010_regs *)CONFIG_FTI2C010_BASE,
47 #ifdef CONFIG_I2C_MULTI_BUS
48 # ifdef CONFIG_FTI2C010_BASE1
51 .regs = (struct fti2c010_regs *)CONFIG_FTI2C010_BASE1,
54 # ifdef CONFIG_FTI2C010_BASE2
57 .regs = (struct fti2c010_regs *)CONFIG_FTI2C010_BASE2,
60 # ifdef CONFIG_FTI2C010_BASE3
63 .regs = (struct fti2c010_regs *)CONFIG_FTI2C010_BASE3,
66 #endif /* #ifdef CONFIG_I2C_MULTI_BUS */
69 static struct fti2c010_chip *curr = chip_list;
71 static int fti2c010_wait(uint32_t mask)
75 struct fti2c010_regs *regs = curr->regs;
77 for (ts = get_timer(0); get_timer(ts) < CONFIG_FTI2C010_TIMEOUT; ) {
78 stat = readl(®s->sr);
79 if ((stat & mask) == mask) {
93 * Initialization, must be called once on start up, may be called
94 * repeatedly to change the speed and slave addresses.
96 void i2c_init(int speed, int slaveaddr)
98 if (speed || !curr->speed)
99 i2c_set_bus_speed(speed);
101 /* if slave mode disabled */
107 * Implement slave mode, but is it really necessary?
112 * Probe the given I2C chip address. Returns 0 if a chip responded,
115 int i2c_probe(uchar chip)
118 struct fti2c010_regs *regs = curr->regs;
122 /* 1. Select slave device (7bits Address + 1bit R/W) */
123 writel(I2C_WR(chip), ®s->dr);
124 writel(CR_ENABLE | CR_TBEN | CR_START, ®s->cr);
125 ret = fti2c010_wait(SR_DT);
129 /* 2. Select device register */
130 writel(0, ®s->dr);
131 writel(CR_ENABLE | CR_TBEN, ®s->cr);
132 ret = fti2c010_wait(SR_DT);
138 * Read/Write interface:
139 * chip: I2C chip address, range 0..127
140 * addr: Memory (register) address within the chip
141 * alen: Number of bytes to use for addr (typically 1, 2 for larger
142 * memories, 0 for register type devices with only one
144 * buffer: Where to read/write the data
145 * len: How many bytes to read/write
147 * Returns: 0 on success, not 0 on failure
149 int i2c_read(uchar chip, uint addr, int alen, uchar *buf, int len)
153 struct fti2c010_regs *regs = curr->regs;
157 paddr[0] = (addr >> 0) & 0xFF;
158 paddr[1] = (addr >> 8) & 0xFF;
159 paddr[2] = (addr >> 16) & 0xFF;
160 paddr[3] = (addr >> 24) & 0xFF;
163 * Phase A. Set register address
166 /* A.1 Select slave device (7bits Address + 1bit R/W) */
167 writel(I2C_WR(chip), ®s->dr);
168 writel(CR_ENABLE | CR_TBEN | CR_START, ®s->cr);
169 ret = fti2c010_wait(SR_DT);
173 /* A.2 Select device register */
174 for (pos = 0; pos < alen; ++pos) {
175 uint32_t ctrl = CR_ENABLE | CR_TBEN;
177 writel(paddr[pos], ®s->dr);
178 writel(ctrl, ®s->cr);
179 ret = fti2c010_wait(SR_DT);
185 * Phase B. Get register data
188 /* B.1 Select slave device (7bits Address + 1bit R/W) */
189 writel(I2C_RD(chip), ®s->dr);
190 writel(CR_ENABLE | CR_TBEN | CR_START, ®s->cr);
191 ret = fti2c010_wait(SR_DT);
195 /* B.2 Get register data */
196 for (pos = 0; pos < len; ++pos) {
197 uint32_t ctrl = CR_ENABLE | CR_TBEN;
198 uint32_t stat = SR_DR;
200 if (pos == len - 1) {
201 ctrl |= CR_NAK | CR_STOP;
204 writel(ctrl, ®s->cr);
205 ret = fti2c010_wait(stat);
208 buf[pos] = (uchar)(readl(®s->dr) & 0xFF);
215 * Read/Write interface:
216 * chip: I2C chip address, range 0..127
217 * addr: Memory (register) address within the chip
218 * alen: Number of bytes to use for addr (typically 1, 2 for larger
219 * memories, 0 for register type devices with only one
221 * buffer: Where to read/write the data
222 * len: How many bytes to read/write
224 * Returns: 0 on success, not 0 on failure
226 int i2c_write(uchar chip, uint addr, int alen, uchar *buf, int len)
230 struct fti2c010_regs *regs = curr->regs;
234 paddr[0] = (addr >> 0) & 0xFF;
235 paddr[1] = (addr >> 8) & 0xFF;
236 paddr[2] = (addr >> 16) & 0xFF;
237 paddr[3] = (addr >> 24) & 0xFF;
240 * Phase A. Set register address
242 * A.1 Select slave device (7bits Address + 1bit R/W)
244 writel(I2C_WR(chip), ®s->dr);
245 writel(CR_ENABLE | CR_TBEN | CR_START, ®s->cr);
246 ret = fti2c010_wait(SR_DT);
250 /* A.2 Select device register */
251 for (pos = 0; pos < alen; ++pos) {
252 uint32_t ctrl = CR_ENABLE | CR_TBEN;
254 writel(paddr[pos], ®s->dr);
255 writel(ctrl, ®s->cr);
256 ret = fti2c010_wait(SR_DT);
262 * Phase B. Set register data
264 for (pos = 0; pos < len; ++pos) {
265 uint32_t ctrl = CR_ENABLE | CR_TBEN;
269 writel(buf[pos], ®s->dr);
270 writel(ctrl, ®s->cr);
271 ret = fti2c010_wait(SR_DT);
280 * Functions for setting the current I2C bus and its speed
282 #ifdef CONFIG_I2C_MULTI_BUS
287 * Change the active I2C bus. Subsequent read/write calls will
290 * bus - bus index, zero based
292 * Returns: 0 on success, not 0 on failure
294 int i2c_set_bus_num(uint bus)
296 if (bus >= ARRAY_SIZE(chip_list))
298 curr = chip_list + bus;
306 * Returns index of currently active I2C bus. Zero-based.
309 uint i2c_get_bus_num(void)
314 #endif /* #ifdef CONFIG_I2C_MULTI_BUS */
319 * Change the speed of the active I2C bus
321 * speed - bus speed in Hz
323 * Returns: 0 on success, not 0 on failure
325 int i2c_set_bus_speed(uint speed)
327 struct fti2c010_regs *regs = curr->regs;
328 uint clk = CONFIG_FTI2C010_CLOCK;
329 uint gsr = 0, tsr = 32;
333 speed = CONFIG_SYS_I2C_SPEED;
335 for (div = 0; div < 0x3ffff; ++div) {
336 /* SCLout = PCLK/(2*(COUNT + 2) + GSR) */
337 spd = clk / (2 * (div + 2) + gsr);
342 if (curr->speed == spd)
345 writel(CR_I2CRST, ®s->cr);
347 if (readl(®s->cr) & CR_I2CRST) {
348 printf("fti2c010: reset timeout\n");
354 writel(TGSR_GSR(gsr) | TGSR_TSR(tsr), ®s->tgsr);
355 writel(CDR_DIV(div), ®s->cdr);
363 * Returns speed of currently active I2C bus in Hz
366 uint i2c_get_bus_speed(void)