drivers/gpu/drm/v3d/v3d_drv.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /* Copyright (C) 2014-2018 Broadcom */
   3
   4 /**
   5  * DOC: Broadcom V3D Graphics Driver
   6  *
   7  * This driver supports the Broadcom V3D 3.3 and 4.1 OpenGL ES GPUs.
   8  * For V3D 2.x support, see the VC4 driver.
   9  *
  10  * The V3D GPU includes a tiled render (composed of a bin and render
  11  * pipelines), the TFU (texture formatting unit), and the CSD (compute
  12  * shader dispatch).
  13  */
  14
  15 #include <linux/clk.h>
  16 #include <linux/device.h>
  17 #include <linux/io.h>
  18 #include <linux/module.h>
  19 #include <linux/of_platform.h>
  20 #include <linux/platform_device.h>
  21 #include <linux/pm_runtime.h>
  22 #include <linux/reset.h>
  23 #include <drm/drm_fb_cma_helper.h>
  24 #include <drm/drm_fb_helper.h>
  25
  26 #include "uapi/drm/v3d_drm.h"
  27 #include "v3d_drv.h"
  28 #include "v3d_regs.h"
  29
  30 #define DRIVER_NAME "v3d"
  31 #define DRIVER_DESC "Broadcom V3D graphics"
  32 #define DRIVER_DATE "20180419"
  33 #define DRIVER_MAJOR 1
  34 #define DRIVER_MINOR 0
  35 #define DRIVER_PATCHLEVEL 0
  36
  37 #ifdef CONFIG_PM
  38 static int v3d_runtime_suspend(struct device *dev)
  39 {
  40         struct drm_device *drm = dev_get_drvdata(dev);
  41         struct v3d_dev *v3d = to_v3d_dev(drm);
  42
  43         v3d_irq_disable(v3d);
  44
  45         clk_disable_unprepare(v3d->clk);
  46
  47         return 0;
  48 }
  49
  50 static int v3d_runtime_resume(struct device *dev)
  51 {
  52         struct drm_device *drm = dev_get_drvdata(dev);
  53         struct v3d_dev *v3d = to_v3d_dev(drm);
  54         int ret;
  55
  56         ret = clk_prepare_enable(v3d->clk);
  57         if (ret != 0)
  58                 return ret;
  59
  60         /* XXX: VPM base */
  61
  62         v3d_mmu_set_page_table(v3d);
  63         v3d_irq_enable(v3d);
  64
  65         return 0;
  66 }
  67 #endif
  68
  69 static const struct dev_pm_ops v3d_v3d_pm_ops = {
  70         SET_RUNTIME_PM_OPS(v3d_runtime_suspend, v3d_runtime_resume, NULL)
  71 };
  72
  73 static int v3d_get_param_ioctl(struct drm_device *dev, void *data,
  74                                struct drm_file *file_priv)
  75 {
  76         struct v3d_dev *v3d = to_v3d_dev(dev);
  77         struct drm_v3d_get_param *args = data;
  78         int ret;
  79         static const u32 reg_map[] = {
  80                 [DRM_V3D_PARAM_V3D_UIFCFG] = V3D_HUB_UIFCFG,
  81                 [DRM_V3D_PARAM_V3D_HUB_IDENT1] = V3D_HUB_IDENT1,
  82                 [DRM_V3D_PARAM_V3D_HUB_IDENT2] = V3D_HUB_IDENT2,
  83                 [DRM_V3D_PARAM_V3D_HUB_IDENT3] = V3D_HUB_IDENT3,
  84                 [DRM_V3D_PARAM_V3D_CORE0_IDENT0] = V3D_CTL_IDENT0,
  85                 [DRM_V3D_PARAM_V3D_CORE0_IDENT1] = V3D_CTL_IDENT1,
  86                 [DRM_V3D_PARAM_V3D_CORE0_IDENT2] = V3D_CTL_IDENT2,
  87         };
  88
  89         if (args->pad != 0)
  90                 return -EINVAL;
  91
  92         /* Note that DRM_V3D_PARAM_V3D_CORE0_IDENT0 is 0, so we need
  93          * to explicitly allow it in the "the register in our
  94          * parameter map" check.
  95          */
  96         if (args->param < ARRAY_SIZE(reg_map) &&
  97             (reg_map[args->param] ||
  98              args->param == DRM_V3D_PARAM_V3D_CORE0_IDENT0)) {
  99                 u32 offset = reg_map[args->param];
 100
 101                 if (args->value != 0)
 102                         return -EINVAL;
 103
 104                 ret = pm_runtime_get_sync(v3d->dev);
 105                 if (ret < 0)
 106                         return ret;
 107                 if (args->param >= DRM_V3D_PARAM_V3D_CORE0_IDENT0 &&
 108                     args->param <= DRM_V3D_PARAM_V3D_CORE0_IDENT2) {
 109                         args->value = V3D_CORE_READ(0, offset);
 110                 } else {
 111                         args->value = V3D_READ(offset);
 112                 }
 113                 pm_runtime_mark_last_busy(v3d->dev);
 114                 pm_runtime_put_autosuspend(v3d->dev);
 115                 return 0;
 116         }
 117
 118
 119         switch (args->param) {
 120         case DRM_V3D_PARAM_SUPPORTS_TFU:
 121                 args->value = 1;
 122                 return 0;
 123         case DRM_V3D_PARAM_SUPPORTS_CSD:
 124                 args->value = v3d_has_csd(v3d);
 125                 return 0;
 126         default:
 127                 DRM_DEBUG("Unknown parameter %d\n", args->param);
 128                 return -EINVAL;
 129         }
 130 }
 131
 132 static int
 133 v3d_open(struct drm_device *dev, struct drm_file *file)
 134 {
 135         struct v3d_dev *v3d = to_v3d_dev(dev);
 136         struct v3d_file_priv *v3d_priv;
 137         struct drm_sched_rq *rq;
 138         int i;
 139
 140         v3d_priv = kzalloc(sizeof(*v3d_priv), GFP_KERNEL);
 141         if (!v3d_priv)
 142                 return -ENOMEM;
 143
 144         v3d_priv->v3d = v3d;
 145
 146         for (i = 0; i < V3D_MAX_QUEUES; i++) {
 147                 rq = &v3d->queue[i].sched.sched_rq[DRM_SCHED_PRIORITY_NORMAL];
 148                 drm_sched_entity_init(&v3d_priv->sched_entity[i], &rq, 1, NULL);
 149         }
 150
 151         file->driver_priv = v3d_priv;
 152
 153         return 0;
 154 }
 155
 156 static void
 157 v3d_postclose(struct drm_device *dev, struct drm_file *file)
 158 {
 159         struct v3d_file_priv *v3d_priv = file->driver_priv;
 160         enum v3d_queue q;
 161
 162         for (q = 0; q < V3D_MAX_QUEUES; q++) {
 163                 drm_sched_entity_destroy(&v3d_priv->sched_entity[q]);
 164         }
 165
 166         kfree(v3d_priv);
 167 }
 168
 169 DEFINE_DRM_GEM_SHMEM_FOPS(v3d_drm_fops);
 170
 171 /* DRM_AUTH is required on SUBMIT_CL for now, while we don't have GMP
 172  * protection between clients.  Note that render nodes would be be
 173  * able to submit CLs that could access BOs from clients authenticated
 174  * with the master node.  The TFU doesn't use the GMP, so it would
 175  * need to stay DRM_AUTH until we do buffer size/offset validation.
 176  */
 177 static const struct drm_ioctl_desc v3d_drm_ioctls[] = {
 178         DRM_IOCTL_DEF_DRV(V3D_SUBMIT_CL, v3d_submit_cl_ioctl, DRM_RENDER_ALLOW | DRM_AUTH),
 179         DRM_IOCTL_DEF_DRV(V3D_WAIT_BO, v3d_wait_bo_ioctl, DRM_RENDER_ALLOW),
 180         DRM_IOCTL_DEF_DRV(V3D_CREATE_BO, v3d_create_bo_ioctl, DRM_RENDER_ALLOW),
 181         DRM_IOCTL_DEF_DRV(V3D_MMAP_BO, v3d_mmap_bo_ioctl, DRM_RENDER_ALLOW),
 182         DRM_IOCTL_DEF_DRV(V3D_GET_PARAM, v3d_get_param_ioctl, DRM_RENDER_ALLOW),
 183         DRM_IOCTL_DEF_DRV(V3D_GET_BO_OFFSET, v3d_get_bo_offset_ioctl, DRM_RENDER_ALLOW),
 184         DRM_IOCTL_DEF_DRV(V3D_SUBMIT_TFU, v3d_submit_tfu_ioctl, DRM_RENDER_ALLOW | DRM_AUTH),
 185         DRM_IOCTL_DEF_DRV(V3D_SUBMIT_CSD, v3d_submit_csd_ioctl, DRM_RENDER_ALLOW | DRM_AUTH),
 186 };
 187
 188 static struct drm_driver v3d_drm_driver = {
 189         .driver_features = (DRIVER_GEM |
 190                             DRIVER_RENDER |
 191                             DRIVER_PRIME |
 192                             DRIVER_SYNCOBJ),
 193
 194         .open = v3d_open,
 195         .postclose = v3d_postclose,
 196
 197 #if defined(CONFIG_DEBUG_FS)
 198         .debugfs_init = v3d_debugfs_init,
 199 #endif
 200
 201         .gem_create_object = v3d_create_object,
 202         .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
 203         .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
 204         .gem_prime_import_sg_table = v3d_prime_import_sg_table,
 205         .gem_prime_mmap = drm_gem_prime_mmap,
 206
 207         .ioctls = v3d_drm_ioctls,
 208         .num_ioctls = ARRAY_SIZE(v3d_drm_ioctls),
 209         .fops = &v3d_drm_fops,
 210
 211         .name = DRIVER_NAME,
 212         .desc = DRIVER_DESC,
 213         .date = DRIVER_DATE,
 214         .major = DRIVER_MAJOR,
 215         .minor = DRIVER_MINOR,
 216         .patchlevel = DRIVER_PATCHLEVEL,
 217 };
 218
 219 static const struct of_device_id v3d_of_match[] = {
 220         { .compatible = "brcm,7268-v3d" },
 221         { .compatible = "brcm,7278-v3d" },
 222         {},
 223 };
 224 MODULE_DEVICE_TABLE(of, v3d_of_match);
 225
 226 static int
 227 map_regs(struct v3d_dev *v3d, void __iomem **regs, const char *name)
 228 {
 229         struct resource *res =
 230                 platform_get_resource_byname(v3d->pdev, IORESOURCE_MEM, name);
 231
 232         *regs = devm_ioremap_resource(v3d->dev, res);
 233         return PTR_ERR_OR_ZERO(*regs);
 234 }
 235
 236 static int v3d_platform_drm_probe(struct platform_device *pdev)
 237 {
 238         struct device *dev = &pdev->dev;
 239         struct drm_device *drm;
 240         struct v3d_dev *v3d;
 241         int ret;
 242         u32 mmu_debug;
 243         u32 ident1;
 244
 245
 246         v3d = kzalloc(sizeof(*v3d), GFP_KERNEL);
 247         if (!v3d)
 248                 return -ENOMEM;
 249         v3d->dev = dev;
 250         v3d->pdev = pdev;
 251         drm = &v3d->drm;
 252
 253         ret = map_regs(v3d, &v3d->hub_regs, "hub");
 254         if (ret)
 255                 goto dev_free;
 256
 257         ret = map_regs(v3d, &v3d->core_regs[0], "core0");
 258         if (ret)
 259                 goto dev_free;
 260
 261         mmu_debug = V3D_READ(V3D_MMU_DEBUG_INFO);
 262         dev->coherent_dma_mask =
 263                 DMA_BIT_MASK(30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_PA_WIDTH));
 264         v3d->va_width = 30 + V3D_GET_FIELD(mmu_debug, V3D_MMU_VA_WIDTH);
 265
 266         ident1 = V3D_READ(V3D_HUB_IDENT1);
 267         v3d->ver = (V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_TVER) * 10 +
 268                     V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_REV));
 269         v3d->cores = V3D_GET_FIELD(ident1, V3D_HUB_IDENT1_NCORES);
 270         WARN_ON(v3d->cores > 1); /* multicore not yet implemented */
 271
 272         v3d->reset = devm_reset_control_get_exclusive(dev, NULL);
 273         if (IS_ERR(v3d->reset)) {
 274                 ret = PTR_ERR(v3d->reset);
 275
 276                 if (ret == -EPROBE_DEFER)
 277                         goto dev_free;
 278
 279                 v3d->reset = NULL;
 280                 ret = map_regs(v3d, &v3d->bridge_regs, "bridge");
 281                 if (ret) {
 282                         dev_err(dev,
 283                                 "Failed to get reset control or bridge regs\n");
 284                         goto dev_free;
 285                 }
 286         }
 287
 288         if (v3d->ver < 41) {
 289                 ret = map_regs(v3d, &v3d->gca_regs, "gca");
 290                 if (ret)
 291                         goto dev_free;
 292         }
 293
 294         v3d->mmu_scratch = dma_alloc_wc(dev, 4096, &v3d->mmu_scratch_paddr,
 295                                         GFP_KERNEL | __GFP_NOWARN | __GFP_ZERO);
 296         if (!v3d->mmu_scratch) {
 297                 dev_err(dev, "Failed to allocate MMU scratch page\n");
 298                 ret = -ENOMEM;
 299                 goto dev_free;
 300         }
 301
 302         pm_runtime_use_autosuspend(dev);
 303         pm_runtime_set_autosuspend_delay(dev, 50);
 304         pm_runtime_enable(dev);
 305
 306         ret = drm_dev_init(&v3d->drm, &v3d_drm_driver, dev);
 307         if (ret)
 308                 goto dma_free;
 309
 310         platform_set_drvdata(pdev, drm);
 311         drm->dev_private = v3d;
 312
 313         ret = v3d_gem_init(drm);
 314         if (ret)
 315                 goto dev_destroy;
 316
 317         ret = v3d_irq_init(v3d);
 318         if (ret)
 319                 goto gem_destroy;
 320
 321         ret = drm_dev_register(drm, 0);
 322         if (ret)
 323                 goto irq_disable;
 324
 325         return 0;
 326
 327 irq_disable:
 328         v3d_irq_disable(v3d);
 329 gem_destroy:
 330         v3d_gem_destroy(drm);
 331 dev_destroy:
 332         drm_dev_put(drm);
 333 dma_free:
 334         dma_free_wc(dev, 4096, v3d->mmu_scratch, v3d->mmu_scratch_paddr);
 335 dev_free:
 336         kfree(v3d);
 337         return ret;
 338 }
 339
 340 static int v3d_platform_drm_remove(struct platform_device *pdev)
 341 {
 342         struct drm_device *drm = platform_get_drvdata(pdev);
 343         struct v3d_dev *v3d = to_v3d_dev(drm);
 344
 345         drm_dev_unregister(drm);
 346
 347         v3d_gem_destroy(drm);
 348
 349         drm_dev_put(drm);
 350
 351         dma_free_wc(v3d->dev, 4096, v3d->mmu_scratch, v3d->mmu_scratch_paddr);
 352
 353         return 0;
 354 }
 355
 356 static struct platform_driver v3d_platform_driver = {
 357         .probe          = v3d_platform_drm_probe,
 358         .remove         = v3d_platform_drm_remove,
 359         .driver         = {
 360                 .name   = "v3d",
 361                 .of_match_table = v3d_of_match,
 362         },
 363 };
 364
 365 static int __init v3d_drm_register(void)
 366 {
 367         return platform_driver_register(&v3d_platform_driver);
 368 }
 369
 370 static void __exit v3d_drm_unregister(void)
 371 {
 372         platform_driver_unregister(&v3d_platform_driver);
 373 }
 374
 375 module_init(v3d_drm_register);
 376 module_exit(v3d_drm_unregister);
 377
 378 MODULE_ALIAS("platform:v3d-drm");
 379 MODULE_DESCRIPTION("Broadcom V3D DRM Driver");
 380 MODULE_AUTHOR("Eric Anholt <eric@anholt.net>");
 381 MODULE_LICENSE("GPL v2");