1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Copyright (C) 2016 BayLibre, SAS
4 * Author: Neil Armstrong <narmstrong@baylibre.com>
5 * Copyright (C) 2014 Endless Mobile
8 * Jasper St. Pierre <jstpierre@mecheye.net>
11 #include <linux/kernel.h>
12 #include <linux/module.h>
13 #include <linux/mutex.h>
14 #include <linux/platform_device.h>
15 #include <linux/component.h>
16 #include <linux/of_graph.h>
19 #include <drm/drm_atomic.h>
20 #include <drm/drm_atomic_helper.h>
21 #include <drm/drm_fb_cma_helper.h>
22 #include <drm/drm_fb_helper.h>
23 #include <drm/drm_flip_work.h>
24 #include <drm/drm_gem_cma_helper.h>
25 #include <drm/drm_gem_framebuffer_helper.h>
26 #include <drm/drm_plane_helper.h>
27 #include <drm/drm_probe_helper.h>
28 #include <drm/drm_rect.h>
30 #include "meson_drv.h"
31 #include "meson_plane.h"
32 #include "meson_overlay.h"
33 #include "meson_crtc.h"
34 #include "meson_venc_cvbs.h"
36 #include "meson_vpp.h"
37 #include "meson_viu.h"
38 #include "meson_venc.h"
39 #include "meson_registers.h"
41 #define DRIVER_NAME "meson"
42 #define DRIVER_DESC "Amlogic Meson DRM driver"
45 * DOC: Video Processing Unit
47 * VPU Handles the Global Video Processing, it includes management of the
48 * clocks gates, blocks reset lines and power domains.
52 * - Full reset of entire video processing HW blocks
53 * - Scaling and setup of the VPU clock
55 * - Powering up video processing HW blocks
56 * - Powering Up HDMI controller and PHY
59 static const struct drm_mode_config_funcs meson_mode_config_funcs = {
60 .atomic_check = drm_atomic_helper_check,
61 .atomic_commit = drm_atomic_helper_commit,
62 .fb_create = drm_gem_fb_create,
65 static const struct drm_mode_config_helper_funcs meson_mode_config_helpers = {
66 .atomic_commit_tail = drm_atomic_helper_commit_tail_rpm,
69 static irqreturn_t meson_irq(int irq, void *arg)
71 struct drm_device *dev = arg;
72 struct meson_drm *priv = dev->dev_private;
74 (void)readl_relaxed(priv->io_base + _REG(VENC_INTFLAG));
81 static int meson_dumb_create(struct drm_file *file, struct drm_device *dev,
82 struct drm_mode_create_dumb *args)
85 * We need 64bytes aligned stride, and PAGE aligned size
87 args->pitch = ALIGN(DIV_ROUND_UP(args->width * args->bpp, 8), SZ_64);
88 args->size = PAGE_ALIGN(args->pitch * args->height);
90 return drm_gem_cma_dumb_create_internal(file, dev, args);
93 DEFINE_DRM_GEM_CMA_FOPS(fops);
95 static struct drm_driver meson_driver = {
96 .driver_features = DRIVER_GEM |
97 DRIVER_MODESET | DRIVER_PRIME |
101 .irq_handler = meson_irq,
104 .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
105 .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
106 .gem_prime_import = drm_gem_prime_import,
107 .gem_prime_export = drm_gem_prime_export,
108 .gem_prime_get_sg_table = drm_gem_cma_prime_get_sg_table,
109 .gem_prime_import_sg_table = drm_gem_cma_prime_import_sg_table,
110 .gem_prime_vmap = drm_gem_cma_prime_vmap,
111 .gem_prime_vunmap = drm_gem_cma_prime_vunmap,
112 .gem_prime_mmap = drm_gem_cma_prime_mmap,
115 .dumb_create = meson_dumb_create,
116 .gem_free_object_unlocked = drm_gem_cma_free_object,
117 .gem_vm_ops = &drm_gem_cma_vm_ops,
128 static bool meson_vpu_has_available_connectors(struct device *dev)
130 struct device_node *ep, *remote;
132 /* Parses each endpoint and check if remote exists */
133 for_each_endpoint_of_node(dev->of_node, ep) {
134 /* If the endpoint node exists, consider it enabled */
135 remote = of_graph_get_remote_port(ep);
143 static struct regmap_config meson_regmap_config = {
147 .max_register = 0x1000,
150 static void meson_vpu_init(struct meson_drm *priv)
152 writel_relaxed(0x210000, priv->io_base + _REG(VPU_RDARB_MODE_L1C1));
153 writel_relaxed(0x10000, priv->io_base + _REG(VPU_RDARB_MODE_L1C2));
154 writel_relaxed(0x900000, priv->io_base + _REG(VPU_RDARB_MODE_L2C1));
155 writel_relaxed(0x20000, priv->io_base + _REG(VPU_WRARB_MODE_L2C1));
158 static void meson_remove_framebuffers(void)
160 struct apertures_struct *ap;
162 ap = alloc_apertures(1);
166 /* The framebuffer can be located anywhere in RAM */
167 ap->ranges[0].base = 0;
168 ap->ranges[0].size = ~0;
170 drm_fb_helper_remove_conflicting_framebuffers(ap, "meson-drm-fb",
175 static int meson_drv_bind_master(struct device *dev, bool has_components)
177 struct platform_device *pdev = to_platform_device(dev);
178 struct meson_drm *priv;
179 struct drm_device *drm;
180 struct resource *res;
184 /* Checks if an output connector is available */
185 if (!meson_vpu_has_available_connectors(dev)) {
186 dev_err(dev, "No output connector available\n");
190 drm = drm_dev_alloc(&meson_driver, dev);
194 priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
199 drm->dev_private = priv;
203 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "vpu");
204 regs = devm_ioremap_resource(dev, res);
210 priv->io_base = regs;
212 res = platform_get_resource_byname(pdev, IORESOURCE_MEM, "hhi");
217 /* Simply ioremap since it may be a shared register zone */
218 regs = devm_ioremap(dev, res->start, resource_size(res));
220 ret = -EADDRNOTAVAIL;
224 priv->hhi = devm_regmap_init_mmio(dev, regs,
225 &meson_regmap_config);
226 if (IS_ERR(priv->hhi)) {
227 dev_err(&pdev->dev, "Couldn't create the HHI regmap\n");
228 ret = PTR_ERR(priv->hhi);
232 priv->canvas = meson_canvas_get(dev);
233 if (IS_ERR(priv->canvas)) {
234 ret = PTR_ERR(priv->canvas);
238 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_osd1);
241 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_0);
243 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
246 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_1);
248 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
249 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
252 ret = meson_canvas_alloc(priv->canvas, &priv->canvas_id_vd1_2);
254 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
255 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
256 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
260 priv->vsync_irq = platform_get_irq(pdev, 0);
262 ret = drm_vblank_init(drm, 1);
266 /* Remove early framebuffers (ie. simplefb) */
267 meson_remove_framebuffers();
269 drm_mode_config_init(drm);
270 drm->mode_config.max_width = 3840;
271 drm->mode_config.max_height = 2160;
272 drm->mode_config.funcs = &meson_mode_config_funcs;
273 drm->mode_config.helper_private = &meson_mode_config_helpers;
275 /* Hardware Initialization */
277 meson_vpu_init(priv);
278 meson_venc_init(priv);
279 meson_vpp_init(priv);
280 meson_viu_init(priv);
282 /* Encoder Initialization */
284 ret = meson_venc_cvbs_create(priv);
288 if (has_components) {
289 ret = component_bind_all(drm->dev, drm);
291 dev_err(drm->dev, "Couldn't bind all components\n");
296 ret = meson_plane_create(priv);
300 ret = meson_overlay_create(priv);
304 ret = meson_crtc_create(priv);
308 ret = drm_irq_install(drm, priv->vsync_irq);
312 drm_mode_config_reset(drm);
314 drm_kms_helper_poll_init(drm);
316 platform_set_drvdata(pdev, priv);
318 ret = drm_dev_register(drm, 0);
322 drm_fbdev_generic_setup(drm, 32);
327 drm_irq_uninstall(drm);
334 static int meson_drv_bind(struct device *dev)
336 return meson_drv_bind_master(dev, true);
339 static void meson_drv_unbind(struct device *dev)
341 struct meson_drm *priv = dev_get_drvdata(dev);
342 struct drm_device *drm = priv->drm;
345 meson_canvas_free(priv->canvas, priv->canvas_id_osd1);
346 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_0);
347 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_1);
348 meson_canvas_free(priv->canvas, priv->canvas_id_vd1_2);
351 drm_dev_unregister(drm);
352 drm_irq_uninstall(drm);
353 drm_kms_helper_poll_fini(drm);
354 drm_mode_config_cleanup(drm);
359 static const struct component_master_ops meson_drv_master_ops = {
360 .bind = meson_drv_bind,
361 .unbind = meson_drv_unbind,
364 static int compare_of(struct device *dev, void *data)
366 DRM_DEBUG_DRIVER("Comparing of node %pOF with %pOF\n",
369 return dev->of_node == data;
372 /* Possible connectors nodes to ignore */
373 static const struct of_device_id connectors_match[] = {
374 { .compatible = "composite-video-connector" },
375 { .compatible = "svideo-connector" },
376 { .compatible = "hdmi-connector" },
377 { .compatible = "dvi-connector" },
381 static int meson_probe_remote(struct platform_device *pdev,
382 struct component_match **match,
383 struct device_node *parent,
384 struct device_node *remote)
386 struct device_node *ep, *remote_node;
389 /* If node is a connector, return and do not add to match table */
390 if (of_match_node(connectors_match, remote))
393 component_match_add(&pdev->dev, match, compare_of, remote);
395 for_each_endpoint_of_node(remote, ep) {
396 remote_node = of_graph_get_remote_port_parent(ep);
398 remote_node == parent || /* Ignore parent endpoint */
399 !of_device_is_available(remote_node)) {
400 of_node_put(remote_node);
404 count += meson_probe_remote(pdev, match, remote, remote_node);
406 of_node_put(remote_node);
412 static int meson_drv_probe(struct platform_device *pdev)
414 struct component_match *match = NULL;
415 struct device_node *np = pdev->dev.of_node;
416 struct device_node *ep, *remote;
419 for_each_endpoint_of_node(np, ep) {
420 remote = of_graph_get_remote_port_parent(ep);
421 if (!remote || !of_device_is_available(remote)) {
426 count += meson_probe_remote(pdev, &match, np, remote);
431 return meson_drv_bind_master(&pdev->dev, false);
433 /* If some endpoints were found, initialize the nodes */
435 dev_info(&pdev->dev, "Queued %d outputs on vpu\n", count);
437 return component_master_add_with_match(&pdev->dev,
438 &meson_drv_master_ops,
442 /* If no output endpoints were available, simply bail out */
446 static const struct of_device_id dt_match[] = {
447 { .compatible = "amlogic,meson-gxbb-vpu" },
448 { .compatible = "amlogic,meson-gxl-vpu" },
449 { .compatible = "amlogic,meson-gxm-vpu" },
450 { .compatible = "amlogic,meson-g12a-vpu" },
453 MODULE_DEVICE_TABLE(of, dt_match);
455 static struct platform_driver meson_drm_platform_driver = {
456 .probe = meson_drv_probe,
459 .of_match_table = dt_match,
463 module_platform_driver(meson_drm_platform_driver);
465 MODULE_AUTHOR("Jasper St. Pierre <jstpierre@mecheye.net>");
466 MODULE_AUTHOR("Neil Armstrong <narmstrong@baylibre.com>");
467 MODULE_DESCRIPTION(DRIVER_DESC);
468 MODULE_LICENSE("GPL");