drivers/gpu/drm/amd/amdkfd/kfd_device_queue_manager.c

   1 /*
   2  * Copyright 2014 Advanced Micro Devices, Inc.
   3  *
   4  * Permission is hereby granted, free of charge, to any person obtaining a
   5  * copy of this software and associated documentation files (the "Software"),
   6  * to deal in the Software without restriction, including without limitation
   7  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
   8  * and/or sell copies of the Software, and to permit persons to whom the
   9  * Software is furnished to do so, subject to the following conditions:
  10  *
  11  * The above copyright notice and this permission notice shall be included in
  12  * all copies or substantial portions of the Software.
  13  *
  14  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
  17  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20  * OTHER DEALINGS IN THE SOFTWARE.
  21  *
  22  */
  23
  24 #include <linux/ratelimit.h>
  25 #include <linux/printk.h>
  26 #include <linux/slab.h>
  27 #include <linux/list.h>
  28 #include <linux/types.h>
  29 #include <linux/bitops.h>
  30 #include <linux/sched.h>
  31 #include "kfd_priv.h"
  32 #include "kfd_device_queue_manager.h"
  33 #include "kfd_mqd_manager.h"
  34 #include "cik_regs.h"
  35 #include "kfd_kernel_queue.h"
  36 #include "amdgpu_amdkfd.h"
  37
  38 /* Size of the per-pipe EOP queue */
  39 #define CIK_HPD_EOP_BYTES_LOG2 11
  40 #define CIK_HPD_EOP_BYTES (1U << CIK_HPD_EOP_BYTES_LOG2)
  41
  42 static int set_pasid_vmid_mapping(struct device_queue_manager *dqm,
  43                                         unsigned int pasid, unsigned int vmid);
  44
  45 static int execute_queues_cpsch(struct device_queue_manager *dqm,
  46                                 enum kfd_unmap_queues_filter filter,
  47                                 uint32_t filter_param);
  48 static int unmap_queues_cpsch(struct device_queue_manager *dqm,
  49                                 enum kfd_unmap_queues_filter filter,
  50                                 uint32_t filter_param);
  51
  52 static int map_queues_cpsch(struct device_queue_manager *dqm);
  53
  54 static void deallocate_sdma_queue(struct device_queue_manager *dqm,
  55                                 struct queue *q);
  56
  57 static inline void deallocate_hqd(struct device_queue_manager *dqm,
  58                                 struct queue *q);
  59 static int allocate_hqd(struct device_queue_manager *dqm, struct queue *q);
  60 static int allocate_sdma_queue(struct device_queue_manager *dqm,
  61                                 struct queue *q);
  62 static void kfd_process_hw_exception(struct work_struct *work);
  63
  64 static inline
  65 enum KFD_MQD_TYPE get_mqd_type_from_queue_type(enum kfd_queue_type type)
  66 {
  67         if (type == KFD_QUEUE_TYPE_SDMA || type == KFD_QUEUE_TYPE_SDMA_XGMI)
  68                 return KFD_MQD_TYPE_SDMA;
  69         return KFD_MQD_TYPE_CP;
  70 }
  71
  72 static bool is_pipe_enabled(struct device_queue_manager *dqm, int mec, int pipe)
  73 {
  74         int i;
  75         int pipe_offset = mec * dqm->dev->shared_resources.num_pipe_per_mec
  76                 + pipe * dqm->dev->shared_resources.num_queue_per_pipe;
  77
  78         /* queue is available for KFD usage if bit is 1 */
  79         for (i = 0; i <  dqm->dev->shared_resources.num_queue_per_pipe; ++i)
  80                 if (test_bit(pipe_offset + i,
  81                               dqm->dev->shared_resources.queue_bitmap))
  82                         return true;
  83         return false;
  84 }
  85
  86 unsigned int get_queues_num(struct device_queue_manager *dqm)
  87 {
  88         return bitmap_weight(dqm->dev->shared_resources.queue_bitmap,
  89                                 KGD_MAX_QUEUES);
  90 }
  91
  92 unsigned int get_queues_per_pipe(struct device_queue_manager *dqm)
  93 {
  94         return dqm->dev->shared_resources.num_queue_per_pipe;
  95 }
  96
  97 unsigned int get_pipes_per_mec(struct device_queue_manager *dqm)
  98 {
  99         return dqm->dev->shared_resources.num_pipe_per_mec;
 100 }
 101
 102 static unsigned int get_num_sdma_engines(struct device_queue_manager *dqm)
 103 {
 104         return dqm->dev->device_info->num_sdma_engines;
 105 }
 106
 107 static unsigned int get_num_xgmi_sdma_engines(struct device_queue_manager *dqm)
 108 {
 109         return dqm->dev->device_info->num_xgmi_sdma_engines;
 110 }
 111
 112 unsigned int get_num_sdma_queues(struct device_queue_manager *dqm)
 113 {
 114         return dqm->dev->device_info->num_sdma_engines
 115                         * dqm->dev->device_info->num_sdma_queues_per_engine;
 116 }
 117
 118 unsigned int get_num_xgmi_sdma_queues(struct device_queue_manager *dqm)
 119 {
 120         return dqm->dev->device_info->num_xgmi_sdma_engines
 121                         * dqm->dev->device_info->num_sdma_queues_per_engine;
 122 }
 123
 124 void program_sh_mem_settings(struct device_queue_manager *dqm,
 125                                         struct qcm_process_device *qpd)
 126 {
 127         return dqm->dev->kfd2kgd->program_sh_mem_settings(
 128                                                 dqm->dev->kgd, qpd->vmid,
 129                                                 qpd->sh_mem_config,
 130                                                 qpd->sh_mem_ape1_base,
 131                                                 qpd->sh_mem_ape1_limit,
 132                                                 qpd->sh_mem_bases);
 133 }
 134
 135 static int allocate_doorbell(struct qcm_process_device *qpd, struct queue *q)
 136 {
 137         struct kfd_dev *dev = qpd->dqm->dev;
 138
 139         if (!KFD_IS_SOC15(dev->device_info->asic_family)) {
 140                 /* On pre-SOC15 chips we need to use the queue ID to
 141                  * preserve the user mode ABI.
 142                  */
 143                 q->doorbell_id = q->properties.queue_id;
 144         } else if (q->properties.type == KFD_QUEUE_TYPE_SDMA ||
 145                         q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI) {
 146                 /* For SDMA queues on SOC15 with 8-byte doorbell, use static
 147                  * doorbell assignments based on the engine and queue id.
 148                  * The doobell index distance between RLC (2*i) and (2*i+1)
 149                  * for a SDMA engine is 512.
 150                  */
 151                 uint32_t *idx_offset =
 152                                 dev->shared_resources.sdma_doorbell_idx;
 153
 154                 q->doorbell_id = idx_offset[q->properties.sdma_engine_id]
 155                         + (q->properties.sdma_queue_id & 1)
 156                         * KFD_QUEUE_DOORBELL_MIRROR_OFFSET
 157                         + (q->properties.sdma_queue_id >> 1);
 158         } else {
 159                 /* For CP queues on SOC15 reserve a free doorbell ID */
 160                 unsigned int found;
 161
 162                 found = find_first_zero_bit(qpd->doorbell_bitmap,
 163                                             KFD_MAX_NUM_OF_QUEUES_PER_PROCESS);
 164                 if (found >= KFD_MAX_NUM_OF_QUEUES_PER_PROCESS) {
 165                         pr_debug("No doorbells available");
 166                         return -EBUSY;
 167                 }
 168                 set_bit(found, qpd->doorbell_bitmap);
 169                 q->doorbell_id = found;
 170         }
 171
 172         q->properties.doorbell_off =
 173                 kfd_doorbell_id_to_offset(dev, q->process,
 174                                           q->doorbell_id);
 175
 176         return 0;
 177 }
 178
 179 static void deallocate_doorbell(struct qcm_process_device *qpd,
 180                                 struct queue *q)
 181 {
 182         unsigned int old;
 183         struct kfd_dev *dev = qpd->dqm->dev;
 184
 185         if (!KFD_IS_SOC15(dev->device_info->asic_family) ||
 186             q->properties.type == KFD_QUEUE_TYPE_SDMA ||
 187             q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI)
 188                 return;
 189
 190         old = test_and_clear_bit(q->doorbell_id, qpd->doorbell_bitmap);
 191         WARN_ON(!old);
 192 }
 193
 194 static int allocate_vmid(struct device_queue_manager *dqm,
 195                         struct qcm_process_device *qpd,
 196                         struct queue *q)
 197 {
 198         int bit, allocated_vmid;
 199
 200         if (dqm->vmid_bitmap == 0)
 201                 return -ENOMEM;
 202
 203         bit = ffs(dqm->vmid_bitmap) - 1;
 204         dqm->vmid_bitmap &= ~(1 << bit);
 205
 206         allocated_vmid = bit + dqm->dev->vm_info.first_vmid_kfd;
 207         pr_debug("vmid allocation %d\n", allocated_vmid);
 208         qpd->vmid = allocated_vmid;
 209         q->properties.vmid = allocated_vmid;
 210
 211         set_pasid_vmid_mapping(dqm, q->process->pasid, q->properties.vmid);
 212         program_sh_mem_settings(dqm, qpd);
 213
 214         /* qpd->page_table_base is set earlier when register_process()
 215          * is called, i.e. when the first queue is created.
 216          */
 217         dqm->dev->kfd2kgd->set_vm_context_page_table_base(dqm->dev->kgd,
 218                         qpd->vmid,
 219                         qpd->page_table_base);
 220         /* invalidate the VM context after pasid and vmid mapping is set up */
 221         kfd_flush_tlb(qpd_to_pdd(qpd));
 222
 223         dqm->dev->kfd2kgd->set_scratch_backing_va(
 224                 dqm->dev->kgd, qpd->sh_hidden_private_base, qpd->vmid);
 225
 226         return 0;
 227 }
 228
 229 static int flush_texture_cache_nocpsch(struct kfd_dev *kdev,
 230                                 struct qcm_process_device *qpd)
 231 {
 232         const struct packet_manager_funcs *pmf = qpd->dqm->packets.pmf;
 233         int ret;
 234
 235         if (!qpd->ib_kaddr)
 236                 return -ENOMEM;
 237
 238         ret = pmf->release_mem(qpd->ib_base, (uint32_t *)qpd->ib_kaddr);
 239         if (ret)
 240                 return ret;
 241
 242         return amdgpu_amdkfd_submit_ib(kdev->kgd, KGD_ENGINE_MEC1, qpd->vmid,
 243                                 qpd->ib_base, (uint32_t *)qpd->ib_kaddr,
 244                                 pmf->release_mem_size / sizeof(uint32_t));
 245 }
 246
 247 static void deallocate_vmid(struct device_queue_manager *dqm,
 248                                 struct qcm_process_device *qpd,
 249                                 struct queue *q)
 250 {
 251         int bit = qpd->vmid - dqm->dev->vm_info.first_vmid_kfd;
 252
 253         /* On GFX v7, CP doesn't flush TC at dequeue */
 254         if (q->device->device_info->asic_family == CHIP_HAWAII)
 255                 if (flush_texture_cache_nocpsch(q->device, qpd))
 256                         pr_err("Failed to flush TC\n");
 257
 258         kfd_flush_tlb(qpd_to_pdd(qpd));
 259
 260         /* Release the vmid mapping */
 261         set_pasid_vmid_mapping(dqm, 0, qpd->vmid);
 262
 263         dqm->vmid_bitmap |= (1 << bit);
 264         qpd->vmid = 0;
 265         q->properties.vmid = 0;
 266 }
 267
 268 static int create_queue_nocpsch(struct device_queue_manager *dqm,
 269                                 struct queue *q,
 270                                 struct qcm_process_device *qpd)
 271 {
 272         struct mqd_manager *mqd_mgr;
 273         int retval;
 274
 275         print_queue(q);
 276
 277         dqm_lock(dqm);
 278
 279         if (dqm->total_queue_count >= max_num_of_queues_per_device) {
 280                 pr_warn("Can't create new usermode queue because %d queues were already created\n",
 281                                 dqm->total_queue_count);
 282                 retval = -EPERM;
 283                 goto out_unlock;
 284         }
 285
 286         if (list_empty(&qpd->queues_list)) {
 287                 retval = allocate_vmid(dqm, qpd, q);
 288                 if (retval)
 289                         goto out_unlock;
 290         }
 291         q->properties.vmid = qpd->vmid;
 292         /*
 293          * Eviction state logic: mark all queues as evicted, even ones
 294          * not currently active. Restoring inactive queues later only
 295          * updates the is_evicted flag but is a no-op otherwise.
 296          */
 297         q->properties.is_evicted = !!qpd->evicted;
 298
 299         q->properties.tba_addr = qpd->tba_addr;
 300         q->properties.tma_addr = qpd->tma_addr;
 301
 302         mqd_mgr = dqm->mqd_mgrs[get_mqd_type_from_queue_type(
 303                         q->properties.type)];
 304         if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE) {
 305                 retval = allocate_hqd(dqm, q);
 306                 if (retval)
 307                         goto deallocate_vmid;
 308                 pr_debug("Loading mqd to hqd on pipe %d, queue %d\n",
 309                         q->pipe, q->queue);
 310         } else if (q->properties.type == KFD_QUEUE_TYPE_SDMA ||
 311                 q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI) {
 312                 retval = allocate_sdma_queue(dqm, q);
 313                 if (retval)
 314                         goto deallocate_vmid;
 315                 dqm->asic_ops.init_sdma_vm(dqm, q, qpd);
 316         }
 317
 318         retval = allocate_doorbell(qpd, q);
 319         if (retval)
 320                 goto out_deallocate_hqd;
 321
 322         /* Temporarily release dqm lock to avoid a circular lock dependency */
 323         dqm_unlock(dqm);
 324         q->mqd_mem_obj = mqd_mgr->allocate_mqd(mqd_mgr->dev, &q->properties);
 325         dqm_lock(dqm);
 326
 327         if (!q->mqd_mem_obj) {
 328                 retval = -ENOMEM;
 329                 goto out_deallocate_doorbell;
 330         }
 331         mqd_mgr->init_mqd(mqd_mgr, &q->mqd, q->mqd_mem_obj,
 332                                 &q->gart_mqd_addr, &q->properties);
 333         if (q->properties.is_active) {
 334
 335                 if (WARN(q->process->mm != current->mm,
 336                                         "should only run in user thread"))
 337                         retval = -EFAULT;
 338                 else
 339                         retval = mqd_mgr->load_mqd(mqd_mgr, q->mqd, q->pipe,
 340                                         q->queue, &q->properties, current->mm);
 341                 if (retval)
 342                         goto out_free_mqd;
 343         }
 344
 345         list_add(&q->list, &qpd->queues_list);
 346         qpd->queue_count++;
 347         if (q->properties.is_active)
 348                 dqm->queue_count++;
 349
 350         if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
 351                 dqm->sdma_queue_count++;
 352         else if (q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI)
 353                 dqm->xgmi_sdma_queue_count++;
 354
 355         /*
 356          * Unconditionally increment this counter, regardless of the queue's
 357          * type or whether the queue is active.
 358          */
 359         dqm->total_queue_count++;
 360         pr_debug("Total of %d queues are accountable so far\n",
 361                         dqm->total_queue_count);
 362         goto out_unlock;
 363
 364 out_free_mqd:
 365         mqd_mgr->free_mqd(mqd_mgr, q->mqd, q->mqd_mem_obj);
 366 out_deallocate_doorbell:
 367         deallocate_doorbell(qpd, q);
 368 out_deallocate_hqd:
 369         if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE)
 370                 deallocate_hqd(dqm, q);
 371         else if (q->properties.type == KFD_QUEUE_TYPE_SDMA ||
 372                 q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI)
 373                 deallocate_sdma_queue(dqm, q);
 374 deallocate_vmid:
 375         if (list_empty(&qpd->queues_list))
 376                 deallocate_vmid(dqm, qpd, q);
 377 out_unlock:
 378         dqm_unlock(dqm);
 379         return retval;
 380 }
 381
 382 static int allocate_hqd(struct device_queue_manager *dqm, struct queue *q)
 383 {
 384         bool set;
 385         int pipe, bit, i;
 386
 387         set = false;
 388
 389         for (pipe = dqm->next_pipe_to_allocate, i = 0;
 390                         i < get_pipes_per_mec(dqm);
 391                         pipe = ((pipe + 1) % get_pipes_per_mec(dqm)), ++i) {
 392
 393                 if (!is_pipe_enabled(dqm, 0, pipe))
 394                         continue;
 395
 396                 if (dqm->allocated_queues[pipe] != 0) {
 397                         bit = ffs(dqm->allocated_queues[pipe]) - 1;
 398                         dqm->allocated_queues[pipe] &= ~(1 << bit);
 399                         q->pipe = pipe;
 400                         q->queue = bit;
 401                         set = true;
 402                         break;
 403                 }
 404         }
 405
 406         if (!set)
 407                 return -EBUSY;
 408
 409         pr_debug("hqd slot - pipe %d, queue %d\n", q->pipe, q->queue);
 410         /* horizontal hqd allocation */
 411         dqm->next_pipe_to_allocate = (pipe + 1) % get_pipes_per_mec(dqm);
 412
 413         return 0;
 414 }
 415
 416 static inline void deallocate_hqd(struct device_queue_manager *dqm,
 417                                 struct queue *q)
 418 {
 419         dqm->allocated_queues[q->pipe] |= (1 << q->queue);
 420 }
 421
 422 /* Access to DQM has to be locked before calling destroy_queue_nocpsch_locked
 423  * to avoid asynchronized access
 424  */
 425 static int destroy_queue_nocpsch_locked(struct device_queue_manager *dqm,
 426                                 struct qcm_process_device *qpd,
 427                                 struct queue *q)
 428 {
 429         int retval;
 430         struct mqd_manager *mqd_mgr;
 431
 432         mqd_mgr = dqm->mqd_mgrs[get_mqd_type_from_queue_type(
 433                         q->properties.type)];
 434
 435         if (q->properties.type == KFD_QUEUE_TYPE_COMPUTE) {
 436                 deallocate_hqd(dqm, q);
 437         } else if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
 438                 dqm->sdma_queue_count--;
 439                 deallocate_sdma_queue(dqm, q);
 440         } else if (q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI) {
 441                 dqm->xgmi_sdma_queue_count--;
 442                 deallocate_sdma_queue(dqm, q);
 443         } else {
 444                 pr_debug("q->properties.type %d is invalid\n",
 445                                 q->properties.type);
 446                 return -EINVAL;
 447         }
 448         dqm->total_queue_count--;
 449
 450         deallocate_doorbell(qpd, q);
 451
 452         retval = mqd_mgr->destroy_mqd(mqd_mgr, q->mqd,
 453                                 KFD_PREEMPT_TYPE_WAVEFRONT_RESET,
 454                                 KFD_UNMAP_LATENCY_MS,
 455                                 q->pipe, q->queue);
 456         if (retval == -ETIME)
 457                 qpd->reset_wavefronts = true;
 458
 459         mqd_mgr->free_mqd(mqd_mgr, q->mqd, q->mqd_mem_obj);
 460
 461         list_del(&q->list);
 462         if (list_empty(&qpd->queues_list)) {
 463                 if (qpd->reset_wavefronts) {
 464                         pr_warn("Resetting wave fronts (nocpsch) on dev %p\n",
 465                                         dqm->dev);
 466                         /* dbgdev_wave_reset_wavefronts has to be called before
 467                          * deallocate_vmid(), i.e. when vmid is still in use.
 468                          */
 469                         dbgdev_wave_reset_wavefronts(dqm->dev,
 470                                         qpd->pqm->process);
 471                         qpd->reset_wavefronts = false;
 472                 }
 473
 474                 deallocate_vmid(dqm, qpd, q);
 475         }
 476         qpd->queue_count--;
 477         if (q->properties.is_active)
 478                 dqm->queue_count--;
 479
 480         return retval;
 481 }
 482
 483 static int destroy_queue_nocpsch(struct device_queue_manager *dqm,
 484                                 struct qcm_process_device *qpd,
 485                                 struct queue *q)
 486 {
 487         int retval;
 488
 489         dqm_lock(dqm);
 490         retval = destroy_queue_nocpsch_locked(dqm, qpd, q);
 491         dqm_unlock(dqm);
 492
 493         return retval;
 494 }
 495
 496 static int update_queue(struct device_queue_manager *dqm, struct queue *q)
 497 {
 498         int retval = 0;
 499         struct mqd_manager *mqd_mgr;
 500         struct kfd_process_device *pdd;
 501         bool prev_active = false;
 502
 503         dqm_lock(dqm);
 504         pdd = kfd_get_process_device_data(q->device, q->process);
 505         if (!pdd) {
 506                 retval = -ENODEV;
 507                 goto out_unlock;
 508         }
 509         mqd_mgr = dqm->mqd_mgrs[get_mqd_type_from_queue_type(
 510                         q->properties.type)];
 511
 512         /* Save previous activity state for counters */
 513         prev_active = q->properties.is_active;
 514
 515         /* Make sure the queue is unmapped before updating the MQD */
 516         if (dqm->sched_policy != KFD_SCHED_POLICY_NO_HWS) {
 517                 retval = unmap_queues_cpsch(dqm,
 518                                 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
 519                 if (retval) {
 520                         pr_err("unmap queue failed\n");
 521                         goto out_unlock;
 522                 }
 523         } else if (prev_active &&
 524                    (q->properties.type == KFD_QUEUE_TYPE_COMPUTE ||
 525                     q->properties.type == KFD_QUEUE_TYPE_SDMA ||
 526                     q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI)) {
 527                 retval = mqd_mgr->destroy_mqd(mqd_mgr, q->mqd,
 528                                 KFD_PREEMPT_TYPE_WAVEFRONT_DRAIN,
 529                                 KFD_UNMAP_LATENCY_MS, q->pipe, q->queue);
 530                 if (retval) {
 531                         pr_err("destroy mqd failed\n");
 532                         goto out_unlock;
 533                 }
 534         }
 535
 536         mqd_mgr->update_mqd(mqd_mgr, q->mqd, &q->properties);
 537
 538         /*
 539          * check active state vs. the previous state and modify
 540          * counter accordingly. map_queues_cpsch uses the
 541          * dqm->queue_count to determine whether a new runlist must be
 542          * uploaded.
 543          */
 544         if (q->properties.is_active && !prev_active)
 545                 dqm->queue_count++;
 546         else if (!q->properties.is_active && prev_active)
 547                 dqm->queue_count--;
 548
 549         if (dqm->sched_policy != KFD_SCHED_POLICY_NO_HWS)
 550                 retval = map_queues_cpsch(dqm);
 551         else if (q->properties.is_active &&
 552                  (q->properties.type == KFD_QUEUE_TYPE_COMPUTE ||
 553                   q->properties.type == KFD_QUEUE_TYPE_SDMA ||
 554                   q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI)) {
 555                 if (WARN(q->process->mm != current->mm,
 556                          "should only run in user thread"))
 557                         retval = -EFAULT;
 558                 else
 559                         retval = mqd_mgr->load_mqd(mqd_mgr, q->mqd,
 560                                                    q->pipe, q->queue,
 561                                                    &q->properties, current->mm);
 562         }
 563
 564 out_unlock:
 565         dqm_unlock(dqm);
 566         return retval;
 567 }
 568
 569 static int evict_process_queues_nocpsch(struct device_queue_manager *dqm,
 570                                         struct qcm_process_device *qpd)
 571 {
 572         struct queue *q;
 573         struct mqd_manager *mqd_mgr;
 574         struct kfd_process_device *pdd;
 575         int retval, ret = 0;
 576
 577         dqm_lock(dqm);
 578         if (qpd->evicted++ > 0) /* already evicted, do nothing */
 579                 goto out;
 580
 581         pdd = qpd_to_pdd(qpd);
 582         pr_info_ratelimited("Evicting PASID %u queues\n",
 583                             pdd->process->pasid);
 584
 585         /* Mark all queues as evicted. Deactivate all active queues on
 586          * the qpd.
 587          */
 588         list_for_each_entry(q, &qpd->queues_list, list) {
 589                 q->properties.is_evicted = true;
 590                 if (!q->properties.is_active)
 591                         continue;
 592
 593                 mqd_mgr = dqm->mqd_mgrs[get_mqd_type_from_queue_type(
 594                                 q->properties.type)];
 595                 q->properties.is_active = false;
 596                 retval = mqd_mgr->destroy_mqd(mqd_mgr, q->mqd,
 597                                 KFD_PREEMPT_TYPE_WAVEFRONT_DRAIN,
 598                                 KFD_UNMAP_LATENCY_MS, q->pipe, q->queue);
 599                 if (retval && !ret)
 600                         /* Return the first error, but keep going to
 601                          * maintain a consistent eviction state
 602                          */
 603                         ret = retval;
 604                 dqm->queue_count--;
 605         }
 606
 607 out:
 608         dqm_unlock(dqm);
 609         return ret;
 610 }
 611
 612 static int evict_process_queues_cpsch(struct device_queue_manager *dqm,
 613                                       struct qcm_process_device *qpd)
 614 {
 615         struct queue *q;
 616         struct kfd_process_device *pdd;
 617         int retval = 0;
 618
 619         dqm_lock(dqm);
 620         if (qpd->evicted++ > 0) /* already evicted, do nothing */
 621                 goto out;
 622
 623         pdd = qpd_to_pdd(qpd);
 624         pr_info_ratelimited("Evicting PASID %u queues\n",
 625                             pdd->process->pasid);
 626
 627         /* Mark all queues as evicted. Deactivate all active queues on
 628          * the qpd.
 629          */
 630         list_for_each_entry(q, &qpd->queues_list, list) {
 631                 q->properties.is_evicted = true;
 632                 if (!q->properties.is_active)
 633                         continue;
 634
 635                 q->properties.is_active = false;
 636                 dqm->queue_count--;
 637         }
 638         retval = execute_queues_cpsch(dqm,
 639                                 qpd->is_debug ?
 640                                 KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES :
 641                                 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
 642
 643 out:
 644         dqm_unlock(dqm);
 645         return retval;
 646 }
 647
 648 static int restore_process_queues_nocpsch(struct device_queue_manager *dqm,
 649                                           struct qcm_process_device *qpd)
 650 {
 651         struct mm_struct *mm = NULL;
 652         struct queue *q;
 653         struct mqd_manager *mqd_mgr;
 654         struct kfd_process_device *pdd;
 655         uint64_t pd_base;
 656         int retval, ret = 0;
 657
 658         pdd = qpd_to_pdd(qpd);
 659         /* Retrieve PD base */
 660         pd_base = amdgpu_amdkfd_gpuvm_get_process_page_dir(pdd->vm);
 661
 662         dqm_lock(dqm);
 663         if (WARN_ON_ONCE(!qpd->evicted)) /* already restored, do nothing */
 664                 goto out;
 665         if (qpd->evicted > 1) { /* ref count still > 0, decrement & quit */
 666                 qpd->evicted--;
 667                 goto out;
 668         }
 669
 670         pr_info_ratelimited("Restoring PASID %u queues\n",
 671                             pdd->process->pasid);
 672
 673         /* Update PD Base in QPD */
 674         qpd->page_table_base = pd_base;
 675         pr_debug("Updated PD address to 0x%llx\n", pd_base);
 676
 677         if (!list_empty(&qpd->queues_list)) {
 678                 dqm->dev->kfd2kgd->set_vm_context_page_table_base(
 679                                 dqm->dev->kgd,
 680                                 qpd->vmid,
 681                                 qpd->page_table_base);
 682                 kfd_flush_tlb(pdd);
 683         }
 684
 685         /* Take a safe reference to the mm_struct, which may otherwise
 686          * disappear even while the kfd_process is still referenced.
 687          */
 688         mm = get_task_mm(pdd->process->lead_thread);
 689         if (!mm) {
 690                 ret = -EFAULT;
 691                 goto out;
 692         }
 693
 694         /* Remove the eviction flags. Activate queues that are not
 695          * inactive for other reasons.
 696          */
 697         list_for_each_entry(q, &qpd->queues_list, list) {
 698                 q->properties.is_evicted = false;
 699                 if (!QUEUE_IS_ACTIVE(q->properties))
 700                         continue;
 701
 702                 mqd_mgr = dqm->mqd_mgrs[get_mqd_type_from_queue_type(
 703                                 q->properties.type)];
 704                 q->properties.is_active = true;
 705                 retval = mqd_mgr->load_mqd(mqd_mgr, q->mqd, q->pipe,
 706                                        q->queue, &q->properties, mm);
 707                 if (retval && !ret)
 708                         /* Return the first error, but keep going to
 709                          * maintain a consistent eviction state
 710                          */
 711                         ret = retval;
 712                 dqm->queue_count++;
 713         }
 714         qpd->evicted = 0;
 715 out:
 716         if (mm)
 717                 mmput(mm);
 718         dqm_unlock(dqm);
 719         return ret;
 720 }
 721
 722 static int restore_process_queues_cpsch(struct device_queue_manager *dqm,
 723                                         struct qcm_process_device *qpd)
 724 {
 725         struct queue *q;
 726         struct kfd_process_device *pdd;
 727         uint64_t pd_base;
 728         int retval = 0;
 729
 730         pdd = qpd_to_pdd(qpd);
 731         /* Retrieve PD base */
 732         pd_base = amdgpu_amdkfd_gpuvm_get_process_page_dir(pdd->vm);
 733
 734         dqm_lock(dqm);
 735         if (WARN_ON_ONCE(!qpd->evicted)) /* already restored, do nothing */
 736                 goto out;
 737         if (qpd->evicted > 1) { /* ref count still > 0, decrement & quit */
 738                 qpd->evicted--;
 739                 goto out;
 740         }
 741
 742         pr_info_ratelimited("Restoring PASID %u queues\n",
 743                             pdd->process->pasid);
 744
 745         /* Update PD Base in QPD */
 746         qpd->page_table_base = pd_base;
 747         pr_debug("Updated PD address to 0x%llx\n", pd_base);
 748
 749         /* activate all active queues on the qpd */
 750         list_for_each_entry(q, &qpd->queues_list, list) {
 751                 q->properties.is_evicted = false;
 752                 if (!QUEUE_IS_ACTIVE(q->properties))
 753                         continue;
 754
 755                 q->properties.is_active = true;
 756                 dqm->queue_count++;
 757         }
 758         retval = execute_queues_cpsch(dqm,
 759                                 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
 760         qpd->evicted = 0;
 761 out:
 762         dqm_unlock(dqm);
 763         return retval;
 764 }
 765
 766 static int register_process(struct device_queue_manager *dqm,
 767                                         struct qcm_process_device *qpd)
 768 {
 769         struct device_process_node *n;
 770         struct kfd_process_device *pdd;
 771         uint64_t pd_base;
 772         int retval;
 773
 774         n = kzalloc(sizeof(*n), GFP_KERNEL);
 775         if (!n)
 776                 return -ENOMEM;
 777
 778         n->qpd = qpd;
 779
 780         pdd = qpd_to_pdd(qpd);
 781         /* Retrieve PD base */
 782         pd_base = amdgpu_amdkfd_gpuvm_get_process_page_dir(pdd->vm);
 783
 784         dqm_lock(dqm);
 785         list_add(&n->list, &dqm->queues);
 786
 787         /* Update PD Base in QPD */
 788         qpd->page_table_base = pd_base;
 789         pr_debug("Updated PD address to 0x%llx\n", pd_base);
 790
 791         retval = dqm->asic_ops.update_qpd(dqm, qpd);
 792
 793         dqm->processes_count++;
 794
 795         dqm_unlock(dqm);
 796
 797         /* Outside the DQM lock because under the DQM lock we can't do
 798          * reclaim or take other locks that others hold while reclaiming.
 799          */
 800         kfd_inc_compute_active(dqm->dev);
 801
 802         return retval;
 803 }
 804
 805 static int unregister_process(struct device_queue_manager *dqm,
 806                                         struct qcm_process_device *qpd)
 807 {
 808         int retval;
 809         struct device_process_node *cur, *next;
 810
 811         pr_debug("qpd->queues_list is %s\n",
 812                         list_empty(&qpd->queues_list) ? "empty" : "not empty");
 813
 814         retval = 0;
 815         dqm_lock(dqm);
 816
 817         list_for_each_entry_safe(cur, next, &dqm->queues, list) {
 818                 if (qpd == cur->qpd) {
 819                         list_del(&cur->list);
 820                         kfree(cur);
 821                         dqm->processes_count--;
 822                         goto out;
 823                 }
 824         }
 825         /* qpd not found in dqm list */
 826         retval = 1;
 827 out:
 828         dqm_unlock(dqm);
 829
 830         /* Outside the DQM lock because under the DQM lock we can't do
 831          * reclaim or take other locks that others hold while reclaiming.
 832          */
 833         if (!retval)
 834                 kfd_dec_compute_active(dqm->dev);
 835
 836         return retval;
 837 }
 838
 839 static int
 840 set_pasid_vmid_mapping(struct device_queue_manager *dqm, unsigned int pasid,
 841                         unsigned int vmid)
 842 {
 843         return dqm->dev->kfd2kgd->set_pasid_vmid_mapping(
 844                                                 dqm->dev->kgd, pasid, vmid);
 845 }
 846
 847 static void init_interrupts(struct device_queue_manager *dqm)
 848 {
 849         unsigned int i;
 850
 851         for (i = 0 ; i < get_pipes_per_mec(dqm) ; i++)
 852                 if (is_pipe_enabled(dqm, 0, i))
 853                         dqm->dev->kfd2kgd->init_interrupts(dqm->dev->kgd, i);
 854 }
 855
 856 static int initialize_nocpsch(struct device_queue_manager *dqm)
 857 {
 858         int pipe, queue;
 859
 860         pr_debug("num of pipes: %d\n", get_pipes_per_mec(dqm));
 861
 862         dqm->allocated_queues = kcalloc(get_pipes_per_mec(dqm),
 863                                         sizeof(unsigned int), GFP_KERNEL);
 864         if (!dqm->allocated_queues)
 865                 return -ENOMEM;
 866
 867         mutex_init(&dqm->lock_hidden);
 868         INIT_LIST_HEAD(&dqm->queues);
 869         dqm->queue_count = dqm->next_pipe_to_allocate = 0;
 870         dqm->sdma_queue_count = 0;
 871         dqm->xgmi_sdma_queue_count = 0;
 872
 873         for (pipe = 0; pipe < get_pipes_per_mec(dqm); pipe++) {
 874                 int pipe_offset = pipe * get_queues_per_pipe(dqm);
 875
 876                 for (queue = 0; queue < get_queues_per_pipe(dqm); queue++)
 877                         if (test_bit(pipe_offset + queue,
 878                                      dqm->dev->shared_resources.queue_bitmap))
 879                                 dqm->allocated_queues[pipe] |= 1 << queue;
 880         }
 881
 882         dqm->vmid_bitmap = (1 << dqm->dev->vm_info.vmid_num_kfd) - 1;
 883         dqm->sdma_bitmap = (1ULL << get_num_sdma_queues(dqm)) - 1;
 884         dqm->xgmi_sdma_bitmap = (1ULL << get_num_xgmi_sdma_queues(dqm)) - 1;
 885
 886         return 0;
 887 }
 888
 889 static void uninitialize(struct device_queue_manager *dqm)
 890 {
 891         int i;
 892
 893         WARN_ON(dqm->queue_count > 0 || dqm->processes_count > 0);
 894
 895         kfree(dqm->allocated_queues);
 896         for (i = 0 ; i < KFD_MQD_TYPE_MAX ; i++)
 897                 kfree(dqm->mqd_mgrs[i]);
 898         mutex_destroy(&dqm->lock_hidden);
 899         kfd_gtt_sa_free(dqm->dev, dqm->pipeline_mem);
 900 }
 901
 902 static int start_nocpsch(struct device_queue_manager *dqm)
 903 {
 904         init_interrupts(dqm);
 905         return pm_init(&dqm->packets, dqm);
 906 }
 907
 908 static int stop_nocpsch(struct device_queue_manager *dqm)
 909 {
 910         pm_uninit(&dqm->packets);
 911         return 0;
 912 }
 913
 914 static int allocate_sdma_queue(struct device_queue_manager *dqm,
 915                                 struct queue *q)
 916 {
 917         int bit;
 918
 919         if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
 920                 if (dqm->sdma_bitmap == 0)
 921                         return -ENOMEM;
 922                 bit = __ffs64(dqm->sdma_bitmap);
 923                 dqm->sdma_bitmap &= ~(1ULL << bit);
 924                 q->sdma_id = bit;
 925                 q->properties.sdma_engine_id = q->sdma_id %
 926                                 get_num_sdma_engines(dqm);
 927                 q->properties.sdma_queue_id = q->sdma_id /
 928                                 get_num_sdma_engines(dqm);
 929         } else if (q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI) {
 930                 if (dqm->xgmi_sdma_bitmap == 0)
 931                         return -ENOMEM;
 932                 bit = __ffs64(dqm->xgmi_sdma_bitmap);
 933                 dqm->xgmi_sdma_bitmap &= ~(1ULL << bit);
 934                 q->sdma_id = bit;
 935                 /* sdma_engine_id is sdma id including
 936                  * both PCIe-optimized SDMAs and XGMI-
 937                  * optimized SDMAs. The calculation below
 938                  * assumes the first N engines are always
 939                  * PCIe-optimized ones
 940                  */
 941                 q->properties.sdma_engine_id = get_num_sdma_engines(dqm) +
 942                                 q->sdma_id % get_num_xgmi_sdma_engines(dqm);
 943                 q->properties.sdma_queue_id = q->sdma_id /
 944                                 get_num_xgmi_sdma_engines(dqm);
 945         }
 946
 947         pr_debug("SDMA engine id: %d\n", q->properties.sdma_engine_id);
 948         pr_debug("SDMA queue id: %d\n", q->properties.sdma_queue_id);
 949
 950         return 0;
 951 }
 952
 953 static void deallocate_sdma_queue(struct device_queue_manager *dqm,
 954                                 struct queue *q)
 955 {
 956         if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
 957                 if (q->sdma_id >= get_num_sdma_queues(dqm))
 958                         return;
 959                 dqm->sdma_bitmap |= (1ULL << q->sdma_id);
 960         } else if (q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI) {
 961                 if (q->sdma_id >= get_num_xgmi_sdma_queues(dqm))
 962                         return;
 963                 dqm->xgmi_sdma_bitmap |= (1ULL << q->sdma_id);
 964         }
 965 }
 966
 967 /*
 968  * Device Queue Manager implementation for cp scheduler
 969  */
 970
 971 static int set_sched_resources(struct device_queue_manager *dqm)
 972 {
 973         int i, mec;
 974         struct scheduling_resources res;
 975
 976         res.vmid_mask = dqm->dev->shared_resources.compute_vmid_bitmap;
 977
 978         res.queue_mask = 0;
 979         for (i = 0; i < KGD_MAX_QUEUES; ++i) {
 980                 mec = (i / dqm->dev->shared_resources.num_queue_per_pipe)
 981                         / dqm->dev->shared_resources.num_pipe_per_mec;
 982
 983                 if (!test_bit(i, dqm->dev->shared_resources.queue_bitmap))
 984                         continue;
 985
 986                 /* only acquire queues from the first MEC */
 987                 if (mec > 0)
 988                         continue;
 989
 990                 /* This situation may be hit in the future if a new HW
 991                  * generation exposes more than 64 queues. If so, the
 992                  * definition of res.queue_mask needs updating
 993                  */
 994                 if (WARN_ON(i >= (sizeof(res.queue_mask)*8))) {
 995                         pr_err("Invalid queue enabled by amdgpu: %d\n", i);
 996                         break;
 997                 }
 998
 999                 res.queue_mask |= (1ull << i);
1000         }
1001         res.gws_mask = ~0ull;
1002         res.oac_mask = res.gds_heap_base = res.gds_heap_size = 0;
1003
1004         pr_debug("Scheduling resources:\n"
1005                         "vmid mask: 0x%8X\n"
1006                         "queue mask: 0x%8llX\n",
1007                         res.vmid_mask, res.queue_mask);
1008
1009         return pm_send_set_resources(&dqm->packets, &res);
1010 }
1011
1012 static int initialize_cpsch(struct device_queue_manager *dqm)
1013 {
1014         pr_debug("num of pipes: %d\n", get_pipes_per_mec(dqm));
1015
1016         mutex_init(&dqm->lock_hidden);
1017         INIT_LIST_HEAD(&dqm->queues);
1018         dqm->queue_count = dqm->processes_count = 0;
1019         dqm->sdma_queue_count = 0;
1020         dqm->xgmi_sdma_queue_count = 0;
1021         dqm->active_runlist = false;
1022         dqm->sdma_bitmap = (1ULL << get_num_sdma_queues(dqm)) - 1;
1023         dqm->xgmi_sdma_bitmap = (1ULL << get_num_xgmi_sdma_queues(dqm)) - 1;
1024
1025         INIT_WORK(&dqm->hw_exception_work, kfd_process_hw_exception);
1026
1027         return 0;
1028 }
1029
1030 static int start_cpsch(struct device_queue_manager *dqm)
1031 {
1032         int retval;
1033
1034         retval = 0;
1035
1036         retval = pm_init(&dqm->packets, dqm);
1037         if (retval)
1038                 goto fail_packet_manager_init;
1039
1040         retval = set_sched_resources(dqm);
1041         if (retval)
1042                 goto fail_set_sched_resources;
1043
1044         pr_debug("Allocating fence memory\n");
1045
1046         /* allocate fence memory on the gart */
1047         retval = kfd_gtt_sa_allocate(dqm->dev, sizeof(*dqm->fence_addr),
1048                                         &dqm->fence_mem);
1049
1050         if (retval)
1051                 goto fail_allocate_vidmem;
1052
1053         dqm->fence_addr = dqm->fence_mem->cpu_ptr;
1054         dqm->fence_gpu_addr = dqm->fence_mem->gpu_addr;
1055
1056         init_interrupts(dqm);
1057
1058         dqm_lock(dqm);
1059         /* clear hang status when driver try to start the hw scheduler */
1060         dqm->is_hws_hang = false;
1061         execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
1062         dqm_unlock(dqm);
1063
1064         return 0;
1065 fail_allocate_vidmem:
1066 fail_set_sched_resources:
1067         pm_uninit(&dqm->packets);
1068 fail_packet_manager_init:
1069         return retval;
1070 }
1071
1072 static int stop_cpsch(struct device_queue_manager *dqm)
1073 {
1074         dqm_lock(dqm);
1075         unmap_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 0);
1076         dqm_unlock(dqm);
1077
1078         kfd_gtt_sa_free(dqm->dev, dqm->fence_mem);
1079         pm_uninit(&dqm->packets);
1080
1081         return 0;
1082 }
1083
1084 static int create_kernel_queue_cpsch(struct device_queue_manager *dqm,
1085                                         struct kernel_queue *kq,
1086                                         struct qcm_process_device *qpd)
1087 {
1088         dqm_lock(dqm);
1089         if (dqm->total_queue_count >= max_num_of_queues_per_device) {
1090                 pr_warn("Can't create new kernel queue because %d queues were already created\n",
1091                                 dqm->total_queue_count);
1092                 dqm_unlock(dqm);
1093                 return -EPERM;
1094         }
1095
1096         /*
1097          * Unconditionally increment this counter, regardless of the queue's
1098          * type or whether the queue is active.
1099          */
1100         dqm->total_queue_count++;
1101         pr_debug("Total of %d queues are accountable so far\n",
1102                         dqm->total_queue_count);
1103
1104         list_add(&kq->list, &qpd->priv_queue_list);
1105         dqm->queue_count++;
1106         qpd->is_debug = true;
1107         execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
1108         dqm_unlock(dqm);
1109
1110         return 0;
1111 }
1112
1113 static void destroy_kernel_queue_cpsch(struct device_queue_manager *dqm,
1114                                         struct kernel_queue *kq,
1115                                         struct qcm_process_device *qpd)
1116 {
1117         dqm_lock(dqm);
1118         list_del(&kq->list);
1119         dqm->queue_count--;
1120         qpd->is_debug = false;
1121         execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 0);
1122         /*
1123          * Unconditionally decrement this counter, regardless of the queue's
1124          * type.
1125          */
1126         dqm->total_queue_count--;
1127         pr_debug("Total of %d queues are accountable so far\n",
1128                         dqm->total_queue_count);
1129         dqm_unlock(dqm);
1130 }
1131
1132 static int create_queue_cpsch(struct device_queue_manager *dqm, struct queue *q,
1133                         struct qcm_process_device *qpd)
1134 {
1135         int retval;
1136         struct mqd_manager *mqd_mgr;
1137
1138         if (dqm->total_queue_count >= max_num_of_queues_per_device) {
1139                 pr_warn("Can't create new usermode queue because %d queues were already created\n",
1140                                 dqm->total_queue_count);
1141                 retval = -EPERM;
1142                 goto out;
1143         }
1144
1145         if (q->properties.type == KFD_QUEUE_TYPE_SDMA ||
1146                 q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI) {
1147                 dqm_lock(dqm);
1148                 retval = allocate_sdma_queue(dqm, q);
1149                 dqm_unlock(dqm);
1150                 if (retval)
1151                         goto out;
1152         }
1153
1154         retval = allocate_doorbell(qpd, q);
1155         if (retval)
1156                 goto out_deallocate_sdma_queue;
1157
1158         mqd_mgr = dqm->mqd_mgrs[get_mqd_type_from_queue_type(
1159                         q->properties.type)];
1160
1161         if (q->properties.type == KFD_QUEUE_TYPE_SDMA ||
1162                 q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI)
1163                 dqm->asic_ops.init_sdma_vm(dqm, q, qpd);
1164         q->properties.tba_addr = qpd->tba_addr;
1165         q->properties.tma_addr = qpd->tma_addr;
1166         q->mqd_mem_obj = mqd_mgr->allocate_mqd(mqd_mgr->dev, &q->properties);
1167         if (!q->mqd_mem_obj) {
1168                 retval = -ENOMEM;
1169                 goto out_deallocate_doorbell;
1170         }
1171
1172         dqm_lock(dqm);
1173         /*
1174          * Eviction state logic: mark all queues as evicted, even ones
1175          * not currently active. Restoring inactive queues later only
1176          * updates the is_evicted flag but is a no-op otherwise.
1177          */
1178         q->properties.is_evicted = !!qpd->evicted;
1179         mqd_mgr->init_mqd(mqd_mgr, &q->mqd, q->mqd_mem_obj,
1180                                 &q->gart_mqd_addr, &q->properties);
1181
1182         list_add(&q->list, &qpd->queues_list);
1183         qpd->queue_count++;
1184         if (q->properties.is_active) {
1185                 dqm->queue_count++;
1186                 retval = execute_queues_cpsch(dqm,
1187                                 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
1188         }
1189
1190         if (q->properties.type == KFD_QUEUE_TYPE_SDMA)
1191                 dqm->sdma_queue_count++;
1192         else if (q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI)
1193                 dqm->xgmi_sdma_queue_count++;
1194         /*
1195          * Unconditionally increment this counter, regardless of the queue's
1196          * type or whether the queue is active.
1197          */
1198         dqm->total_queue_count++;
1199
1200         pr_debug("Total of %d queues are accountable so far\n",
1201                         dqm->total_queue_count);
1202
1203         dqm_unlock(dqm);
1204         return retval;
1205
1206 out_deallocate_doorbell:
1207         deallocate_doorbell(qpd, q);
1208 out_deallocate_sdma_queue:
1209         if (q->properties.type == KFD_QUEUE_TYPE_SDMA ||
1210                 q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI) {
1211                 dqm_lock(dqm);
1212                 deallocate_sdma_queue(dqm, q);
1213                 dqm_unlock(dqm);
1214         }
1215 out:
1216         return retval;
1217 }
1218
1219 int amdkfd_fence_wait_timeout(unsigned int *fence_addr,
1220                                 unsigned int fence_value,
1221                                 unsigned int timeout_ms)
1222 {
1223         unsigned long end_jiffies = msecs_to_jiffies(timeout_ms) + jiffies;
1224
1225         while (*fence_addr != fence_value) {
1226                 if (time_after(jiffies, end_jiffies)) {
1227                         pr_err("qcm fence wait loop timeout expired\n");
1228                         /* In HWS case, this is used to halt the driver thread
1229                          * in order not to mess up CP states before doing
1230                          * scandumps for FW debugging.
1231                          */
1232                         while (halt_if_hws_hang)
1233                                 schedule();
1234
1235                         return -ETIME;
1236                 }
1237                 schedule();
1238         }
1239
1240         return 0;
1241 }
1242
1243 static int unmap_sdma_queues(struct device_queue_manager *dqm)
1244 {
1245         int i, retval = 0;
1246
1247         for (i = 0; i < dqm->dev->device_info->num_sdma_engines +
1248                 dqm->dev->device_info->num_xgmi_sdma_engines; i++) {
1249                 retval = pm_send_unmap_queue(&dqm->packets, KFD_QUEUE_TYPE_SDMA,
1250                         KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0, false, i);
1251                 if (retval)
1252                         return retval;
1253         }
1254         return retval;
1255 }
1256
1257 /* dqm->lock mutex has to be locked before calling this function */
1258 static int map_queues_cpsch(struct device_queue_manager *dqm)
1259 {
1260         int retval;
1261
1262         if (dqm->queue_count <= 0 || dqm->processes_count <= 0)
1263                 return 0;
1264
1265         if (dqm->active_runlist)
1266                 return 0;
1267
1268         retval = pm_send_runlist(&dqm->packets, &dqm->queues);
1269         pr_debug("%s sent runlist\n", __func__);
1270         if (retval) {
1271                 pr_err("failed to execute runlist\n");
1272                 return retval;
1273         }
1274         dqm->active_runlist = true;
1275
1276         return retval;
1277 }
1278
1279 /* dqm->lock mutex has to be locked before calling this function */
1280 static int unmap_queues_cpsch(struct device_queue_manager *dqm,
1281                                 enum kfd_unmap_queues_filter filter,
1282                                 uint32_t filter_param)
1283 {
1284         int retval = 0;
1285
1286         if (dqm->is_hws_hang)
1287                 return -EIO;
1288         if (!dqm->active_runlist)
1289                 return retval;
1290
1291         pr_debug("Before destroying queues, sdma queue count is : %u, xgmi sdma queue count is : %u\n",
1292                 dqm->sdma_queue_count, dqm->xgmi_sdma_queue_count);
1293
1294         if (dqm->sdma_queue_count > 0 || dqm->xgmi_sdma_queue_count)
1295                 unmap_sdma_queues(dqm);
1296
1297         retval = pm_send_unmap_queue(&dqm->packets, KFD_QUEUE_TYPE_COMPUTE,
1298                         filter, filter_param, false, 0);
1299         if (retval)
1300                 return retval;
1301
1302         *dqm->fence_addr = KFD_FENCE_INIT;
1303         pm_send_query_status(&dqm->packets, dqm->fence_gpu_addr,
1304                                 KFD_FENCE_COMPLETED);
1305         /* should be timed out */
1306         retval = amdkfd_fence_wait_timeout(dqm->fence_addr, KFD_FENCE_COMPLETED,
1307                                 queue_preemption_timeout_ms);
1308         if (retval)
1309                 return retval;
1310
1311         pm_release_ib(&dqm->packets);
1312         dqm->active_runlist = false;
1313
1314         return retval;
1315 }
1316
1317 /* dqm->lock mutex has to be locked before calling this function */
1318 static int execute_queues_cpsch(struct device_queue_manager *dqm,
1319                                 enum kfd_unmap_queues_filter filter,
1320                                 uint32_t filter_param)
1321 {
1322         int retval;
1323
1324         if (dqm->is_hws_hang)
1325                 return -EIO;
1326         retval = unmap_queues_cpsch(dqm, filter, filter_param);
1327         if (retval) {
1328                 pr_err("The cp might be in an unrecoverable state due to an unsuccessful queues preemption\n");
1329                 dqm->is_hws_hang = true;
1330                 schedule_work(&dqm->hw_exception_work);
1331                 return retval;
1332         }
1333
1334         return map_queues_cpsch(dqm);
1335 }
1336
1337 static int destroy_queue_cpsch(struct device_queue_manager *dqm,
1338                                 struct qcm_process_device *qpd,
1339                                 struct queue *q)
1340 {
1341         int retval;
1342         struct mqd_manager *mqd_mgr;
1343
1344         retval = 0;
1345
1346         /* remove queue from list to prevent rescheduling after preemption */
1347         dqm_lock(dqm);
1348
1349         if (qpd->is_debug) {
1350                 /*
1351                  * error, currently we do not allow to destroy a queue
1352                  * of a currently debugged process
1353                  */
1354                 retval = -EBUSY;
1355                 goto failed_try_destroy_debugged_queue;
1356
1357         }
1358
1359         mqd_mgr = dqm->mqd_mgrs[get_mqd_type_from_queue_type(
1360                         q->properties.type)];
1361
1362         deallocate_doorbell(qpd, q);
1363
1364         if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
1365                 dqm->sdma_queue_count--;
1366                 deallocate_sdma_queue(dqm, q);
1367         } else if (q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI) {
1368                 dqm->xgmi_sdma_queue_count--;
1369                 deallocate_sdma_queue(dqm, q);
1370         }
1371
1372         list_del(&q->list);
1373         qpd->queue_count--;
1374         if (q->properties.is_active) {
1375                 dqm->queue_count--;
1376                 retval = execute_queues_cpsch(dqm,
1377                                 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES, 0);
1378                 if (retval == -ETIME)
1379                         qpd->reset_wavefronts = true;
1380         }
1381
1382         /*
1383          * Unconditionally decrement this counter, regardless of the queue's
1384          * type
1385          */
1386         dqm->total_queue_count--;
1387         pr_debug("Total of %d queues are accountable so far\n",
1388                         dqm->total_queue_count);
1389
1390         dqm_unlock(dqm);
1391
1392         /* Do free_mqd after dqm_unlock(dqm) to avoid circular locking */
1393         mqd_mgr->free_mqd(mqd_mgr, q->mqd, q->mqd_mem_obj);
1394
1395         return retval;
1396
1397 failed_try_destroy_debugged_queue:
1398
1399         dqm_unlock(dqm);
1400         return retval;
1401 }
1402
1403 /*
1404  * Low bits must be 0000/FFFF as required by HW, high bits must be 0 to
1405  * stay in user mode.
1406  */
1407 #define APE1_FIXED_BITS_MASK 0xFFFF80000000FFFFULL
1408 /* APE1 limit is inclusive and 64K aligned. */
1409 #define APE1_LIMIT_ALIGNMENT 0xFFFF
1410
1411 static bool set_cache_memory_policy(struct device_queue_manager *dqm,
1412                                    struct qcm_process_device *qpd,
1413                                    enum cache_policy default_policy,
1414                                    enum cache_policy alternate_policy,
1415                                    void __user *alternate_aperture_base,
1416                                    uint64_t alternate_aperture_size)
1417 {
1418         bool retval = true;
1419
1420         if (!dqm->asic_ops.set_cache_memory_policy)
1421                 return retval;
1422
1423         dqm_lock(dqm);
1424
1425         if (alternate_aperture_size == 0) {
1426                 /* base > limit disables APE1 */
1427                 qpd->sh_mem_ape1_base = 1;
1428                 qpd->sh_mem_ape1_limit = 0;
1429         } else {
1430                 /*
1431                  * In FSA64, APE1_Base[63:0] = { 16{SH_MEM_APE1_BASE[31]},
1432                  *                      SH_MEM_APE1_BASE[31:0], 0x0000 }
1433                  * APE1_Limit[63:0] = { 16{SH_MEM_APE1_LIMIT[31]},
1434                  *                      SH_MEM_APE1_LIMIT[31:0], 0xFFFF }
1435                  * Verify that the base and size parameters can be
1436                  * represented in this format and convert them.
1437                  * Additionally restrict APE1 to user-mode addresses.
1438                  */
1439
1440                 uint64_t base = (uintptr_t)alternate_aperture_base;
1441                 uint64_t limit = base + alternate_aperture_size - 1;
1442
1443                 if (limit <= base || (base & APE1_FIXED_BITS_MASK) != 0 ||
1444                    (limit & APE1_FIXED_BITS_MASK) != APE1_LIMIT_ALIGNMENT) {
1445                         retval = false;
1446                         goto out;
1447                 }
1448
1449                 qpd->sh_mem_ape1_base = base >> 16;
1450                 qpd->sh_mem_ape1_limit = limit >> 16;
1451         }
1452
1453         retval = dqm->asic_ops.set_cache_memory_policy(
1454                         dqm,
1455                         qpd,
1456                         default_policy,
1457                         alternate_policy,
1458                         alternate_aperture_base,
1459                         alternate_aperture_size);
1460
1461         if ((dqm->sched_policy == KFD_SCHED_POLICY_NO_HWS) && (qpd->vmid != 0))
1462                 program_sh_mem_settings(dqm, qpd);
1463
1464         pr_debug("sh_mem_config: 0x%x, ape1_base: 0x%x, ape1_limit: 0x%x\n",
1465                 qpd->sh_mem_config, qpd->sh_mem_ape1_base,
1466                 qpd->sh_mem_ape1_limit);
1467
1468 out:
1469         dqm_unlock(dqm);
1470         return retval;
1471 }
1472
1473 static int set_trap_handler(struct device_queue_manager *dqm,
1474                                 struct qcm_process_device *qpd,
1475                                 uint64_t tba_addr,
1476                                 uint64_t tma_addr)
1477 {
1478         uint64_t *tma;
1479
1480         if (dqm->dev->cwsr_enabled) {
1481                 /* Jump from CWSR trap handler to user trap */
1482                 tma = (uint64_t *)(qpd->cwsr_kaddr + KFD_CWSR_TMA_OFFSET);
1483                 tma[0] = tba_addr;
1484                 tma[1] = tma_addr;
1485         } else {
1486                 qpd->tba_addr = tba_addr;
1487                 qpd->tma_addr = tma_addr;
1488         }
1489
1490         return 0;
1491 }
1492
1493 static int process_termination_nocpsch(struct device_queue_manager *dqm,
1494                 struct qcm_process_device *qpd)
1495 {
1496         struct queue *q, *next;
1497         struct device_process_node *cur, *next_dpn;
1498         int retval = 0;
1499         bool found = false;
1500
1501         dqm_lock(dqm);
1502
1503         /* Clear all user mode queues */
1504         list_for_each_entry_safe(q, next, &qpd->queues_list, list) {
1505                 int ret;
1506
1507                 ret = destroy_queue_nocpsch_locked(dqm, qpd, q);
1508                 if (ret)
1509                         retval = ret;
1510         }
1511
1512         /* Unregister process */
1513         list_for_each_entry_safe(cur, next_dpn, &dqm->queues, list) {
1514                 if (qpd == cur->qpd) {
1515                         list_del(&cur->list);
1516                         kfree(cur);
1517                         dqm->processes_count--;
1518                         found = true;
1519                         break;
1520                 }
1521         }
1522
1523         dqm_unlock(dqm);
1524
1525         /* Outside the DQM lock because under the DQM lock we can't do
1526          * reclaim or take other locks that others hold while reclaiming.
1527          */
1528         if (found)
1529                 kfd_dec_compute_active(dqm->dev);
1530
1531         return retval;
1532 }
1533
1534 static int get_wave_state(struct device_queue_manager *dqm,
1535                           struct queue *q,
1536                           void __user *ctl_stack,
1537                           u32 *ctl_stack_used_size,
1538                           u32 *save_area_used_size)
1539 {
1540         struct mqd_manager *mqd_mgr;
1541         int r;
1542
1543         dqm_lock(dqm);
1544
1545         if (q->properties.type != KFD_QUEUE_TYPE_COMPUTE ||
1546             q->properties.is_active || !q->device->cwsr_enabled) {
1547                 r = -EINVAL;
1548                 goto dqm_unlock;
1549         }
1550
1551         mqd_mgr = dqm->mqd_mgrs[KFD_MQD_TYPE_COMPUTE];
1552
1553         if (!mqd_mgr->get_wave_state) {
1554                 r = -EINVAL;
1555                 goto dqm_unlock;
1556         }
1557
1558         r = mqd_mgr->get_wave_state(mqd_mgr, q->mqd, ctl_stack,
1559                         ctl_stack_used_size, save_area_used_size);
1560
1561 dqm_unlock:
1562         dqm_unlock(dqm);
1563         return r;
1564 }
1565
1566 static int process_termination_cpsch(struct device_queue_manager *dqm,
1567                 struct qcm_process_device *qpd)
1568 {
1569         int retval;
1570         struct queue *q, *next;
1571         struct kernel_queue *kq, *kq_next;
1572         struct mqd_manager *mqd_mgr;
1573         struct device_process_node *cur, *next_dpn;
1574         enum kfd_unmap_queues_filter filter =
1575                 KFD_UNMAP_QUEUES_FILTER_DYNAMIC_QUEUES;
1576         bool found = false;
1577
1578         retval = 0;
1579
1580         dqm_lock(dqm);
1581
1582         /* Clean all kernel queues */
1583         list_for_each_entry_safe(kq, kq_next, &qpd->priv_queue_list, list) {
1584                 list_del(&kq->list);
1585                 dqm->queue_count--;
1586                 qpd->is_debug = false;
1587                 dqm->total_queue_count--;
1588                 filter = KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES;
1589         }
1590
1591         /* Clear all user mode queues */
1592         list_for_each_entry(q, &qpd->queues_list, list) {
1593                 if (q->properties.type == KFD_QUEUE_TYPE_SDMA) {
1594                         dqm->sdma_queue_count--;
1595                         deallocate_sdma_queue(dqm, q);
1596                 } else if (q->properties.type == KFD_QUEUE_TYPE_SDMA_XGMI) {
1597                         dqm->xgmi_sdma_queue_count--;
1598                         deallocate_sdma_queue(dqm, q);
1599                 }
1600
1601                 if (q->properties.is_active)
1602                         dqm->queue_count--;
1603
1604                 dqm->total_queue_count--;
1605         }
1606
1607         /* Unregister process */
1608         list_for_each_entry_safe(cur, next_dpn, &dqm->queues, list) {
1609                 if (qpd == cur->qpd) {
1610                         list_del(&cur->list);
1611                         kfree(cur);
1612                         dqm->processes_count--;
1613                         found = true;
1614                         break;
1615                 }
1616         }
1617
1618         retval = execute_queues_cpsch(dqm, filter, 0);
1619         if ((!dqm->is_hws_hang) && (retval || qpd->reset_wavefronts)) {
1620                 pr_warn("Resetting wave fronts (cpsch) on dev %p\n", dqm->dev);
1621                 dbgdev_wave_reset_wavefronts(dqm->dev, qpd->pqm->process);
1622                 qpd->reset_wavefronts = false;
1623         }
1624
1625         dqm_unlock(dqm);
1626
1627         /* Outside the DQM lock because under the DQM lock we can't do
1628          * reclaim or take other locks that others hold while reclaiming.
1629          */
1630         if (found)
1631                 kfd_dec_compute_active(dqm->dev);
1632
1633         /* Lastly, free mqd resources.
1634          * Do free_mqd() after dqm_unlock to avoid circular locking.
1635          */
1636         list_for_each_entry_safe(q, next, &qpd->queues_list, list) {
1637                 mqd_mgr = dqm->mqd_mgrs[get_mqd_type_from_queue_type(
1638                                 q->properties.type)];
1639                 list_del(&q->list);
1640                 qpd->queue_count--;
1641                 mqd_mgr->free_mqd(mqd_mgr, q->mqd, q->mqd_mem_obj);
1642         }
1643
1644         return retval;
1645 }
1646
1647 static int init_mqd_managers(struct device_queue_manager *dqm)
1648 {
1649         int i, j;
1650         struct mqd_manager *mqd_mgr;
1651
1652         for (i = 0; i < KFD_MQD_TYPE_MAX; i++) {
1653                 mqd_mgr = dqm->asic_ops.mqd_manager_init(i, dqm->dev);
1654                 if (!mqd_mgr) {
1655                         pr_err("mqd manager [%d] initialization failed\n", i);
1656                         goto out_free;
1657                 }
1658                 dqm->mqd_mgrs[i] = mqd_mgr;
1659         }
1660
1661         return 0;
1662
1663 out_free:
1664         for (j = 0; j < i; j++) {
1665                 kfree(dqm->mqd_mgrs[j]);
1666                 dqm->mqd_mgrs[j] = NULL;
1667         }
1668
1669         return -ENOMEM;
1670 }
1671
1672 /* Allocate one hiq mqd (HWS) and all SDMA mqd in a continuous trunk*/
1673 static int allocate_hiq_sdma_mqd(struct device_queue_manager *dqm)
1674 {
1675         int retval;
1676         struct kfd_dev *dev = dqm->dev;
1677         struct kfd_mem_obj *mem_obj = &dqm->hiq_sdma_mqd;
1678         uint32_t size = dqm->mqd_mgrs[KFD_MQD_TYPE_SDMA]->mqd_size *
1679                 dev->device_info->num_sdma_engines *
1680                 dev->device_info->num_sdma_queues_per_engine +
1681                 dqm->mqd_mgrs[KFD_MQD_TYPE_HIQ]->mqd_size;
1682
1683         retval = amdgpu_amdkfd_alloc_gtt_mem(dev->kgd, size,
1684                 &(mem_obj->gtt_mem), &(mem_obj->gpu_addr),
1685                 (void *)&(mem_obj->cpu_ptr), true);
1686
1687         return retval;
1688 }
1689
1690 struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev)
1691 {
1692         struct device_queue_manager *dqm;
1693
1694         pr_debug("Loading device queue manager\n");
1695
1696         dqm = kzalloc(sizeof(*dqm), GFP_KERNEL);
1697         if (!dqm)
1698                 return NULL;
1699
1700         switch (dev->device_info->asic_family) {
1701         /* HWS is not available on Hawaii. */
1702         case CHIP_HAWAII:
1703         /* HWS depends on CWSR for timely dequeue. CWSR is not
1704          * available on Tonga.
1705          *
1706          * FIXME: This argument also applies to Kaveri.
1707          */
1708         case CHIP_TONGA:
1709                 dqm->sched_policy = KFD_SCHED_POLICY_NO_HWS;
1710                 break;
1711         default:
1712                 dqm->sched_policy = sched_policy;
1713                 break;
1714         }
1715
1716         dqm->dev = dev;
1717         switch (dqm->sched_policy) {
1718         case KFD_SCHED_POLICY_HWS:
1719         case KFD_SCHED_POLICY_HWS_NO_OVERSUBSCRIPTION:
1720                 /* initialize dqm for cp scheduling */
1721                 dqm->ops.create_queue = create_queue_cpsch;
1722                 dqm->ops.initialize = initialize_cpsch;
1723                 dqm->ops.start = start_cpsch;
1724                 dqm->ops.stop = stop_cpsch;
1725                 dqm->ops.destroy_queue = destroy_queue_cpsch;
1726                 dqm->ops.update_queue = update_queue;
1727                 dqm->ops.register_process = register_process;
1728                 dqm->ops.unregister_process = unregister_process;
1729                 dqm->ops.uninitialize = uninitialize;
1730                 dqm->ops.create_kernel_queue = create_kernel_queue_cpsch;
1731                 dqm->ops.destroy_kernel_queue = destroy_kernel_queue_cpsch;
1732                 dqm->ops.set_cache_memory_policy = set_cache_memory_policy;
1733                 dqm->ops.set_trap_handler = set_trap_handler;
1734                 dqm->ops.process_termination = process_termination_cpsch;
1735                 dqm->ops.evict_process_queues = evict_process_queues_cpsch;
1736                 dqm->ops.restore_process_queues = restore_process_queues_cpsch;
1737                 dqm->ops.get_wave_state = get_wave_state;
1738                 break;
1739         case KFD_SCHED_POLICY_NO_HWS:
1740                 /* initialize dqm for no cp scheduling */
1741                 dqm->ops.start = start_nocpsch;
1742                 dqm->ops.stop = stop_nocpsch;
1743                 dqm->ops.create_queue = create_queue_nocpsch;
1744                 dqm->ops.destroy_queue = destroy_queue_nocpsch;
1745                 dqm->ops.update_queue = update_queue;
1746                 dqm->ops.register_process = register_process;
1747                 dqm->ops.unregister_process = unregister_process;
1748                 dqm->ops.initialize = initialize_nocpsch;
1749                 dqm->ops.uninitialize = uninitialize;
1750                 dqm->ops.set_cache_memory_policy = set_cache_memory_policy;
1751                 dqm->ops.set_trap_handler = set_trap_handler;
1752                 dqm->ops.process_termination = process_termination_nocpsch;
1753                 dqm->ops.evict_process_queues = evict_process_queues_nocpsch;
1754                 dqm->ops.restore_process_queues =
1755                         restore_process_queues_nocpsch;
1756                 dqm->ops.get_wave_state = get_wave_state;
1757                 break;
1758         default:
1759                 pr_err("Invalid scheduling policy %d\n", dqm->sched_policy);
1760                 goto out_free;
1761         }
1762
1763         switch (dev->device_info->asic_family) {
1764         case CHIP_CARRIZO:
1765                 device_queue_manager_init_vi(&dqm->asic_ops);
1766                 break;
1767
1768         case CHIP_KAVERI:
1769                 device_queue_manager_init_cik(&dqm->asic_ops);
1770                 break;
1771
1772         case CHIP_HAWAII:
1773                 device_queue_manager_init_cik_hawaii(&dqm->asic_ops);
1774                 break;
1775
1776         case CHIP_TONGA:
1777         case CHIP_FIJI:
1778         case CHIP_POLARIS10:
1779         case CHIP_POLARIS11:
1780         case CHIP_POLARIS12:
1781         case CHIP_VEGAM:
1782                 device_queue_manager_init_vi_tonga(&dqm->asic_ops);
1783                 break;
1784
1785         case CHIP_VEGA10:
1786         case CHIP_VEGA12:
1787         case CHIP_VEGA20:
1788         case CHIP_RAVEN:
1789                 device_queue_manager_init_v9(&dqm->asic_ops);
1790                 break;
1791         case CHIP_NAVI10:
1792                 device_queue_manager_init_v10_navi10(&dqm->asic_ops);
1793                 break;
1794         default:
1795                 WARN(1, "Unexpected ASIC family %u",
1796                      dev->device_info->asic_family);
1797                 goto out_free;
1798         }
1799
1800         if (init_mqd_managers(dqm))
1801                 goto out_free;
1802
1803         if (allocate_hiq_sdma_mqd(dqm)) {
1804                 pr_err("Failed to allocate hiq sdma mqd trunk buffer\n");
1805                 goto out_free;
1806         }
1807
1808         if (!dqm->ops.initialize(dqm))
1809                 return dqm;
1810
1811 out_free:
1812         kfree(dqm);
1813         return NULL;
1814 }
1815
1816 void deallocate_hiq_sdma_mqd(struct kfd_dev *dev, struct kfd_mem_obj *mqd)
1817 {
1818         WARN(!mqd, "No hiq sdma mqd trunk to free");
1819
1820         amdgpu_amdkfd_free_gtt_mem(dev->kgd, mqd->gtt_mem);
1821 }
1822
1823 void device_queue_manager_uninit(struct device_queue_manager *dqm)
1824 {
1825         dqm->ops.uninitialize(dqm);
1826         deallocate_hiq_sdma_mqd(dqm->dev, &dqm->hiq_sdma_mqd);
1827         kfree(dqm);
1828 }
1829
1830 int kfd_process_vm_fault(struct device_queue_manager *dqm,
1831                          unsigned int pasid)
1832 {
1833         struct kfd_process_device *pdd;
1834         struct kfd_process *p = kfd_lookup_process_by_pasid(pasid);
1835         int ret = 0;
1836
1837         if (!p)
1838                 return -EINVAL;
1839         pdd = kfd_get_process_device_data(dqm->dev, p);
1840         if (pdd)
1841                 ret = dqm->ops.evict_process_queues(dqm, &pdd->qpd);
1842         kfd_unref_process(p);
1843
1844         return ret;
1845 }
1846
1847 static void kfd_process_hw_exception(struct work_struct *work)
1848 {
1849         struct device_queue_manager *dqm = container_of(work,
1850                         struct device_queue_manager, hw_exception_work);
1851         amdgpu_amdkfd_gpu_reset(dqm->dev->kgd);
1852 }
1853
1854 #if defined(CONFIG_DEBUG_FS)
1855
1856 static void seq_reg_dump(struct seq_file *m,
1857                          uint32_t (*dump)[2], uint32_t n_regs)
1858 {
1859         uint32_t i, count;
1860
1861         for (i = 0, count = 0; i < n_regs; i++) {
1862                 if (count == 0 ||
1863                     dump[i-1][0] + sizeof(uint32_t) != dump[i][0]) {
1864                         seq_printf(m, "%s    %08x: %08x",
1865                                    i ? "\n" : "",
1866                                    dump[i][0], dump[i][1]);
1867                         count = 7;
1868                 } else {
1869                         seq_printf(m, " %08x", dump[i][1]);
1870                         count--;
1871                 }
1872         }
1873
1874         seq_puts(m, "\n");
1875 }
1876
1877 int dqm_debugfs_hqds(struct seq_file *m, void *data)
1878 {
1879         struct device_queue_manager *dqm = data;
1880         uint32_t (*dump)[2], n_regs;
1881         int pipe, queue;
1882         int r = 0;
1883
1884         r = dqm->dev->kfd2kgd->hqd_dump(dqm->dev->kgd,
1885                                         KFD_CIK_HIQ_PIPE, KFD_CIK_HIQ_QUEUE,
1886                                         &dump, &n_regs);
1887         if (!r) {
1888                 seq_printf(m, "  HIQ on MEC %d Pipe %d Queue %d\n",
1889                            KFD_CIK_HIQ_PIPE/get_pipes_per_mec(dqm)+1,
1890                            KFD_CIK_HIQ_PIPE%get_pipes_per_mec(dqm),
1891                            KFD_CIK_HIQ_QUEUE);
1892                 seq_reg_dump(m, dump, n_regs);
1893
1894                 kfree(dump);
1895         }
1896
1897         for (pipe = 0; pipe < get_pipes_per_mec(dqm); pipe++) {
1898                 int pipe_offset = pipe * get_queues_per_pipe(dqm);
1899
1900                 for (queue = 0; queue < get_queues_per_pipe(dqm); queue++) {
1901                         if (!test_bit(pipe_offset + queue,
1902                                       dqm->dev->shared_resources.queue_bitmap))
1903                                 continue;
1904
1905                         r = dqm->dev->kfd2kgd->hqd_dump(
1906                                 dqm->dev->kgd, pipe, queue, &dump, &n_regs);
1907                         if (r)
1908                                 break;
1909
1910                         seq_printf(m, "  CP Pipe %d, Queue %d\n",
1911                                   pipe, queue);
1912                         seq_reg_dump(m, dump, n_regs);
1913
1914                         kfree(dump);
1915                 }
1916         }
1917
1918         for (pipe = 0; pipe < get_num_sdma_engines(dqm); pipe++) {
1919                 for (queue = 0;
1920                      queue < dqm->dev->device_info->num_sdma_queues_per_engine;
1921                      queue++) {
1922                         r = dqm->dev->kfd2kgd->hqd_sdma_dump(
1923                                 dqm->dev->kgd, pipe, queue, &dump, &n_regs);
1924                         if (r)
1925                                 break;
1926
1927                         seq_printf(m, "  SDMA Engine %d, RLC %d\n",
1928                                   pipe, queue);
1929                         seq_reg_dump(m, dump, n_regs);
1930
1931                         kfree(dump);
1932                 }
1933         }
1934
1935         return r;
1936 }
1937
1938 int dqm_debugfs_execute_queues(struct device_queue_manager *dqm)
1939 {
1940         int r = 0;
1941
1942         dqm_lock(dqm);
1943         dqm->active_runlist = true;
1944         r = execute_queues_cpsch(dqm, KFD_UNMAP_QUEUES_FILTER_ALL_QUEUES, 0);
1945         dqm_unlock(dqm);
1946
1947         return r;
1948 }
1949
1950 #endif