2 * (C) Copyright 2012 Henrik Nordstrom <henrik@henriknordstrom.net>
4 * Based on earlier arch/arm/cpu/armv7/sunxi/gpio.c:
6 * (C) Copyright 2007-2011
7 * Allwinner Technology Co., Ltd. <www.allwinnertech.com>
8 * Tom Cubie <tangliang@allwinnertech.com>
10 * SPDX-License-Identifier: GPL-2.0+
18 #include <asm/arch/gpio.h>
21 #include <dm/device-internal.h>
22 #include <dt-bindings/gpio/gpio.h>
24 #define SUNXI_GPIOS_PER_BANK SUNXI_GPIO_A_NR
26 struct sunxi_gpio_platdata {
27 struct sunxi_gpio *regs;
28 const char *bank_name; /* Name of bank, e.g. "B" */
32 #ifndef CONFIG_DM_GPIO
33 static int sunxi_gpio_output(u32 pin, u32 val)
36 u32 bank = GPIO_BANK(pin);
37 u32 num = GPIO_NUM(pin);
38 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
40 dat = readl(&pio->dat);
46 writel(dat, &pio->dat);
51 static int sunxi_gpio_input(u32 pin)
54 u32 bank = GPIO_BANK(pin);
55 u32 num = GPIO_NUM(pin);
56 struct sunxi_gpio *pio = BANK_TO_GPIO(bank);
58 dat = readl(&pio->dat);
64 int gpio_request(unsigned gpio, const char *label)
69 int gpio_free(unsigned gpio)
74 int gpio_direction_input(unsigned gpio)
76 sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_INPUT);
81 int gpio_direction_output(unsigned gpio, int value)
83 sunxi_gpio_set_cfgpin(gpio, SUNXI_GPIO_OUTPUT);
85 return sunxi_gpio_output(gpio, value);
88 int gpio_get_value(unsigned gpio)
90 return sunxi_gpio_input(gpio);
93 int gpio_set_value(unsigned gpio, int value)
95 return sunxi_gpio_output(gpio, value);
98 int sunxi_name_to_gpio(const char *name)
101 int groupsize = 9 * 32;
105 if (*name == 'P' || *name == 'p')
108 group = *name - (*name > 'a' ? 'a' : 'A');
113 pin = simple_strtol(name, &eptr, 10);
116 if (pin < 0 || pin > groupsize || group >= 9)
118 return group * 32 + pin;
122 int sunxi_name_to_gpio_bank(const char *name)
126 if (*name == 'P' || *name == 'p')
129 group = *name - (*name > 'a' ? 'a' : 'A');
136 #ifdef CONFIG_DM_GPIO
137 /* TODO(sjg@chromium.org): Remove this function and use device tree */
138 int sunxi_name_to_gpio(const char *name)
142 #if !defined CONFIG_SPL_BUILD && defined CONFIG_AXP_GPIO
145 if (strcasecmp(name, "AXP0-VBUS-DETECT") == 0) {
146 sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d",
147 SUNXI_GPIO_AXP0_VBUS_DETECT);
149 } else if (strcasecmp(name, "AXP0-VBUS-ENABLE") == 0) {
150 sprintf(lookup, SUNXI_GPIO_AXP0_PREFIX "%d",
151 SUNXI_GPIO_AXP0_VBUS_ENABLE);
155 ret = gpio_lookup_name(name, NULL, NULL, &gpio);
157 return ret ? ret : gpio;
160 static int sunxi_gpio_direction_input(struct udevice *dev, unsigned offset)
162 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
164 sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_INPUT);
169 static int sunxi_gpio_direction_output(struct udevice *dev, unsigned offset,
172 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
173 u32 num = GPIO_NUM(offset);
175 sunxi_gpio_set_cfgbank(plat->regs, offset, SUNXI_GPIO_OUTPUT);
176 clrsetbits_le32(&plat->regs->dat, 1 << num, value ? (1 << num) : 0);
181 static int sunxi_gpio_get_value(struct udevice *dev, unsigned offset)
183 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
184 u32 num = GPIO_NUM(offset);
187 dat = readl(&plat->regs->dat);
193 static int sunxi_gpio_set_value(struct udevice *dev, unsigned offset,
196 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
197 u32 num = GPIO_NUM(offset);
199 clrsetbits_le32(&plat->regs->dat, 1 << num, value ? (1 << num) : 0);
203 static int sunxi_gpio_get_function(struct udevice *dev, unsigned offset)
205 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
208 func = sunxi_gpio_get_cfgbank(plat->regs, offset);
209 if (func == SUNXI_GPIO_OUTPUT)
211 else if (func == SUNXI_GPIO_INPUT)
217 static int sunxi_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
218 struct ofnode_phandle_args *args)
222 ret = device_get_child(dev, args->args[0], &desc->dev);
225 desc->offset = args->args[1];
226 desc->flags = args->args[2] & GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0;
231 static const struct dm_gpio_ops gpio_sunxi_ops = {
232 .direction_input = sunxi_gpio_direction_input,
233 .direction_output = sunxi_gpio_direction_output,
234 .get_value = sunxi_gpio_get_value,
235 .set_value = sunxi_gpio_set_value,
236 .get_function = sunxi_gpio_get_function,
237 .xlate = sunxi_gpio_xlate,
241 * Returns the name of a GPIO bank
243 * GPIO banks are named A, B, C, ...
245 * @bank: Bank number (0, 1..n-1)
246 * @return allocated string containing the name
248 static char *gpio_bank_name(int bank)
255 name[1] = 'A' + bank;
262 static int gpio_sunxi_probe(struct udevice *dev)
264 struct sunxi_gpio_platdata *plat = dev_get_platdata(dev);
265 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
267 /* Tell the uclass how many GPIOs we have */
269 uc_priv->gpio_count = plat->gpio_count;
270 uc_priv->bank_name = plat->bank_name;
276 struct sunxi_gpio_soc_data {
282 * We have a top-level GPIO device with no actual GPIOs. It has a child
283 * device for each Sunxi bank.
285 static int gpio_sunxi_bind(struct udevice *parent)
287 struct sunxi_gpio_soc_data *soc_data =
288 (struct sunxi_gpio_soc_data *)dev_get_driver_data(parent);
289 struct sunxi_gpio_platdata *plat = parent->platdata;
290 struct sunxi_gpio_reg *ctlr;
293 /* If this is a child device, there is nothing to do here */
297 ctlr = (struct sunxi_gpio_reg *)devfdt_get_addr(parent);
298 for (bank = 0; bank < soc_data->no_banks; bank++) {
299 struct sunxi_gpio_platdata *plat;
302 plat = calloc(1, sizeof(*plat));
305 plat->regs = &ctlr->gpio_bank[bank];
306 plat->bank_name = gpio_bank_name(soc_data->start + bank);
307 plat->gpio_count = SUNXI_GPIOS_PER_BANK;
309 ret = device_bind(parent, parent->driver,
310 plat->bank_name, plat, -1, &dev);
313 dev_set_of_offset(dev, dev_of_offset(parent));
319 static const struct sunxi_gpio_soc_data soc_data_a_all = {
321 .no_banks = SUNXI_GPIO_BANKS,
324 static const struct sunxi_gpio_soc_data soc_data_l_1 = {
329 static const struct sunxi_gpio_soc_data soc_data_l_2 = {
334 static const struct sunxi_gpio_soc_data soc_data_l_3 = {
339 #define ID(_compat_, _soc_data_) \
340 { .compatible = _compat_, .data = (ulong)&soc_data_##_soc_data_ }
342 static const struct udevice_id sunxi_gpio_ids[] = {
343 ID("allwinner,sun4i-a10-pinctrl", a_all),
344 ID("allwinner,sun5i-a10s-pinctrl", a_all),
345 ID("allwinner,sun5i-a13-pinctrl", a_all),
346 ID("allwinner,sun50i-h5-pinctrl", a_all),
347 ID("allwinner,sun6i-a31-pinctrl", a_all),
348 ID("allwinner,sun6i-a31s-pinctrl", a_all),
349 ID("allwinner,sun7i-a20-pinctrl", a_all),
350 ID("allwinner,sun8i-a23-pinctrl", a_all),
351 ID("allwinner,sun8i-a33-pinctrl", a_all),
352 ID("allwinner,sun8i-a83t-pinctrl", a_all),
353 ID("allwinner,sun8i-h3-pinctrl", a_all),
354 ID("allwinner,sun8i-r40-pinctrl", a_all),
355 ID("allwinner,sun8i-v3s-pinctrl", a_all),
356 ID("allwinner,sun9i-a80-pinctrl", a_all),
357 ID("allwinner,sun50i-a64-pinctrl", a_all),
358 ID("allwinner,sun6i-a31-r-pinctrl", l_2),
359 ID("allwinner,sun8i-a23-r-pinctrl", l_1),
360 ID("allwinner,sun8i-a83t-r-pinctrl", l_1),
361 ID("allwinner,sun8i-h3-r-pinctrl", l_1),
362 ID("allwinner,sun9i-a80-r-pinctrl", l_3),
363 ID("allwinner,sun50i-a64-r-pinctrl", l_1),
367 U_BOOT_DRIVER(gpio_sunxi) = {
368 .name = "gpio_sunxi",
370 .ops = &gpio_sunxi_ops,
371 .of_match = sunxi_gpio_ids,
372 .bind = gpio_sunxi_bind,
373 .probe = gpio_sunxi_probe,