2 * (C) Copyright 2015 Google, Inc
4 * (C) Copyright 2008-2014 Rockchip Electronics
5 * Peter, Software Engineering, <superpeter.cai@gmail.com>.
7 * SPDX-License-Identifier: GPL-2.0+
14 #include <asm/errno.h>
17 #include <asm/arch/clock.h>
18 #include <dm/pinctrl.h>
19 #include <dt-bindings/clock/rk3288-cru.h>
22 ROCKCHIP_GPIOS_PER_BANK = 32,
25 #define OFFSET_TO_BIT(bit) (1UL << (bit))
27 struct rockchip_gpio_priv {
28 struct rockchip_gpio_regs *regs;
29 struct udevice *pinctrl;
34 static int rockchip_gpio_direction_input(struct udevice *dev, unsigned offset)
36 struct rockchip_gpio_priv *priv = dev_get_priv(dev);
37 struct rockchip_gpio_regs *regs = priv->regs;
39 clrbits_le32(®s->swport_ddr, OFFSET_TO_BIT(offset));
44 static int rockchip_gpio_direction_output(struct udevice *dev, unsigned offset,
47 struct rockchip_gpio_priv *priv = dev_get_priv(dev);
48 struct rockchip_gpio_regs *regs = priv->regs;
49 int mask = OFFSET_TO_BIT(offset);
51 clrsetbits_le32(®s->swport_dr, mask, value ? mask : 0);
52 setbits_le32(®s->swport_ddr, mask);
57 static int rockchip_gpio_get_value(struct udevice *dev, unsigned offset)
59 struct rockchip_gpio_priv *priv = dev_get_priv(dev);
60 struct rockchip_gpio_regs *regs = priv->regs;
62 return readl(®s->ext_port) & OFFSET_TO_BIT(offset) ? 1 : 0;
65 static int rockchip_gpio_set_value(struct udevice *dev, unsigned offset,
68 struct rockchip_gpio_priv *priv = dev_get_priv(dev);
69 struct rockchip_gpio_regs *regs = priv->regs;
70 int mask = OFFSET_TO_BIT(offset);
72 clrsetbits_le32(®s->swport_dr, mask, value ? mask : 0);
77 static int rockchip_gpio_get_function(struct udevice *dev, unsigned offset)
79 #ifdef CONFIG_SPL_BUILD
82 struct rockchip_gpio_priv *priv = dev_get_priv(dev);
83 struct rockchip_gpio_regs *regs = priv->regs;
87 ret = pinctrl_get_gpio_mux(priv->pinctrl, priv->bank, offset);
91 /* If it's not 0, then it is not a GPIO */
94 is_output = readl(®s->swport_ddr) & OFFSET_TO_BIT(offset);
96 return is_output ? GPIOF_OUTPUT : GPIOF_INPUT;
100 static int rockchip_gpio_probe(struct udevice *dev)
102 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
103 struct rockchip_gpio_priv *priv = dev_get_priv(dev);
107 /* This only supports RK3288 at present */
108 priv->regs = (struct rockchip_gpio_regs *)dev_get_addr(dev);
109 ret = uclass_first_device_err(UCLASS_PINCTRL, &priv->pinctrl);
113 uc_priv->gpio_count = ROCKCHIP_GPIOS_PER_BANK;
114 end = strrchr(dev->name, '@');
115 priv->bank = trailing_strtoln(dev->name, end);
116 priv->name[0] = 'A' + priv->bank;
117 uc_priv->bank_name = priv->name;
122 static const struct dm_gpio_ops gpio_rockchip_ops = {
123 .direction_input = rockchip_gpio_direction_input,
124 .direction_output = rockchip_gpio_direction_output,
125 .get_value = rockchip_gpio_get_value,
126 .set_value = rockchip_gpio_set_value,
127 .get_function = rockchip_gpio_get_function,
130 static const struct udevice_id rockchip_gpio_ids[] = {
131 { .compatible = "rockchip,gpio-bank" },
135 U_BOOT_DRIVER(gpio_rockchip) = {
136 .name = "gpio_rockchip",
138 .of_match = rockchip_gpio_ids,
139 .ops = &gpio_rockchip_ops,
140 .priv_auto_alloc_size = sizeof(struct rockchip_gpio_priv),
141 .probe = rockchip_gpio_probe,