1 // SPDX-License-Identifier: GPL-2.0+
3 * Take linux kernel driver drivers/gpio/gpio-pca953x.c for reference.
5 * Copyright (C) 2016 Peng Fan <van.freenix@gmail.com>
11 * The driver's compatible table is borrowed from Linux Kernel,
12 * but now max supported gpio pins is 24 and only PCA953X_TYPE
13 * is supported. PCA957X_TYPE is not supported now.
14 * Also the Polarity Inversion feature is not supported now.
17 * 1. Support PCA957X_TYPE
18 * 2. Support 24 gpio pins
19 * 3. Support Polarity Inversion
30 #include <dt-bindings/gpio/gpio.h>
32 #define PCA953X_INPUT 0
33 #define PCA953X_OUTPUT 1
34 #define PCA953X_INVERT 2
35 #define PCA953X_DIRECTION 3
37 #define PCA_GPIO_MASK 0x00FF
38 #define PCA_INT 0x0100
39 #define PCA953X_TYPE 0x1000
40 #define PCA957X_TYPE 0x2000
41 #define PCA_TYPE_MASK 0xF000
42 #define PCA_CHIP_TYPE(x) ((x) & PCA_TYPE_MASK)
46 PCA953X_DIRECTION_OUT,
53 * struct pca953x_info - Data for pca953x
55 * @dev: udevice structure for the device
56 * @addr: i2c slave address
57 * @invert: Polarity inversion or not
58 * @gpio_count: the number of gpio pins that the device supports
59 * @chip_type: indicate the chip type,PCA953X or PCA957X
60 * @bank_count: the number of banks that the device supports
61 * @reg_output: array to hold the value of output registers
62 * @reg_direction: array to hold the value of direction registers
71 u8 reg_output[MAX_BANK];
72 u8 reg_direction[MAX_BANK];
75 static int pca953x_write_single(struct udevice *dev, int reg, u8 val,
78 struct pca953x_info *info = dev_get_platdata(dev);
79 int bank_shift = fls((info->gpio_count - 1) / BANK_SZ);
80 int off = offset / BANK_SZ;
83 ret = dm_i2c_write(dev, (reg << bank_shift) + off, &val, 1);
85 dev_err(dev, "%s error\n", __func__);
92 static int pca953x_read_single(struct udevice *dev, int reg, u8 *val,
95 struct pca953x_info *info = dev_get_platdata(dev);
96 int bank_shift = fls((info->gpio_count - 1) / BANK_SZ);
97 int off = offset / BANK_SZ;
101 ret = dm_i2c_read(dev, (reg << bank_shift) + off, &byte, 1);
103 dev_err(dev, "%s error\n", __func__);
112 static int pca953x_read_regs(struct udevice *dev, int reg, u8 *val)
114 struct pca953x_info *info = dev_get_platdata(dev);
117 if (info->gpio_count <= 8) {
118 ret = dm_i2c_read(dev, reg, val, 1);
119 } else if (info->gpio_count <= 16) {
120 ret = dm_i2c_read(dev, reg << 1, val, info->bank_count);
121 } else if (info->gpio_count == 40) {
123 ret = dm_i2c_read(dev, (reg << 3) | 0x80, val,
126 dev_err(dev, "Unsupported now\n");
133 static int pca953x_write_regs(struct udevice *dev, int reg, u8 *val)
135 struct pca953x_info *info = dev_get_platdata(dev);
138 if (info->gpio_count <= 8) {
139 ret = dm_i2c_write(dev, reg, val, 1);
140 } else if (info->gpio_count <= 16) {
141 ret = dm_i2c_write(dev, reg << 1, val, info->bank_count);
142 } else if (info->gpio_count == 40) {
144 ret = dm_i2c_write(dev, (reg << 3) | 0x80, val, info->bank_count);
152 static int pca953x_is_output(struct udevice *dev, int offset)
154 struct pca953x_info *info = dev_get_platdata(dev);
156 int bank = offset / BANK_SZ;
157 int off = offset % BANK_SZ;
159 /*0: output; 1: input */
160 return !(info->reg_direction[bank] & (1 << off));
163 static int pca953x_get_value(struct udevice *dev, uint offset)
168 int off = offset % BANK_SZ;
170 ret = pca953x_read_single(dev, PCA953X_INPUT, &val, offset);
174 return (val >> off) & 0x1;
177 static int pca953x_set_value(struct udevice *dev, uint offset, int value)
179 struct pca953x_info *info = dev_get_platdata(dev);
180 int bank = offset / BANK_SZ;
181 int off = offset % BANK_SZ;
186 val = info->reg_output[bank] | (1 << off);
188 val = info->reg_output[bank] & ~(1 << off);
190 ret = pca953x_write_single(dev, PCA953X_OUTPUT, val, offset);
194 info->reg_output[bank] = val;
199 static int pca953x_set_direction(struct udevice *dev, uint offset, int dir)
201 struct pca953x_info *info = dev_get_platdata(dev);
202 int bank = offset / BANK_SZ;
203 int off = offset % BANK_SZ;
207 if (dir == PCA953X_DIRECTION_IN)
208 val = info->reg_direction[bank] | (1 << off);
210 val = info->reg_direction[bank] & ~(1 << off);
212 ret = pca953x_write_single(dev, PCA953X_DIRECTION, val, offset);
216 info->reg_direction[bank] = val;
221 static int pca953x_direction_input(struct udevice *dev, uint offset)
223 return pca953x_set_direction(dev, offset, PCA953X_DIRECTION_IN);
226 static int pca953x_direction_output(struct udevice *dev, uint offset, int value)
228 /* Configure output value. */
229 pca953x_set_value(dev, offset, value);
231 /* Configure direction as output. */
232 pca953x_set_direction(dev, offset, PCA953X_DIRECTION_OUT);
237 static int pca953x_get_function(struct udevice *dev, uint offset)
239 if (pca953x_is_output(dev, offset))
245 static int pca953x_xlate(struct udevice *dev, struct gpio_desc *desc,
246 struct ofnode_phandle_args *args)
248 desc->offset = args->args[0];
249 desc->flags = args->args[1] & GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0;
254 static const struct dm_gpio_ops pca953x_ops = {
255 .direction_input = pca953x_direction_input,
256 .direction_output = pca953x_direction_output,
257 .get_value = pca953x_get_value,
258 .set_value = pca953x_set_value,
259 .get_function = pca953x_get_function,
260 .xlate = pca953x_xlate,
263 static int pca953x_probe(struct udevice *dev)
265 struct pca953x_info *info = dev_get_platdata(dev);
266 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
267 char name[32], label[8], *str;
275 addr = dev_read_addr(dev);
281 driver_data = dev_get_driver_data(dev);
283 info->gpio_count = driver_data & PCA_GPIO_MASK;
284 if (info->gpio_count > MAX_BANK * BANK_SZ) {
285 dev_err(dev, "Max support %d pins now\n", MAX_BANK * BANK_SZ);
289 info->chip_type = PCA_CHIP_TYPE(driver_data);
290 if (info->chip_type != PCA953X_TYPE) {
291 dev_err(dev, "Only support PCA953X chip type now.\n");
295 info->bank_count = DIV_ROUND_UP(info->gpio_count, BANK_SZ);
297 ret = pca953x_read_regs(dev, PCA953X_OUTPUT, info->reg_output);
299 dev_err(dev, "Error reading output register\n");
303 ret = pca953x_read_regs(dev, PCA953X_DIRECTION, info->reg_direction);
305 dev_err(dev, "Error reading direction register\n");
309 tmp = dev_read_prop(dev, "label", &size);
312 memcpy(label, tmp, sizeof(label) - 1);
313 label[sizeof(label) - 1] = '\0';
314 snprintf(name, sizeof(name), "%s@%x_", label, info->addr);
316 snprintf(name, sizeof(name), "gpio@%x_", info->addr);
319 /* Clear the polarity registers to no invert */
320 memset(val, 0, MAX_BANK);
321 ret = pca953x_write_regs(dev, PCA953X_INVERT, val);
323 dev_err(dev, "Error writing invert register\n");
330 uc_priv->bank_name = str;
331 uc_priv->gpio_count = info->gpio_count;
333 dev_dbg(dev, "%s is ready\n", str);
338 #define OF_953X(__nrgpio, __int) (ulong)(__nrgpio | PCA953X_TYPE | __int)
339 #define OF_957X(__nrgpio, __int) (ulong)(__nrgpio | PCA957X_TYPE | __int)
341 static const struct udevice_id pca953x_ids[] = {
342 { .compatible = "nxp,pca9505", .data = OF_953X(40, PCA_INT), },
343 { .compatible = "nxp,pca9534", .data = OF_953X(8, PCA_INT), },
344 { .compatible = "nxp,pca9535", .data = OF_953X(16, PCA_INT), },
345 { .compatible = "nxp,pca9536", .data = OF_953X(4, 0), },
346 { .compatible = "nxp,pca9537", .data = OF_953X(4, PCA_INT), },
347 { .compatible = "nxp,pca9538", .data = OF_953X(8, PCA_INT), },
348 { .compatible = "nxp,pca9539", .data = OF_953X(16, PCA_INT), },
349 { .compatible = "nxp,pca9554", .data = OF_953X(8, PCA_INT), },
350 { .compatible = "nxp,pca9555", .data = OF_953X(16, PCA_INT), },
351 { .compatible = "nxp,pca9556", .data = OF_953X(8, 0), },
352 { .compatible = "nxp,pca9557", .data = OF_953X(8, 0), },
353 { .compatible = "nxp,pca9574", .data = OF_957X(8, PCA_INT), },
354 { .compatible = "nxp,pca9575", .data = OF_957X(16, PCA_INT), },
355 { .compatible = "nxp,pca9698", .data = OF_953X(40, 0), },
357 { .compatible = "maxim,max7310", .data = OF_953X(8, 0), },
358 { .compatible = "maxim,max7312", .data = OF_953X(16, PCA_INT), },
359 { .compatible = "maxim,max7313", .data = OF_953X(16, PCA_INT), },
360 { .compatible = "maxim,max7315", .data = OF_953X(8, PCA_INT), },
362 { .compatible = "ti,pca6107", .data = OF_953X(8, PCA_INT), },
363 { .compatible = "ti,tca6408", .data = OF_953X(8, PCA_INT), },
364 { .compatible = "ti,tca6416", .data = OF_953X(16, PCA_INT), },
365 { .compatible = "ti,tca6424", .data = OF_953X(24, PCA_INT), },
366 { .compatible = "ti,tca9539", .data = OF_953X(16, PCA_INT), },
368 { .compatible = "onsemi,pca9654", .data = OF_953X(8, PCA_INT), },
370 { .compatible = "exar,xra1202", .data = OF_953X(8, 0), },
374 U_BOOT_DRIVER(pca953x) = {
378 .probe = pca953x_probe,
379 .platdata_auto_alloc_size = sizeof(struct pca953x_info),
380 .of_match = pca953x_ids,