1 // SPDX-License-Identifier: GPL-2.0+
4 * Mario Six, Guntermann & Drunck GmbH, mario.six@gdsys.cc
6 * based on arch/powerpc/include/asm/mpc85xx_gpio.h, which is
8 * Copyright 2010 eXMeritus, A Boeing Company
25 struct mpc8xxx_gpio_data {
26 /* The bank's register base in memory */
27 struct ccsr_gpio __iomem *base;
28 /* The address of the registers; used to identify the bank */
30 /* The GPIO count of the bank */
32 /* The GPDAT register cannot be used to determine the value of output
33 * pins on MPC8572/MPC8536, so we shadow it and use the shadowed value
45 inline u32 gpio_mask(uint gpio)
47 return (1U << (31 - (gpio)));
50 static inline u32 mpc8xxx_gpio_get_val(struct ccsr_gpio *base, u32 mask)
52 return in_be32(&base->gpdat) & mask;
55 static inline u32 mpc8xxx_gpio_get_dir(struct ccsr_gpio *base, u32 mask)
57 return in_be32(&base->gpdir) & mask;
60 static inline int mpc8xxx_gpio_open_drain_val(struct ccsr_gpio *base, u32 mask)
62 return in_be32(&base->gpodr) & mask;
65 static inline void mpc8xxx_gpio_open_drain_on(struct ccsr_gpio *base, u32
68 /* GPODR register 1 -> open drain on */
69 setbits_be32(&base->gpodr, gpios);
72 static inline void mpc8xxx_gpio_open_drain_off(struct ccsr_gpio *base,
75 /* GPODR register 0 -> open drain off (actively driven) */
76 clrbits_be32(&base->gpodr, gpios);
79 static int mpc8xxx_gpio_direction_input(struct udevice *dev, uint gpio)
81 struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
82 u32 mask = gpio_mask(gpio);
84 /* GPDIR register 0 -> input */
85 clrbits_be32(&data->base->gpdir, mask);
90 static int mpc8xxx_gpio_set_value(struct udevice *dev, uint gpio, int value)
92 struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
93 struct ccsr_gpio *base = data->base;
94 u32 mask = gpio_mask(gpio);
98 data->dat_shadow |= mask;
100 data->dat_shadow &= ~mask;
103 gpdir = in_be32(&base->gpdir);
104 gpdir |= gpio_mask(gpio);
105 out_be32(&base->gpdat, gpdir & data->dat_shadow);
106 out_be32(&base->gpdir, gpdir);
111 static int mpc8xxx_gpio_direction_output(struct udevice *dev, uint gpio,
114 struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
116 /* GPIO 28..31 are input only on MPC5121 */
117 if (data->type == MPC5121_GPIO_TYPE && gpio >= 28)
120 return mpc8xxx_gpio_set_value(dev, gpio, value);
123 static int mpc8xxx_gpio_get_value(struct udevice *dev, uint gpio)
125 struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
127 if (!!mpc8xxx_gpio_get_dir(data->base, gpio_mask(gpio))) {
128 /* Output -> use shadowed value */
129 return !!(data->dat_shadow & gpio_mask(gpio));
132 /* Input -> read value from GPDAT register */
133 return !!mpc8xxx_gpio_get_val(data->base, gpio_mask(gpio));
136 static int mpc8xxx_gpio_get_open_drain(struct udevice *dev, uint gpio)
138 struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
140 return !!mpc8xxx_gpio_open_drain_val(data->base, gpio_mask(gpio));
143 static int mpc8xxx_gpio_set_open_drain(struct udevice *dev, uint gpio,
146 struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
149 mpc8xxx_gpio_open_drain_on(data->base, gpio_mask(gpio));
151 mpc8xxx_gpio_open_drain_off(data->base, gpio_mask(gpio));
156 static int mpc8xxx_gpio_get_function(struct udevice *dev, uint gpio)
158 struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
161 dir = !!mpc8xxx_gpio_get_dir(data->base, gpio_mask(gpio));
162 return dir ? GPIOF_OUTPUT : GPIOF_INPUT;
165 #if CONFIG_IS_ENABLED(OF_CONTROL)
166 static int mpc8xxx_gpio_ofdata_to_platdata(struct udevice *dev)
168 struct mpc8xxx_gpio_plat *plat = dev_get_platdata(dev);
172 dev_read_u32_array(dev, "reg", reg, 2);
173 addr = dev_translate_address(dev, reg);
177 plat->ngpios = dev_read_u32_default(dev, "ngpios", 32);
183 static int mpc8xxx_gpio_platdata_to_priv(struct udevice *dev)
185 struct mpc8xxx_gpio_data *priv = dev_get_priv(dev);
186 struct mpc8xxx_gpio_plat *plat = dev_get_platdata(dev);
187 unsigned long size = plat->size;
188 ulong driver_data = dev_get_driver_data(dev);
193 priv->addr = plat->addr;
194 priv->base = map_sysmem(plat->addr, size);
199 priv->gpio_count = plat->ngpios;
200 priv->dat_shadow = 0;
202 priv->type = driver_data;
207 static int mpc8xxx_gpio_probe(struct udevice *dev)
209 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
210 struct mpc8xxx_gpio_data *data = dev_get_priv(dev);
213 mpc8xxx_gpio_platdata_to_priv(dev);
215 snprintf(name, sizeof(name), "MPC@%lx_", data->addr);
221 uc_priv->bank_name = str;
222 uc_priv->gpio_count = data->gpio_count;
227 static const struct dm_gpio_ops gpio_mpc8xxx_ops = {
228 .direction_input = mpc8xxx_gpio_direction_input,
229 .direction_output = mpc8xxx_gpio_direction_output,
230 .get_value = mpc8xxx_gpio_get_value,
231 .set_value = mpc8xxx_gpio_set_value,
232 .get_open_drain = mpc8xxx_gpio_get_open_drain,
233 .set_open_drain = mpc8xxx_gpio_set_open_drain,
234 .get_function = mpc8xxx_gpio_get_function,
237 static const struct udevice_id mpc8xxx_gpio_ids[] = {
238 { .compatible = "fsl,pq3-gpio", .data = MPC8XXX_GPIO_TYPE },
239 { .compatible = "fsl,mpc8308-gpio", .data = MPC8XXX_GPIO_TYPE },
240 { .compatible = "fsl,mpc8349-gpio", .data = MPC8XXX_GPIO_TYPE },
241 { .compatible = "fsl,mpc8572-gpio", .data = MPC8XXX_GPIO_TYPE},
242 { .compatible = "fsl,mpc8610-gpio", .data = MPC8XXX_GPIO_TYPE},
243 { .compatible = "fsl,mpc5121-gpio", .data = MPC5121_GPIO_TYPE, },
244 { .compatible = "fsl,qoriq-gpio", .data = MPC8XXX_GPIO_TYPE },
248 U_BOOT_DRIVER(gpio_mpc8xxx) = {
249 .name = "gpio_mpc8xxx",
251 .ops = &gpio_mpc8xxx_ops,
252 #if CONFIG_IS_ENABLED(OF_CONTROL)
253 .ofdata_to_platdata = mpc8xxx_gpio_ofdata_to_platdata,
254 .platdata_auto_alloc_size = sizeof(struct mpc8xxx_gpio_plat),
255 .of_match = mpc8xxx_gpio_ids,
257 .probe = mpc8xxx_gpio_probe,
258 .priv_auto_alloc_size = sizeof(struct mpc8xxx_gpio_data),