2 * Copyright (c) 2012 The Chromium OS Authors.
3 * SPDX-License-Identifier: GPL-2.0+
17 #include <asm/arch/gpio.h>
18 #include <dt-bindings/gpio/x86-gpio.h>
20 DECLARE_GLOBAL_DATA_PTR;
23 * struct broadwell_bank_priv - Private driver data
25 * @regs: Pointer to GPIO registers
26 * @bank: Bank number for this bank (0, 1 or 2)
27 * @offset: GPIO offset for this bank (0, 32 or 64)
29 struct broadwell_bank_priv {
30 struct pch_lp_gpio_regs *regs;
35 static int broadwell_gpio_request(struct udevice *dev, unsigned offset,
38 struct broadwell_bank_priv *priv = dev_get_priv(dev);
39 struct pch_lp_gpio_regs *regs = priv->regs;
43 * Make sure that the GPIO pin we want isn't already in use for some
44 * built-in hardware function. We have to check this for every
47 debug("%s: request bank %d offset %d: ", __func__, priv->bank, offset);
48 val = inl(®s->own[priv->bank]);
49 if (!(val & (1UL << offset))) {
50 debug("gpio is reserved for internal use\n");
58 static int broadwell_gpio_direction_input(struct udevice *dev, unsigned offset)
60 struct broadwell_bank_priv *priv = dev_get_priv(dev);
61 struct pch_lp_gpio_regs *regs = priv->regs;
63 setio_32(®s->config[priv->offset + offset], CONFA_DIR_INPUT);
68 static int broadwell_gpio_get_value(struct udevice *dev, unsigned offset)
70 struct broadwell_bank_priv *priv = dev_get_priv(dev);
71 struct pch_lp_gpio_regs *regs = priv->regs;
73 return inl(®s->config[priv->offset + offset]) & CONFA_LEVEL_HIGH ?
77 static int broadwell_gpio_set_value(struct udevice *dev, unsigned offset,
80 struct broadwell_bank_priv *priv = dev_get_priv(dev);
81 struct pch_lp_gpio_regs *regs = priv->regs;
83 debug("%s: dev=%s, offset=%d, value=%d\n", __func__, dev->name, offset,
85 clrsetio_32(®s->config[priv->offset + offset], CONFA_OUTPUT_HIGH,
86 value ? CONFA_OUTPUT_HIGH : 0);
91 static int broadwell_gpio_direction_output(struct udevice *dev, unsigned offset,
94 struct broadwell_bank_priv *priv = dev_get_priv(dev);
95 struct pch_lp_gpio_regs *regs = priv->regs;
97 broadwell_gpio_set_value(dev, offset, value);
98 clrio_32(®s->config[priv->offset + offset], CONFA_DIR_INPUT);
103 static int broadwell_gpio_get_function(struct udevice *dev, unsigned offset)
105 struct broadwell_bank_priv *priv = dev_get_priv(dev);
106 struct pch_lp_gpio_regs *regs = priv->regs;
107 u32 mask = 1UL << offset;
109 if (!(inl(®s->own[priv->bank]) & mask))
111 if (inl(®s->config[priv->offset + offset]) & CONFA_DIR_INPUT)
117 static int broadwell_gpio_probe(struct udevice *dev)
119 struct broadwell_bank_platdata *plat = dev_get_platdata(dev);
120 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
121 struct broadwell_bank_priv *priv = dev_get_priv(dev);
122 struct udevice *pinctrl;
125 /* Set up pin control if available */
126 ret = syscon_get_by_driver_data(X86_SYSCON_PINCONF, &pinctrl);
127 debug("%s, pinctrl=%p, ret=%d\n", __func__, pinctrl, ret);
129 uc_priv->gpio_count = GPIO_PER_BANK;
130 uc_priv->bank_name = plat->bank_name;
132 priv->regs = (struct pch_lp_gpio_regs *)(uintptr_t)plat->base_addr;
133 priv->bank = plat->bank;
134 priv->offset = priv->bank * 32;
135 debug("%s: probe done, regs %p, bank %d\n", __func__, priv->regs,
141 static int broadwell_gpio_ofdata_to_platdata(struct udevice *dev)
143 struct broadwell_bank_platdata *plat = dev_get_platdata(dev);
148 ret = pch_get_gpio_base(dev->parent, &gpiobase);
152 bank = fdtdec_get_int(gd->fdt_blob, dev->of_offset, "reg", -1);
154 debug("%s: Invalid bank number %d\n", __func__, bank);
158 plat->base_addr = gpiobase;
159 plat->bank_name = fdt_getprop(gd->fdt_blob, dev->of_offset,
165 static int broadwell_gpio_xlate(struct udevice *dev, struct gpio_desc *desc,
166 struct fdtdec_phandle_args *args)
168 desc->offset = args->args[0];
169 desc->flags = args->args[1] & GPIO_ACTIVE_LOW ? GPIOD_ACTIVE_LOW : 0;
174 static const struct dm_gpio_ops gpio_broadwell_ops = {
175 .request = broadwell_gpio_request,
176 .direction_input = broadwell_gpio_direction_input,
177 .direction_output = broadwell_gpio_direction_output,
178 .get_value = broadwell_gpio_get_value,
179 .set_value = broadwell_gpio_set_value,
180 .get_function = broadwell_gpio_get_function,
181 .xlate = broadwell_gpio_xlate,
184 static const struct udevice_id intel_broadwell_gpio_ids[] = {
185 { .compatible = "intel,broadwell-gpio" },
189 U_BOOT_DRIVER(gpio_broadwell) = {
190 .name = "gpio_broadwell",
192 .of_match = intel_broadwell_gpio_ids,
193 .ops = &gpio_broadwell_ops,
194 .ofdata_to_platdata = broadwell_gpio_ofdata_to_platdata,
195 .probe = broadwell_gpio_probe,
196 .priv_auto_alloc_size = sizeof(struct broadwell_bank_priv),
197 .platdata_auto_alloc_size = sizeof(struct broadwell_bank_platdata),