1 // SPDX-License-Identifier: GPL-2.0+
3 * Copyright (C) 2013 Bo Shen <voice.shen@atmel.com>
5 * Copyright (C) 2009 Jens Scharsig (js_at_ng@scharsoft.de)
7 * Copyright (C) 2005 HP Labs
15 #include <linux/sizes.h>
17 #include <asm/arch/hardware.h>
18 #include <asm/arch/at91_pio.h>
20 #define GPIO_PER_BANK 32
22 static struct at91_port *at91_pio_get_port(unsigned port)
26 return (struct at91_port *)ATMEL_BASE_PIOA;
28 return (struct at91_port *)ATMEL_BASE_PIOB;
30 return (struct at91_port *)ATMEL_BASE_PIOC;
31 #if (ATMEL_PIO_PORTS > 3)
33 return (struct at91_port *)ATMEL_BASE_PIOD;
34 #if (ATMEL_PIO_PORTS > 4)
36 return (struct at91_port *)ATMEL_BASE_PIOE;
40 printf("Error: at91_gpio: Fail to get PIO base!\n");
45 static void at91_set_port_pullup(struct at91_port *at91_port, unsigned offset,
52 writel(mask, &at91_port->puer);
54 writel(mask, &at91_port->pudr);
55 writel(mask, &at91_port->per);
58 int at91_set_pio_pullup(unsigned port, unsigned pin, int use_pullup)
60 struct at91_port *at91_port = at91_pio_get_port(port);
62 if (at91_port && (pin < GPIO_PER_BANK))
63 at91_set_port_pullup(at91_port, pin, use_pullup);
69 * mux the pin to the "GPIO" peripheral role.
71 int at91_set_pio_periph(unsigned port, unsigned pin, int use_pullup)
73 struct at91_port *at91_port = at91_pio_get_port(port);
76 if (at91_port && (pin < GPIO_PER_BANK)) {
78 writel(mask, &at91_port->idr);
79 at91_set_pio_pullup(port, pin, use_pullup);
80 writel(mask, &at91_port->per);
87 * mux the pin to the "A" internal peripheral role.
89 int at91_set_a_periph(unsigned port, unsigned pin, int use_pullup)
91 struct at91_port *at91_port = at91_pio_get_port(port);
94 if (at91_port && (pin < GPIO_PER_BANK)) {
96 writel(mask, &at91_port->idr);
97 at91_set_pio_pullup(port, pin, use_pullup);
98 writel(mask, &at91_port->mux.pio2.asr);
99 writel(mask, &at91_port->pdr);
106 * mux the pin to the "B" internal peripheral role.
108 int at91_set_b_periph(unsigned port, unsigned pin, int use_pullup)
110 struct at91_port *at91_port = at91_pio_get_port(port);
113 if (at91_port && (pin < GPIO_PER_BANK)) {
115 writel(mask, &at91_port->idr);
116 at91_set_pio_pullup(port, pin, use_pullup);
117 writel(mask, &at91_port->mux.pio2.bsr);
118 writel(mask, &at91_port->pdr);
125 * mux the pin to the "A" internal peripheral role.
127 int at91_pio3_set_a_periph(unsigned port, unsigned pin, int use_pullup)
129 struct at91_port *at91_port = at91_pio_get_port(port);
132 if (at91_port && (pin < GPIO_PER_BANK)) {
134 writel(mask, &at91_port->idr);
135 at91_set_pio_pullup(port, pin, use_pullup);
136 writel(readl(&at91_port->mux.pio3.abcdsr1) & ~mask,
137 &at91_port->mux.pio3.abcdsr1);
138 writel(readl(&at91_port->mux.pio3.abcdsr2) & ~mask,
139 &at91_port->mux.pio3.abcdsr2);
141 writel(mask, &at91_port->pdr);
148 * mux the pin to the "B" internal peripheral role.
150 int at91_pio3_set_b_periph(unsigned port, unsigned pin, int use_pullup)
152 struct at91_port *at91_port = at91_pio_get_port(port);
155 if (at91_port && (pin < GPIO_PER_BANK)) {
157 writel(mask, &at91_port->idr);
158 at91_set_pio_pullup(port, pin, use_pullup);
159 writel(readl(&at91_port->mux.pio3.abcdsr1) | mask,
160 &at91_port->mux.pio3.abcdsr1);
161 writel(readl(&at91_port->mux.pio3.abcdsr2) & ~mask,
162 &at91_port->mux.pio3.abcdsr2);
164 writel(mask, &at91_port->pdr);
170 * mux the pin to the "C" internal peripheral role.
172 int at91_pio3_set_c_periph(unsigned port, unsigned pin, int use_pullup)
174 struct at91_port *at91_port = at91_pio_get_port(port);
177 if (at91_port && (pin < GPIO_PER_BANK)) {
179 writel(mask, &at91_port->idr);
180 at91_set_pio_pullup(port, pin, use_pullup);
181 writel(readl(&at91_port->mux.pio3.abcdsr1) & ~mask,
182 &at91_port->mux.pio3.abcdsr1);
183 writel(readl(&at91_port->mux.pio3.abcdsr2) | mask,
184 &at91_port->mux.pio3.abcdsr2);
185 writel(mask, &at91_port->pdr);
192 * mux the pin to the "D" internal peripheral role.
194 int at91_pio3_set_d_periph(unsigned port, unsigned pin, int use_pullup)
196 struct at91_port *at91_port = at91_pio_get_port(port);
199 if (at91_port && (pin < GPIO_PER_BANK)) {
201 writel(mask, &at91_port->idr);
202 at91_set_pio_pullup(port, pin, use_pullup);
203 writel(readl(&at91_port->mux.pio3.abcdsr1) | mask,
204 &at91_port->mux.pio3.abcdsr1);
205 writel(readl(&at91_port->mux.pio3.abcdsr2) | mask,
206 &at91_port->mux.pio3.abcdsr2);
207 writel(mask, &at91_port->pdr);
213 #ifdef CONFIG_DM_GPIO
214 static bool at91_get_port_output(struct at91_port *at91_port, int offset)
219 val = readl(&at91_port->osr);
224 static void at91_set_port_input(struct at91_port *at91_port, int offset,
230 writel(mask, &at91_port->idr);
231 at91_set_port_pullup(at91_port, offset, use_pullup);
232 writel(mask, &at91_port->odr);
233 writel(mask, &at91_port->per);
237 * mux the pin to the gpio controller (instead of "A" or "B" peripheral), and
238 * configure it for an input.
240 int at91_set_pio_input(unsigned port, u32 pin, int use_pullup)
242 struct at91_port *at91_port = at91_pio_get_port(port);
244 if (at91_port && (pin < GPIO_PER_BANK))
245 at91_set_port_input(at91_port, pin, use_pullup);
250 static void at91_set_port_output(struct at91_port *at91_port, int offset,
256 writel(mask, &at91_port->idr);
257 writel(mask, &at91_port->pudr);
259 writel(mask, &at91_port->sodr);
261 writel(mask, &at91_port->codr);
262 writel(mask, &at91_port->oer);
263 writel(mask, &at91_port->per);
267 * mux the pin to the gpio controller (instead of "A" or "B" peripheral),
268 * and configure it for an output.
270 int at91_set_pio_output(unsigned port, u32 pin, int value)
272 struct at91_port *at91_port = at91_pio_get_port(port);
274 if (at91_port && (pin < GPIO_PER_BANK))
275 at91_set_port_output(at91_port, pin, value);
281 * enable/disable the glitch filter. mostly used with IRQ handling.
283 int at91_set_pio_deglitch(unsigned port, unsigned pin, int is_on)
285 struct at91_port *at91_port = at91_pio_get_port(port);
288 if (at91_port && (pin < GPIO_PER_BANK)) {
291 writel(mask, &at91_port->ifer);
293 writel(mask, &at91_port->ifdr);
300 * enable/disable the glitch filter. mostly used with IRQ handling.
302 int at91_pio3_set_pio_deglitch(unsigned port, unsigned pin, int is_on)
304 struct at91_port *at91_port = at91_pio_get_port(port);
307 if (at91_port && (pin < GPIO_PER_BANK)) {
310 writel(mask, &at91_port->mux.pio3.ifscdr);
311 writel(mask, &at91_port->ifer);
313 writel(mask, &at91_port->ifdr);
321 * enable/disable the debounce filter.
323 int at91_pio3_set_pio_debounce(unsigned port, unsigned pin, int is_on, int div)
325 struct at91_port *at91_port = at91_pio_get_port(port);
328 if (at91_port && (pin < GPIO_PER_BANK)) {
331 writel(mask, &at91_port->mux.pio3.ifscer);
332 writel(div & PIO_SCDR_DIV, &at91_port->mux.pio3.scdr);
333 writel(mask, &at91_port->ifer);
335 writel(mask, &at91_port->ifdr);
343 * enable/disable the pull-down.
344 * If pull-up already enabled while calling the function, we disable it.
346 int at91_pio3_set_pio_pulldown(unsigned port, unsigned pin, int is_on)
348 struct at91_port *at91_port = at91_pio_get_port(port);
351 if (at91_port && (pin < GPIO_PER_BANK)) {
354 at91_set_pio_pullup(port, pin, 0);
355 writel(mask, &at91_port->mux.pio3.ppder);
357 writel(mask, &at91_port->mux.pio3.ppddr);
363 int at91_pio3_set_pio_pullup(unsigned port, unsigned pin, int use_pullup)
365 struct at91_port *at91_port = at91_pio_get_port(port);
368 at91_pio3_set_pio_pulldown(port, pin, 0);
370 if (at91_port && (pin < GPIO_PER_BANK))
371 at91_set_port_pullup(at91_port, pin, use_pullup);
377 * disable Schmitt trigger
379 int at91_pio3_set_pio_disable_schmitt_trig(unsigned port, unsigned pin)
381 struct at91_port *at91_port = at91_pio_get_port(port);
384 if (at91_port && (pin < GPIO_PER_BANK)) {
386 writel(readl(&at91_port->schmitt) | mask,
387 &at91_port->schmitt);
394 * enable/disable the multi-driver. This is only valid for output and
395 * allows the output pin to run as an open collector output.
397 int at91_set_pio_multi_drive(unsigned port, unsigned pin, int is_on)
399 struct at91_port *at91_port = at91_pio_get_port(port);
402 if (at91_port && (pin < GPIO_PER_BANK)) {
405 writel(mask, &at91_port->mder);
407 writel(mask, &at91_port->mddr);
413 static void at91_set_port_value(struct at91_port *at91_port, int offset,
420 writel(mask, &at91_port->sodr);
422 writel(mask, &at91_port->codr);
426 * assuming the pin is muxed as a gpio output, set its value.
428 int at91_set_pio_value(unsigned port, unsigned pin, int value)
430 struct at91_port *at91_port = at91_pio_get_port(port);
432 if (at91_port && (pin < GPIO_PER_BANK))
433 at91_set_port_value(at91_port, pin, value);
438 static int at91_get_port_value(struct at91_port *at91_port, int offset)
443 pdsr = readl(&at91_port->pdsr) & mask;
448 * read the pin's value (works even if it's not muxed as a gpio).
450 int at91_get_pio_value(unsigned port, unsigned pin)
452 struct at91_port *at91_port = at91_pio_get_port(port);
454 if (at91_port && (pin < GPIO_PER_BANK))
455 return at91_get_port_value(at91_port, pin);
460 #ifndef CONFIG_DM_GPIO
461 /* Common GPIO API */
463 int gpio_request(unsigned gpio, const char *label)
468 int gpio_free(unsigned gpio)
473 int gpio_direction_input(unsigned gpio)
475 at91_set_pio_input(at91_gpio_to_port(gpio),
476 at91_gpio_to_pin(gpio), 0);
480 int gpio_direction_output(unsigned gpio, int value)
482 at91_set_pio_output(at91_gpio_to_port(gpio),
483 at91_gpio_to_pin(gpio), value);
487 int gpio_get_value(unsigned gpio)
489 return at91_get_pio_value(at91_gpio_to_port(gpio),
490 at91_gpio_to_pin(gpio));
493 int gpio_set_value(unsigned gpio, int value)
495 at91_set_pio_value(at91_gpio_to_port(gpio),
496 at91_gpio_to_pin(gpio), value);
502 #ifdef CONFIG_DM_GPIO
504 struct at91_port_priv {
505 struct at91_port *regs;
508 /* set GPIO pin 'gpio' as an input */
509 static int at91_gpio_direction_input(struct udevice *dev, unsigned offset)
511 struct at91_port_priv *port = dev_get_priv(dev);
513 at91_set_port_input(port->regs, offset, 0);
518 /* set GPIO pin 'gpio' as an output, with polarity 'value' */
519 static int at91_gpio_direction_output(struct udevice *dev, unsigned offset,
522 struct at91_port_priv *port = dev_get_priv(dev);
524 at91_set_port_output(port->regs, offset, value);
529 /* read GPIO IN value of pin 'gpio' */
530 static int at91_gpio_get_value(struct udevice *dev, unsigned offset)
532 struct at91_port_priv *port = dev_get_priv(dev);
534 return at91_get_port_value(port->regs, offset);
537 /* write GPIO OUT value to pin 'gpio' */
538 static int at91_gpio_set_value(struct udevice *dev, unsigned offset,
541 struct at91_port_priv *port = dev_get_priv(dev);
543 at91_set_port_value(port->regs, offset, value);
548 static int at91_gpio_get_function(struct udevice *dev, unsigned offset)
550 struct at91_port_priv *port = dev_get_priv(dev);
552 /* GPIOF_FUNC is not implemented yet */
553 if (at91_get_port_output(port->regs, offset))
559 static const struct dm_gpio_ops gpio_at91_ops = {
560 .direction_input = at91_gpio_direction_input,
561 .direction_output = at91_gpio_direction_output,
562 .get_value = at91_gpio_get_value,
563 .set_value = at91_gpio_set_value,
564 .get_function = at91_gpio_get_function,
567 static int at91_gpio_probe(struct udevice *dev)
569 struct at91_port_priv *port = dev_get_priv(dev);
570 struct at91_port_platdata *plat = dev_get_platdata(dev);
571 struct gpio_dev_priv *uc_priv = dev_get_uclass_priv(dev);
575 ret = clk_get_by_index(dev, 0, &clk);
579 ret = clk_enable(&clk);
585 uc_priv->bank_name = plat->bank_name;
586 uc_priv->gpio_count = GPIO_PER_BANK;
588 #if CONFIG_IS_ENABLED(OF_CONTROL)
589 plat->base_addr = (uint32_t)devfdt_get_addr_ptr(dev);
591 port->regs = (struct at91_port *)plat->base_addr;
596 #if CONFIG_IS_ENABLED(OF_CONTROL)
597 static const struct udevice_id at91_gpio_ids[] = {
598 { .compatible = "atmel,at91rm9200-gpio" },
603 U_BOOT_DRIVER(gpio_at91) = {
606 #if CONFIG_IS_ENABLED(OF_CONTROL)
607 .of_match = at91_gpio_ids,
608 .platdata_auto_alloc_size = sizeof(struct at91_port_platdata),
610 .ops = &gpio_at91_ops,
611 .probe = at91_gpio_probe,
612 .priv_auto_alloc_size = sizeof(struct at91_port_priv),