drivers/fpga/zynqmppl.c

   1 // SPDX-License-Identifier: GPL-2.0
   2 /*
   3  * (C) Copyright 2015 - 2016, Xilinx, Inc,
   4  * Michal Simek <michal.simek@xilinx.com>
   5  * Siva Durga Prasad <siva.durga.paladugu@xilinx.com>
   6  */
   7
   8 #include <console.h>
   9 #include <common.h>
  10 #include <zynqmppl.h>
  11 #include <zynqmp_firmware.h>
  12 #include <linux/sizes.h>
  13 #include <asm/arch/sys_proto.h>
  14 #include <memalign.h>
  15
  16 #define DUMMY_WORD      0xffffffff
  17
  18 /* Xilinx binary format header */
  19 static const u32 bin_format[] = {
  20         DUMMY_WORD, /* Dummy words */
  21         DUMMY_WORD,
  22         DUMMY_WORD,
  23         DUMMY_WORD,
  24         DUMMY_WORD,
  25         DUMMY_WORD,
  26         DUMMY_WORD,
  27         DUMMY_WORD,
  28         DUMMY_WORD,
  29         DUMMY_WORD,
  30         DUMMY_WORD,
  31         DUMMY_WORD,
  32         DUMMY_WORD,
  33         DUMMY_WORD,
  34         DUMMY_WORD,
  35         DUMMY_WORD,
  36         0x000000bb, /* Sync word */
  37         0x11220044, /* Sync word */
  38         DUMMY_WORD,
  39         DUMMY_WORD,
  40         0xaa995566, /* Sync word */
  41 };
  42
  43 #define SWAP_NO         1
  44 #define SWAP_DONE       2
  45
  46 /*
  47  * Load the whole word from unaligned buffer
  48  * Keep in your mind that it is byte loading on little-endian system
  49  */
  50 static u32 load_word(const void *buf, u32 swap)
  51 {
  52         u32 word = 0;
  53         u8 *bitc = (u8 *)buf;
  54         int p;
  55
  56         if (swap == SWAP_NO) {
  57                 for (p = 0; p < 4; p++) {
  58                         word <<= 8;
  59                         word |= bitc[p];
  60                 }
  61         } else {
  62                 for (p = 3; p >= 0; p--) {
  63                         word <<= 8;
  64                         word |= bitc[p];
  65                 }
  66         }
  67
  68         return word;
  69 }
  70
  71 static u32 check_header(const void *buf)
  72 {
  73         u32 i, pattern;
  74         int swap = SWAP_NO;
  75         u32 *test = (u32 *)buf;
  76
  77         debug("%s: Let's check bitstream header\n", __func__);
  78
  79         /* Checking that passing bin is not a bitstream */
  80         for (i = 0; i < ARRAY_SIZE(bin_format); i++) {
  81                 pattern = load_word(&test[i], swap);
  82
  83                 /*
  84                  * Bitstreams in binary format are swapped
  85                  * compare to regular bistream.
  86                  * Do not swap dummy word but if swap is done assume
  87                  * that parsing buffer is binary format
  88                  */
  89                 if ((__swab32(pattern) != DUMMY_WORD) &&
  90                     (__swab32(pattern) == bin_format[i])) {
  91                         swap = SWAP_DONE;
  92                         debug("%s: data swapped - let's swap\n", __func__);
  93                 }
  94
  95                 debug("%s: %d/%px: pattern %x/%x bin_format\n", __func__, i,
  96                       &test[i], pattern, bin_format[i]);
  97         }
  98         debug("%s: Found bitstream header at %px %s swapinng\n", __func__,
  99               buf, swap == SWAP_NO ? "without" : "with");
 100
 101         return swap;
 102 }
 103
 104 static void *check_data(u8 *buf, size_t bsize, u32 *swap)
 105 {
 106         u32 word, p = 0; /* possition */
 107
 108         /* Because buf doesn't need to be aligned let's read it by chars */
 109         for (p = 0; p < bsize; p++) {
 110                 word = load_word(&buf[p], SWAP_NO);
 111                 debug("%s: word %x %x/%px\n", __func__, word, p, &buf[p]);
 112
 113                 /* Find the first bitstream dummy word */
 114                 if (word == DUMMY_WORD) {
 115                         debug("%s: Found dummy word at position %x/%px\n",
 116                               __func__, p, &buf[p]);
 117                         *swap = check_header(&buf[p]);
 118                         if (*swap) {
 119                                 /* FIXME add full bitstream checking here */
 120                                 return &buf[p];
 121                         }
 122                 }
 123                 /* Loop can be huge - support CTRL + C */
 124                 if (ctrlc())
 125                         return NULL;
 126         }
 127         return NULL;
 128 }
 129
 130 static ulong zynqmp_align_dma_buffer(u32 *buf, u32 len, u32 swap)
 131 {
 132         u32 *new_buf;
 133         u32 i;
 134
 135         if ((ulong)buf != ALIGN((ulong)buf, ARCH_DMA_MINALIGN)) {
 136                 new_buf = (u32 *)ALIGN((ulong)buf, ARCH_DMA_MINALIGN);
 137
 138                 /*
 139                  * This might be dangerous but permits to flash if
 140                  * ARCH_DMA_MINALIGN is greater than header size
 141                  */
 142                 if (new_buf > (u32 *)buf) {
 143                         debug("%s: Aligned buffer is after buffer start\n",
 144                               __func__);
 145                         new_buf -= ARCH_DMA_MINALIGN;
 146                 }
 147                 printf("%s: Align buffer at %px to %px(swap %d)\n", __func__,
 148                        buf, new_buf, swap);
 149
 150                 for (i = 0; i < (len/4); i++)
 151                         new_buf[i] = load_word(&buf[i], swap);
 152
 153                 buf = new_buf;
 154         } else if ((swap != SWAP_DONE) &&
 155                    (zynqmp_firmware_version() <= PMUFW_V1_0)) {
 156                 /* For bitstream which are aligned */
 157                 new_buf = buf;
 158
 159                 printf("%s: Bitstream is not swapped(%d) - swap it\n", __func__,
 160                        swap);
 161
 162                 for (i = 0; i < (len/4); i++)
 163                         new_buf[i] = load_word(&buf[i], swap);
 164         }
 165
 166         return (ulong)buf;
 167 }
 168
 169 static int zynqmp_validate_bitstream(xilinx_desc *desc, const void *buf,
 170                                    size_t bsize, u32 blocksize, u32 *swap)
 171 {
 172         ulong *buf_start;
 173         ulong diff;
 174
 175         buf_start = check_data((u8 *)buf, blocksize, swap);
 176
 177         if (!buf_start)
 178                 return FPGA_FAIL;
 179
 180         /* Check if data is postpone from start */
 181         diff = (ulong)buf_start - (ulong)buf;
 182         if (diff) {
 183                 printf("%s: Bitstream is not validated yet (diff %lx)\n",
 184                        __func__, diff);
 185                 return FPGA_FAIL;
 186         }
 187
 188         if ((ulong)buf < SZ_1M) {
 189                 printf("%s: Bitstream has to be placed up to 1MB (%px)\n",
 190                        __func__, buf);
 191                 return FPGA_FAIL;
 192         }
 193
 194         return 0;
 195 }
 196
 197 static int zynqmp_load(xilinx_desc *desc, const void *buf, size_t bsize,
 198                      bitstream_type bstype)
 199 {
 200         ALLOC_CACHE_ALIGN_BUFFER(u32, bsizeptr, 1);
 201         u32 swap = 0;
 202         ulong bin_buf;
 203         int ret;
 204         u32 buf_lo, buf_hi;
 205         u32 ret_payload[PAYLOAD_ARG_CNT];
 206         bool xilfpga_old = false;
 207
 208         if (zynqmp_firmware_version() <= PMUFW_V1_0) {
 209                 puts("WARN: PMUFW v1.0 or less is detected\n");
 210                 puts("WARN: Not all bitstream formats are supported\n");
 211                 puts("WARN: Please upgrade PMUFW\n");
 212                 xilfpga_old = true;
 213                 if (zynqmp_validate_bitstream(desc, buf, bsize, bsize, &swap))
 214                         return FPGA_FAIL;
 215                 bsizeptr = (u32 *)&bsize;
 216                 flush_dcache_range((ulong)bsizeptr,
 217                                    (ulong)bsizeptr + sizeof(size_t));
 218                 bstype |= BIT(ZYNQMP_FPGA_BIT_NS);
 219         }
 220
 221         bin_buf = zynqmp_align_dma_buffer((u32 *)buf, bsize, swap);
 222
 223         debug("%s called!\n", __func__);
 224         flush_dcache_range(bin_buf, bin_buf + bsize);
 225
 226         buf_lo = (u32)bin_buf;
 227         buf_hi = upper_32_bits(bin_buf);
 228
 229         if (xilfpga_old)
 230                 ret = xilinx_pm_request(ZYNQMP_SIP_SVC_PM_FPGA_LOAD, buf_lo,
 231                                         buf_hi, (u32)(uintptr_t)bsizeptr,
 232                                         bstype, ret_payload);
 233         else
 234                 ret = xilinx_pm_request(ZYNQMP_SIP_SVC_PM_FPGA_LOAD, buf_lo,
 235                                         buf_hi, (u32)bsize, 0, ret_payload);
 236
 237         if (ret)
 238                 puts("PL FPGA LOAD fail\n");
 239
 240         return ret;
 241 }
 242
 243 #if defined(CONFIG_CMD_FPGA_LOAD_SECURE) && !defined(CONFIG_SPL_BUILD)
 244 static int zynqmp_loads(xilinx_desc *desc, const void *buf, size_t bsize,
 245                         struct fpga_secure_info *fpga_sec_info)
 246 {
 247         int ret;
 248         u32 buf_lo, buf_hi;
 249         u32 ret_payload[PAYLOAD_ARG_CNT];
 250         u8 flag = 0;
 251
 252         flush_dcache_range((ulong)buf, (ulong)buf +
 253                            ALIGN(bsize, CONFIG_SYS_CACHELINE_SIZE));
 254
 255         if (!fpga_sec_info->encflag)
 256                 flag |= BIT(ZYNQMP_FPGA_BIT_ENC_DEV_KEY);
 257
 258         if (fpga_sec_info->userkey_addr &&
 259             fpga_sec_info->encflag == FPGA_ENC_USR_KEY) {
 260                 flush_dcache_range((ulong)fpga_sec_info->userkey_addr,
 261                                    (ulong)fpga_sec_info->userkey_addr +
 262                                    ALIGN(KEY_PTR_LEN,
 263                                          CONFIG_SYS_CACHELINE_SIZE));
 264                 flag |= BIT(ZYNQMP_FPGA_BIT_ENC_USR_KEY);
 265         }
 266
 267         if (!fpga_sec_info->authflag)
 268                 flag |= BIT(ZYNQMP_FPGA_BIT_AUTH_OCM);
 269
 270         if (fpga_sec_info->authflag == ZYNQMP_FPGA_AUTH_DDR)
 271                 flag |= BIT(ZYNQMP_FPGA_BIT_AUTH_DDR);
 272
 273         buf_lo = lower_32_bits((ulong)buf);
 274         buf_hi = upper_32_bits((ulong)buf);
 275
 276         ret = xilinx_pm_request(ZYNQMP_SIP_SVC_PM_FPGA_LOAD, buf_lo,
 277                                 buf_hi,
 278                          (u32)(uintptr_t)fpga_sec_info->userkey_addr,
 279                          flag, ret_payload);
 280         if (ret)
 281                 puts("PL FPGA LOAD fail\n");
 282         else
 283                 puts("Bitstream successfully loaded\n");
 284
 285         return ret;
 286 }
 287 #endif
 288
 289 static int zynqmp_pcap_info(xilinx_desc *desc)
 290 {
 291         int ret;
 292         u32 ret_payload[PAYLOAD_ARG_CNT];
 293
 294         ret = xilinx_pm_request(ZYNQMP_SIP_SVC_PM_FPGA_STATUS, 0, 0, 0,
 295                                 0, ret_payload);
 296         if (!ret)
 297                 printf("PCAP status\t0x%x\n", ret_payload[1]);
 298
 299         return ret;
 300 }
 301
 302 struct xilinx_fpga_op zynqmp_op = {
 303         .load = zynqmp_load,
 304 #if defined CONFIG_CMD_FPGA_LOAD_SECURE
 305         .loads = zynqmp_loads,
 306 #endif
 307         .info = zynqmp_pcap_info,
 308 };