1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) Marvell International Ltd. and its affiliates
6 #include "mv_ddr_regs.h"
7 #include "mv_ddr_sys_env_lib.h"
9 static u32 mv_ddr_board_id_get(void)
11 #if defined(CONFIG_TARGET_DB_88F6820_GP)
15 * Return 0 here for custom board as this should not be used
22 static u32 mv_ddr_board_id_index_get(u32 board_id)
25 * Marvell Boards use 0x10 as base for Board ID:
26 * mask MSB to receive index for board ID
28 return board_id & (MARVELL_BOARD_ID_MASK - 1);
32 * read gpio input for suspend-wakeup indication
33 * return indicating suspend wakeup status:
35 * 1 - supported: read magic word detect wakeup,
36 * 2 - detected wakeup from gpio
38 enum suspend_wakeup_status mv_ddr_sys_env_suspend_wakeup_check(void)
40 u32 reg, board_id_index, gpio;
41 struct board_wakeup_gpio board_gpio[] = MV_BOARD_WAKEUP_GPIO_INFO;
43 board_id_index = mv_ddr_board_id_index_get(mv_ddr_board_id_get());
44 if (!(sizeof(board_gpio) / sizeof(struct board_wakeup_gpio) >
46 printf("\n_failed loading Suspend-Wakeup information (invalid board ID)\n");
47 return SUSPEND_WAKEUP_DISABLED;
51 * - Detect if Suspend-Wakeup is supported on current board
52 * - Fetch the GPIO number for wakeup status input indication
54 if (board_gpio[board_id_index].gpio_num == -1) {
55 /* Suspend to RAM is not supported */
56 return SUSPEND_WAKEUP_DISABLED;
57 } else if (board_gpio[board_id_index].gpio_num == -2) {
59 * Suspend to RAM is supported but GPIO indication is
60 * not implemented - Skip
62 return SUSPEND_WAKEUP_ENABLED;
64 gpio = board_gpio[board_id_index].gpio_num;
67 /* Initialize MPP for GPIO (set MPP = 0x0) */
68 reg = reg_read(MPP_CONTROL_REG(MPP_REG_NUM(gpio)));
69 /* reset MPP21 to 0x0, keep rest of MPP settings*/
70 reg &= ~MPP_MASK(gpio);
71 reg_write(MPP_CONTROL_REG(MPP_REG_NUM(gpio)), reg);
73 /* Initialize GPIO as input */
74 reg = reg_read(GPP_DATA_OUT_EN_REG(GPP_REG_NUM(gpio)));
75 reg |= GPP_MASK(gpio);
76 reg_write(GPP_DATA_OUT_EN_REG(GPP_REG_NUM(gpio)), reg);
79 * Check GPP for input status from PIC: 0 - regular init,
82 reg = reg_read(GPP_DATA_IN_REG(GPP_REG_NUM(gpio)));
84 /* if GPIO is ON: wakeup from S2RAM indication detected */
85 return (reg & GPP_MASK(gpio)) ? SUSPEND_WAKEUP_ENABLED_GPIO_DETECTED :
86 SUSPEND_WAKEUP_DISABLED;
90 * get bit mask of enabled cs
91 * return bit mask of enabled cs:
92 * 1 - only cs0 enabled,
93 * 3 - both cs0 and cs1 enabled
95 u32 mv_ddr_sys_env_get_cs_ena_from_reg(void)
97 return reg_read(DDR3_RANK_CTRL_REG) &
98 ((CS_EXIST_MASK << CS_EXIST_OFFS(0)) |
99 (CS_EXIST_MASK << CS_EXIST_OFFS(1)) |
100 (CS_EXIST_MASK << CS_EXIST_OFFS(2)) |
101 (CS_EXIST_MASK << CS_EXIST_OFFS(3)));