1 // SPDX-License-Identifier: GPL-2.0
3 * Copyright (C) Marvell International Ltd. and its affiliates
6 #include "mv_ddr_spd.h"
8 #define MV_DDR_SPD_DATA_MTB 125 /* medium timebase, ps */
9 #define MV_DDR_SPD_DATA_FTB 1 /* fine timebase, ps */
10 #define MV_DDR_SPD_MSB_OFFS 8 /* most significant byte offset, bits */
12 #define MV_DDR_SPD_SUPPORTED_CLS_NUM 30
14 static unsigned int mv_ddr_spd_supported_cls[MV_DDR_SPD_SUPPORTED_CLS_NUM];
16 int mv_ddr_spd_supported_cls_calc(union mv_ddr_spd_data *spd_data)
18 unsigned int byte, bit, start_cl;
20 start_cl = (spd_data->all_bytes[23] & 0x8) ? 23 : 7;
22 for (byte = 20; byte < 23; byte++) {
23 for (bit = 0; bit < 8; bit++) {
24 if (spd_data->all_bytes[byte] & (1 << bit))
25 mv_ddr_spd_supported_cls[(byte - 20) * 8 + bit] = start_cl + (byte - 20) * 8 + bit;
27 mv_ddr_spd_supported_cls[(byte - 20) * 8 + bit] = 0;
31 for (byte = 23, bit = 0; bit < 6; bit++) {
32 if (spd_data->all_bytes[byte] & (1 << bit))
33 mv_ddr_spd_supported_cls[(byte - 20) * 8 + bit] = start_cl + (byte - 20) * 8 + bit;
35 mv_ddr_spd_supported_cls[(byte - 20) * 8 + bit] = 0;
41 unsigned int mv_ddr_spd_supported_cl_get(unsigned int cl)
43 unsigned int supported_cl;
46 while (i < MV_DDR_SPD_SUPPORTED_CLS_NUM &&
47 mv_ddr_spd_supported_cls[i] < cl)
50 if (i < MV_DDR_SPD_SUPPORTED_CLS_NUM)
51 supported_cl = mv_ddr_spd_supported_cls[i];
58 int mv_ddr_spd_timing_calc(union mv_ddr_spd_data *spd_data, unsigned int timing_data[])
62 /* t ck avg min, ps */
63 calc_val = spd_data->byte_fields.byte_18 * MV_DDR_SPD_DATA_MTB +
64 (signed char)spd_data->byte_fields.byte_125 * MV_DDR_SPD_DATA_FTB;
67 timing_data[MV_DDR_TCK_AVG_MIN] = calc_val;
70 calc_val = spd_data->byte_fields.byte_24 * MV_DDR_SPD_DATA_MTB +
71 (signed char)spd_data->byte_fields.byte_123 * MV_DDR_SPD_DATA_FTB;
74 timing_data[MV_DDR_TAA_MIN] = calc_val;
77 timing_data[MV_DDR_TRFC1_MIN] = (spd_data->byte_fields.byte_30 +
78 (spd_data->byte_fields.byte_31 << MV_DDR_SPD_MSB_OFFS)) * MV_DDR_SPD_DATA_MTB;
81 timing_data[MV_DDR_TWR_MIN] = (spd_data->byte_fields.byte_42 +
82 (spd_data->byte_fields.byte_41.bit_fields.t_wr_min_msn << MV_DDR_SPD_MSB_OFFS)) *
86 calc_val = spd_data->byte_fields.byte_25 * MV_DDR_SPD_DATA_MTB +
87 (signed char)spd_data->byte_fields.byte_122 * MV_DDR_SPD_DATA_FTB;
90 timing_data[MV_DDR_TRCD_MIN] = calc_val;
93 calc_val = spd_data->byte_fields.byte_26 * MV_DDR_SPD_DATA_MTB +
94 (signed char)spd_data->byte_fields.byte_121 * MV_DDR_SPD_DATA_FTB;
97 timing_data[MV_DDR_TRP_MIN] = calc_val;
100 calc_val = (spd_data->byte_fields.byte_29 +
101 (spd_data->byte_fields.byte_27.bit_fields.t_rc_min_msn << MV_DDR_SPD_MSB_OFFS)) *
102 MV_DDR_SPD_DATA_MTB +
103 (signed char)spd_data->byte_fields.byte_120 * MV_DDR_SPD_DATA_FTB;
106 timing_data[MV_DDR_TRC_MIN] = calc_val;
109 timing_data[MV_DDR_TRAS_MIN] = (spd_data->byte_fields.byte_28 +
110 (spd_data->byte_fields.byte_27.bit_fields.t_ras_min_msn << MV_DDR_SPD_MSB_OFFS)) *
113 /* t rrd s min, ps */
114 calc_val = spd_data->byte_fields.byte_38 * MV_DDR_SPD_DATA_MTB +
115 (signed char)spd_data->byte_fields.byte_119 * MV_DDR_SPD_DATA_FTB;
118 timing_data[MV_DDR_TRRD_S_MIN] = calc_val;
120 /* t rrd l min, ps */
121 calc_val = spd_data->byte_fields.byte_39 * MV_DDR_SPD_DATA_MTB +
122 (signed char)spd_data->byte_fields.byte_118 * MV_DDR_SPD_DATA_FTB;
125 timing_data[MV_DDR_TRRD_L_MIN] = calc_val;
127 /* t ccd l min, ps */
128 calc_val = spd_data->byte_fields.byte_40 * MV_DDR_SPD_DATA_MTB +
129 (signed char)spd_data->byte_fields.byte_117 * MV_DDR_SPD_DATA_FTB;
132 timing_data[MV_DDR_TCCD_L_MIN] = calc_val;
135 timing_data[MV_DDR_TFAW_MIN] = (spd_data->byte_fields.byte_37 +
136 (spd_data->byte_fields.byte_36.bit_fields.t_faw_min_msn << MV_DDR_SPD_MSB_OFFS)) *
139 /* t wtr s min, ps */
140 timing_data[MV_DDR_TWTR_S_MIN] = (spd_data->byte_fields.byte_44 +
141 (spd_data->byte_fields.byte_43.bit_fields.t_wtr_s_min_msn << MV_DDR_SPD_MSB_OFFS)) *
144 /* t wtr l min, ps */
145 timing_data[MV_DDR_TWTR_L_MIN] = (spd_data->byte_fields.byte_45 +
146 (spd_data->byte_fields.byte_43.bit_fields.t_wtr_l_min_msn << MV_DDR_SPD_MSB_OFFS)) *
152 enum mv_ddr_dev_width mv_ddr_spd_dev_width_get(union mv_ddr_spd_data *spd_data)
154 unsigned char dev_width = spd_data->byte_fields.byte_12.bit_fields.device_width;
155 enum mv_ddr_dev_width ret_val;
159 ret_val = MV_DDR_DEV_WIDTH_4BIT;
162 ret_val = MV_DDR_DEV_WIDTH_8BIT;
165 ret_val = MV_DDR_DEV_WIDTH_16BIT;
168 ret_val = MV_DDR_DEV_WIDTH_32BIT;
171 ret_val = MV_DDR_DEV_WIDTH_LAST;
177 enum mv_ddr_die_capacity mv_ddr_spd_die_capacity_get(union mv_ddr_spd_data *spd_data)
179 unsigned char die_cap = spd_data->byte_fields.byte_4.bit_fields.die_capacity;
180 enum mv_ddr_die_capacity ret_val;
184 ret_val = MV_DDR_DIE_CAP_256MBIT;
187 ret_val = MV_DDR_DIE_CAP_512MBIT;
190 ret_val = MV_DDR_DIE_CAP_1GBIT;
193 ret_val = MV_DDR_DIE_CAP_2GBIT;
196 ret_val = MV_DDR_DIE_CAP_4GBIT;
199 ret_val = MV_DDR_DIE_CAP_8GBIT;
202 ret_val = MV_DDR_DIE_CAP_16GBIT;
205 ret_val = MV_DDR_DIE_CAP_32GBIT;
208 ret_val = MV_DDR_DIE_CAP_12GBIT;
211 ret_val = MV_DDR_DIE_CAP_24GBIT;
214 ret_val = MV_DDR_DIE_CAP_LAST;
220 unsigned char mv_ddr_spd_mem_mirror_get(union mv_ddr_spd_data *spd_data)
222 unsigned char mem_mirror = spd_data->byte_fields.byte_131.bit_fields.rank_1_mapping;
227 enum mv_ddr_pkg_rank mv_ddr_spd_pri_bus_width_get(union mv_ddr_spd_data *spd_data)
229 unsigned char pri_bus_width = spd_data->byte_fields.byte_13.bit_fields.primary_bus_width;
230 enum mv_ddr_pri_bus_width ret_val;
232 switch (pri_bus_width) {
234 ret_val = MV_DDR_PRI_BUS_WIDTH_8;
237 ret_val = MV_DDR_PRI_BUS_WIDTH_16;
240 ret_val = MV_DDR_PRI_BUS_WIDTH_32;
243 ret_val = MV_DDR_PRI_BUS_WIDTH_64;
246 ret_val = MV_DDR_PRI_BUS_WIDTH_LAST;
252 enum mv_ddr_pkg_rank mv_ddr_spd_bus_width_ext_get(union mv_ddr_spd_data *spd_data)
254 unsigned char bus_width_ext = spd_data->byte_fields.byte_13.bit_fields.bus_width_ext;
255 enum mv_ddr_bus_width_ext ret_val;
257 switch (bus_width_ext) {
259 ret_val = MV_DDR_BUS_WIDTH_EXT_0;
262 ret_val = MV_DDR_BUS_WIDTH_EXT_8;
265 ret_val = MV_DDR_BUS_WIDTH_EXT_LAST;
271 static enum mv_ddr_pkg_rank mv_ddr_spd_pkg_rank_get(union mv_ddr_spd_data *spd_data)
273 unsigned char pkg_rank = spd_data->byte_fields.byte_12.bit_fields.dimm_pkg_ranks_num;
274 enum mv_ddr_pkg_rank ret_val;
278 ret_val = MV_DDR_PKG_RANK_1;
281 ret_val = MV_DDR_PKG_RANK_2;
284 ret_val = MV_DDR_PKG_RANK_3;
287 ret_val = MV_DDR_PKG_RANK_4;
290 ret_val = MV_DDR_PKG_RANK_5;
293 ret_val = MV_DDR_PKG_RANK_6;
296 ret_val = MV_DDR_PKG_RANK_7;
299 ret_val = MV_DDR_PKG_RANK_8;
302 ret_val = MV_DDR_PKG_RANK_LAST;
308 static enum mv_ddr_die_count mv_ddr_spd_die_count_get(union mv_ddr_spd_data *spd_data)
310 unsigned char die_count = spd_data->byte_fields.byte_6.bit_fields.die_count;
311 enum mv_ddr_die_count ret_val;
315 ret_val = MV_DDR_DIE_CNT_1;
318 ret_val = MV_DDR_DIE_CNT_2;
321 ret_val = MV_DDR_DIE_CNT_3;
324 ret_val = MV_DDR_DIE_CNT_4;
327 ret_val = MV_DDR_DIE_CNT_5;
330 ret_val = MV_DDR_DIE_CNT_6;
333 ret_val = MV_DDR_DIE_CNT_7;
336 ret_val = MV_DDR_DIE_CNT_8;
339 ret_val = MV_DDR_DIE_CNT_LAST;
345 unsigned char mv_ddr_spd_cs_bit_mask_get(union mv_ddr_spd_data *spd_data)
347 unsigned char cs_bit_mask = 0x0;
348 enum mv_ddr_pkg_rank pkg_rank = mv_ddr_spd_pkg_rank_get(spd_data);
349 enum mv_ddr_die_count die_cnt = mv_ddr_spd_die_count_get(spd_data);
351 if (pkg_rank == MV_DDR_PKG_RANK_1 && die_cnt == MV_DDR_DIE_CNT_1)
353 else if (pkg_rank == MV_DDR_PKG_RANK_1 && die_cnt == MV_DDR_DIE_CNT_2)
355 else if (pkg_rank == MV_DDR_PKG_RANK_2 && die_cnt == MV_DDR_DIE_CNT_1)
357 else if (pkg_rank == MV_DDR_PKG_RANK_2 && die_cnt == MV_DDR_DIE_CNT_2)
363 unsigned char mv_ddr_spd_dev_type_get(union mv_ddr_spd_data *spd_data)
365 unsigned char dev_type = spd_data->byte_fields.byte_2;
370 unsigned char mv_ddr_spd_module_type_get(union mv_ddr_spd_data *spd_data)
372 unsigned char module_type = spd_data->byte_fields.byte_3.bit_fields.module_type;