drivers/cpu/imx8_cpu.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright 2019 NXP
   4  */
   5
   6 #include <common.h>
   7 #include <cpu.h>
   8 #include <dm.h>
   9 #include <thermal.h>
  10 #include <asm/system.h>
  11 #include <asm/arch/sci/sci.h>
  12 #include <asm/arch/sys_proto.h>
  13 #include <asm/arch-imx/cpu.h>
  14 #include <asm/armv8/cpu.h>
  15 #include <linux/bitops.h>
  16
  17 DECLARE_GLOBAL_DATA_PTR;
  18
  19 struct cpu_imx_platdata {
  20         const char *name;
  21         const char *rev;
  22         const char *type;
  23         u32 cpurev;
  24         u32 freq_mhz;
  25         u32 mpidr;
  26 };
  27
  28 const char *get_imx8_type(u32 imxtype)
  29 {
  30         switch (imxtype) {
  31         case MXC_CPU_IMX8QXP:
  32         case MXC_CPU_IMX8QXP_A0:
  33                 return "QXP";
  34         case MXC_CPU_IMX8QM:
  35                 return "QM";
  36         default:
  37                 return "??";
  38         }
  39 }
  40
  41 const char *get_imx8_rev(u32 rev)
  42 {
  43         switch (rev) {
  44         case CHIP_REV_A:
  45                 return "A";
  46         case CHIP_REV_B:
  47                 return "B";
  48         case CHIP_REV_C:
  49                 return "C";
  50         default:
  51                 return "?";
  52         }
  53 }
  54
  55 const char *get_core_name(struct udevice *dev)
  56 {
  57         if (!device_is_compatible(dev, "arm,cortex-a35"))
  58                 return "A35";
  59         else if (!device_is_compatible(dev, "arm,cortex-a53"))
  60                 return "A53";
  61         else if (!device_is_compatible(dev, "arm,cortex-a72"))
  62                 return "A72";
  63         else
  64                 return "?";
  65 }
  66
  67 #if IS_ENABLED(CONFIG_IMX_SCU_THERMAL)
  68 static int cpu_imx_get_temp(struct cpu_imx_platdata *plat)
  69 {
  70         struct udevice *thermal_dev;
  71         int cpu_tmp, ret;
  72
  73         if (!strcmp(plat->name, "A72"))
  74                 ret = uclass_get_device(UCLASS_THERMAL, 1, &thermal_dev);
  75         else
  76                 ret = uclass_get_device(UCLASS_THERMAL, 0, &thermal_dev);
  77
  78         if (!ret) {
  79                 ret = thermal_get_temp(thermal_dev, &cpu_tmp);
  80                 if (ret)
  81                         return 0xdeadbeef;
  82         } else {
  83                 return 0xdeadbeef;
  84         }
  85
  86         return cpu_tmp;
  87 }
  88 #else
  89 static int cpu_imx_get_temp(struct cpu_imx_platdata *plat)
  90 {
  91         return 0;
  92 }
  93 #endif
  94
  95 int cpu_imx_get_desc(struct udevice *dev, char *buf, int size)
  96 {
  97         struct cpu_imx_platdata *plat = dev_get_platdata(dev);
  98         int ret, temp;
  99
 100         if (size < 100)
 101                 return -ENOSPC;
 102
 103         ret = snprintf(buf, size, "NXP i.MX8%s Rev%s %s at %u MHz",
 104                        plat->type, plat->rev, plat->name, plat->freq_mhz);
 105
 106         if (IS_ENABLED(CONFIG_IMX_SCU_THERMAL)) {
 107                 temp = cpu_imx_get_temp(plat);
 108                 buf = buf + ret;
 109                 size = size - ret;
 110                 if (temp != 0xdeadbeef)
 111                         ret = snprintf(buf, size, " at %dC", temp);
 112                 else
 113                         ret = snprintf(buf, size, " - invalid sensor data");
 114         }
 115
 116         snprintf(buf + ret, size - ret, "\n");
 117
 118         return 0;
 119 }
 120
 121 static int cpu_imx_get_info(struct udevice *dev, struct cpu_info *info)
 122 {
 123         struct cpu_imx_platdata *plat = dev_get_platdata(dev);
 124
 125         info->cpu_freq = plat->freq_mhz * 1000;
 126         info->features = BIT(CPU_FEAT_L1_CACHE) | BIT(CPU_FEAT_MMU);
 127         return 0;
 128 }
 129
 130 static int cpu_imx_get_count(struct udevice *dev)
 131 {
 132         ofnode node;
 133         int num = 0;
 134
 135         ofnode_for_each_subnode(node, dev_ofnode(dev->parent)) {
 136                 const char *device_type;
 137
 138                 if (!ofnode_is_available(node))
 139                         continue;
 140
 141                 device_type = ofnode_read_string(node, "device_type");
 142                 if (!device_type)
 143                         continue;
 144
 145                 if (!strcmp(device_type, "cpu"))
 146                         num++;
 147         }
 148
 149         return num;
 150 }
 151
 152 static int cpu_imx_get_vendor(struct udevice *dev,  char *buf, int size)
 153 {
 154         snprintf(buf, size, "NXP");
 155         return 0;
 156 }
 157
 158 static int cpu_imx_is_current(struct udevice *dev)
 159 {
 160         struct cpu_imx_platdata *plat = dev_get_platdata(dev);
 161
 162         if (plat->mpidr == (read_mpidr() & 0xffff))
 163                 return 1;
 164
 165         return 0;
 166 }
 167
 168 static const struct cpu_ops cpu_imx8_ops = {
 169         .get_desc       = cpu_imx_get_desc,
 170         .get_info       = cpu_imx_get_info,
 171         .get_count      = cpu_imx_get_count,
 172         .get_vendor     = cpu_imx_get_vendor,
 173         .is_current     = cpu_imx_is_current,
 174 };
 175
 176 static const struct udevice_id cpu_imx8_ids[] = {
 177         { .compatible = "arm,cortex-a35" },
 178         { .compatible = "arm,cortex-a53" },
 179         { .compatible = "arm,cortex-a72" },
 180         { }
 181 };
 182
 183 static ulong imx8_get_cpu_rate(struct udevice *dev)
 184 {
 185         ulong rate;
 186         int ret, type;
 187
 188         if (!device_is_compatible(dev, "arm,cortex-a35"))
 189                 type = SC_R_A35;
 190         else if (!device_is_compatible(dev, "arm,cortex-a53"))
 191                 type = SC_R_A53;
 192         else if (!device_is_compatible(dev, "arm,cortex-a72"))
 193                 type = SC_R_A72;
 194         else
 195                 return 0;
 196
 197         ret = sc_pm_get_clock_rate(-1, type, SC_PM_CLK_CPU,
 198                                    (sc_pm_clock_rate_t *)&rate);
 199         if (ret) {
 200                 printf("Could not read CPU frequency: %d\n", ret);
 201                 return 0;
 202         }
 203
 204         return rate;
 205 }
 206
 207 static int imx8_cpu_probe(struct udevice *dev)
 208 {
 209         struct cpu_imx_platdata *plat = dev_get_platdata(dev);
 210         u32 cpurev;
 211
 212         cpurev = get_cpu_rev();
 213         plat->cpurev = cpurev;
 214         plat->name = get_core_name(dev);
 215         plat->rev = get_imx8_rev(cpurev & 0xFFF);
 216         plat->type = get_imx8_type((cpurev & 0xFF000) >> 12);
 217         plat->freq_mhz = imx8_get_cpu_rate(dev) / 1000000;
 218         plat->mpidr = dev_read_addr(dev);
 219         if (plat->mpidr == FDT_ADDR_T_NONE) {
 220                 printf("%s: Failed to get CPU reg property\n", __func__);
 221                 return -EINVAL;
 222         }
 223
 224         return 0;
 225 }
 226
 227 U_BOOT_DRIVER(cpu_imx8_drv) = {
 228         .name           = "imx8x_cpu",
 229         .id             = UCLASS_CPU,
 230         .of_match       = cpu_imx8_ids,
 231         .ops            = &cpu_imx8_ops,
 232         .probe          = imx8_cpu_probe,
 233         .platdata_auto_alloc_size = sizeof(struct cpu_imx_platdata),
 234         .flags          = DM_FLAG_PRE_RELOC,
 235 };