2 * Copyright (C) 2016 Socionext Inc.
3 * Author: Masahiro Yamada <yamada.masahiro@socionext.com>
5 * SPDX-License-Identifier: GPL-2.0+
10 #include "clk-uniphier.h"
12 #define UNIPHIER_MIO_CLK_GATE_SD(ch, idx) \
15 .reg = 0x20 + 0x200 * (ch), \
21 .reg = 0x110 + 0x200 * (ch), \
26 #define UNIPHIER_MIO_CLK_RATE_SD(ch, idx) \
29 .reg = 0x30 + 0x200 * (ch), \
36 .reg = 0x30 + 0x200 * (ch), \
43 .reg = 0x30 + 0x200 * (ch), \
50 .reg = 0x30 + 0x200 * (ch), \
57 .reg = 0x30 + 0x200 * (ch), \
64 .reg = 0x30 + 0x200 * (ch), \
71 .reg = 0x30 + 0x200 * (ch), \
78 .reg = 0x30 + 0x200 * (ch), \
84 #define UNIPHIER_MIO_CLK_GATE_USB(ch, idx) \
87 .reg = 0x20 + 0x200 * (ch), \
93 .reg = 0x110 + 0x200 * (ch), \
99 .reg = 0x114 + 0x200 * (ch), \
100 .mask = 0x00000001, \
101 .data = 0x00000001, \
104 #define UNIPHIER_MIO_CLK_GATE_DMAC(idx) \
108 .mask = 0x02000000, \
109 .data = 0x02000000, \
114 .mask = 0x00020000, \
115 .data = 0x00020000, \
118 static struct uniphier_clk_gate_data uniphier_mio_clk_gate[] = {
119 UNIPHIER_MIO_CLK_GATE_SD(0, 0),
120 UNIPHIER_MIO_CLK_GATE_SD(1, 1),
121 UNIPHIER_MIO_CLK_GATE_SD(2, 2), /* for PH1-Pro4 only */
122 UNIPHIER_MIO_CLK_GATE_USB(0, 3),
123 UNIPHIER_MIO_CLK_GATE_USB(1, 4),
124 UNIPHIER_MIO_CLK_GATE_USB(2, 5),
125 UNIPHIER_MIO_CLK_GATE_DMAC(6),
126 UNIPHIER_MIO_CLK_GATE_USB(3, 7), /* for PH1-sLD3 only */
129 static struct uniphier_clk_rate_data uniphier_mio_clk_rate[] = {
130 UNIPHIER_MIO_CLK_RATE_SD(0, 0),
131 UNIPHIER_MIO_CLK_RATE_SD(1, 1),
132 UNIPHIER_MIO_CLK_RATE_SD(2, 2), /* for PH1-Pro4 only */
135 static struct uniphier_clk_soc_data uniphier_mio_clk_data = {
136 .gate = uniphier_mio_clk_gate,
137 .nr_gate = ARRAY_SIZE(uniphier_mio_clk_gate),
138 .rate = uniphier_mio_clk_rate,
139 .nr_rate = ARRAY_SIZE(uniphier_mio_clk_rate),
142 static const struct udevice_id uniphier_mio_clk_match[] = {
144 .compatible = "socionext,ph1-sld3-mioctrl",
145 .data = (ulong)&uniphier_mio_clk_data,
148 .compatible = "socionext,ph1-ld4-mioctrl",
149 .data = (ulong)&uniphier_mio_clk_data,
152 .compatible = "socionext,ph1-pro4-mioctrl",
153 .data = (ulong)&uniphier_mio_clk_data,
156 .compatible = "socionext,ph1-sld8-mioctrl",
157 .data = (ulong)&uniphier_mio_clk_data,
160 .compatible = "socionext,ph1-pro5-mioctrl",
161 .data = (ulong)&uniphier_mio_clk_data,
164 .compatible = "socionext,proxstream2-mioctrl",
165 .data = (ulong)&uniphier_mio_clk_data,
168 .compatible = "socionext,ph1-ld11-mioctrl",
169 .data = (ulong)&uniphier_mio_clk_data,
172 .compatible = "socionext,ph1-ld20-mioctrl",
173 .data = (ulong)&uniphier_mio_clk_data,
178 U_BOOT_DRIVER(uniphier_mio_clk) = {
179 .name = "uniphier-mio-clk",
181 .of_match = uniphier_mio_clk_match,
182 .probe = uniphier_clk_probe,
183 .priv_auto_alloc_size = sizeof(struct uniphier_clk_priv),
184 .ops = &uniphier_clk_ops,