drivers/clk/uniphier/clk-uniphier-mio.c

   1 /*
   2  * Copyright (C) 2016 Masahiro Yamada <yamada.masahiro@socionext.com>
   3  *
   4  * SPDX-License-Identifier:     GPL-2.0+
   5  */
   6
   7 #include <dm/device.h>
   8
   9 #include "clk-uniphier.h"
  10
  11 #define UNIPHIER_MIO_CLK_GATE_SD(ch, idx)       \
  12         {                                       \
  13                 .index = (idx),                 \
  14                 .reg = 0x20 + 0x200 * (ch),     \
  15                 .mask = 0x00000100,             \
  16                 .data = 0x00000100,             \
  17         },                                      \
  18         {                                       \
  19                 .index = (idx),                 \
  20                 .reg = 0x110 + 0x200 * (ch),    \
  21                 .mask = 0x00000001,             \
  22                 .data = 0x00000001,             \
  23         }
  24
  25 #define UNIPHIER_MIO_CLK_RATE_SD(ch, idx)       \
  26         {                                       \
  27                 .index = (idx),                 \
  28                 .reg = 0x30 + 0x200 * (ch),     \
  29                 .mask = 0x00031300,             \
  30                 .data = 0x00000000,             \
  31                 .rate = 44444444,               \
  32         },                                      \
  33         {                                       \
  34                 .index = (idx),                 \
  35                 .reg = 0x30 + 0x200 * (ch),     \
  36                 .mask = 0x00031300,             \
  37                 .data = 0x00010000,             \
  38                 .rate = 33333333,               \
  39         },                                      \
  40         {                                       \
  41                 .index = (idx),                 \
  42                 .reg = 0x30 + 0x200 * (ch),     \
  43                 .mask = 0x00031300,             \
  44                 .data = 0x00020000,             \
  45                 .rate = 50000000,               \
  46         },                                      \
  47         {                                       \
  48                 .index = (idx),                 \
  49                 .reg = 0x30 + 0x200 * (ch),     \
  50                 .mask = 0x00031300,             \
  51                 .data = 0x00020000,             \
  52                 .rate = 66666666,               \
  53         },                                      \
  54         {                                       \
  55                 .index = (idx),                 \
  56                 .reg = 0x30 + 0x200 * (ch),     \
  57                 .mask = 0x00031300,             \
  58                 .data = 0x00001000,             \
  59                 .rate = 100000000,              \
  60         },                                      \
  61         {                                       \
  62                 .index = (idx),                 \
  63                 .reg = 0x30 + 0x200 * (ch),     \
  64                 .mask = 0x00031300,             \
  65                 .data = 0x00001100,             \
  66                 .rate = 40000000,               \
  67         },                                      \
  68         {                                       \
  69                 .index = (idx),                 \
  70                 .reg = 0x30 + 0x200 * (ch),     \
  71                 .mask = 0x00031300,             \
  72                 .data = 0x00001200,             \
  73                 .rate = 25000000,               \
  74         },                                      \
  75         {                                       \
  76                 .index = (idx),                 \
  77                 .reg = 0x30 + 0x200 * (ch),     \
  78                 .mask = 0x00031300,             \
  79                 .data = 0x00001300,             \
  80                 .rate = 22222222,               \
  81         }
  82
  83 #define UNIPHIER_MIO_CLK_GATE_USB(ch, idx)      \
  84         {                                       \
  85                 .index = (idx),                 \
  86                 .reg = 0x20 + 0x200 * (ch),     \
  87                 .mask = 0x30000000,             \
  88                 .data = 0x30000000,             \
  89         },                                      \
  90         {                                       \
  91                 .index = (idx),                 \
  92                 .reg = 0x110 + 0x200 * (ch),    \
  93                 .mask = 0x01000000,             \
  94                 .data = 0x01000000,             \
  95         },                                      \
  96         {                                       \
  97                 .index = (idx),                 \
  98                 .reg = 0x114 + 0x200 * (ch),    \
  99                 .mask = 0x00000001,             \
 100                 .data = 0x00000001,             \
 101         }
 102
 103 #define UNIPHIER_MIO_CLK_GATE_DMAC(idx)         \
 104         {                                       \
 105                 .index = (idx),                 \
 106                 .reg = 0x20,                    \
 107                 .mask = 0x02000000,             \
 108                 .data = 0x02000000,             \
 109         },                                      \
 110         {                                       \
 111                 .index = (idx),                 \
 112                 .reg = 0x110,                   \
 113                 .mask = 0x00020000,             \
 114                 .data = 0x00020000,             \
 115         }
 116
 117 static struct uniphier_clk_gate_data uniphier_mio_clk_gate[] = {
 118         UNIPHIER_MIO_CLK_GATE_SD(0, 0),
 119         UNIPHIER_MIO_CLK_GATE_SD(1, 1),
 120         UNIPHIER_MIO_CLK_GATE_SD(2, 2),         /* for PH1-Pro4 only */
 121         UNIPHIER_MIO_CLK_GATE_USB(0, 3),
 122         UNIPHIER_MIO_CLK_GATE_USB(1, 4),
 123         UNIPHIER_MIO_CLK_GATE_USB(2, 5),
 124         UNIPHIER_MIO_CLK_GATE_DMAC(6),
 125         UNIPHIER_MIO_CLK_GATE_USB(3, 7),        /* for PH1-sLD3 only */
 126 };
 127
 128 static struct uniphier_clk_rate_data uniphier_mio_clk_rate[] = {
 129         UNIPHIER_MIO_CLK_RATE_SD(0, 0),
 130         UNIPHIER_MIO_CLK_RATE_SD(1, 1),
 131         UNIPHIER_MIO_CLK_RATE_SD(2, 2),         /* for PH1-Pro4 only */
 132 };
 133
 134 static struct uniphier_clk_soc_data uniphier_mio_clk_data = {
 135         .gate = uniphier_mio_clk_gate,
 136         .nr_gate = ARRAY_SIZE(uniphier_mio_clk_gate),
 137         .rate = uniphier_mio_clk_rate,
 138         .nr_rate = ARRAY_SIZE(uniphier_mio_clk_rate),
 139 };
 140
 141 static const struct udevice_id uniphier_mio_clk_match[] = {
 142         {
 143                 .compatible = "socionext,ph1-sld3-mioctrl",
 144                 .data = (ulong)&uniphier_mio_clk_data,
 145         },
 146         {
 147                 .compatible = "socionext,ph1-ld4-mioctrl",
 148                 .data = (ulong)&uniphier_mio_clk_data,
 149         },
 150         {
 151                 .compatible = "socionext,ph1-pro4-mioctrl",
 152                 .data = (ulong)&uniphier_mio_clk_data,
 153         },
 154         {
 155                 .compatible = "socionext,ph1-sld8-mioctrl",
 156                 .data = (ulong)&uniphier_mio_clk_data,
 157         },
 158         {
 159                 .compatible = "socionext,ph1-pro5-mioctrl",
 160                 .data = (ulong)&uniphier_mio_clk_data,
 161         },
 162         {
 163                 .compatible = "socionext,proxstream2-mioctrl",
 164                 .data = (ulong)&uniphier_mio_clk_data,
 165         },
 166         {
 167                 .compatible = "socionext,ph1-ld11-mioctrl",
 168                 .data = (ulong)&uniphier_mio_clk_data,
 169         },
 170         {
 171                 .compatible = "socionext,ph1-ld20-mioctrl",
 172                 .data = (ulong)&uniphier_mio_clk_data,
 173         },
 174         { /* sentinel */ }
 175 };
 176
 177 U_BOOT_DRIVER(uniphier_mio_clk) = {
 178         .name = "uniphier-mio-clk",
 179         .id = UCLASS_CLK,
 180         .of_match = uniphier_mio_clk_match,
 181         .probe = uniphier_clk_probe,
 182         .remove = uniphier_clk_remove,
 183         .priv_auto_alloc_size = sizeof(struct uniphier_clk_priv),
 184         .ops = &uniphier_clk_ops,
 185 };