clk: sunxi: r40: Fix GMAC reset reg offset
[oweals/u-boot.git] / drivers / clk / sunxi / clk_v3s.c
1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2 /*
3  * Copyright (C) 2018 Amarula Solutions.
4  * Author: Jagan Teki <jagan@amarulasolutions.com>
5  */
6
7 #include <common.h>
8 #include <clk-uclass.h>
9 #include <dm.h>
10 #include <errno.h>
11 #include <asm/arch/ccu.h>
12 #include <dt-bindings/clock/sun8i-v3s-ccu.h>
13 #include <dt-bindings/reset/sun8i-v3s-ccu.h>
14
15 static struct ccu_clk_gate v3s_gates[] = {
16         [CLK_BUS_MMC0]          = GATE(0x060, BIT(8)),
17         [CLK_BUS_MMC1]          = GATE(0x060, BIT(9)),
18         [CLK_BUS_MMC2]          = GATE(0x060, BIT(10)),
19         [CLK_BUS_SPI0]          = GATE(0x060, BIT(20)),
20         [CLK_BUS_OTG]           = GATE(0x060, BIT(24)),
21
22         [CLK_BUS_UART0]         = GATE(0x06c, BIT(16)),
23         [CLK_BUS_UART1]         = GATE(0x06c, BIT(17)),
24         [CLK_BUS_UART2]         = GATE(0x06c, BIT(18)),
25
26         [CLK_SPI0]              = GATE(0x0a0, BIT(31)),
27
28         [CLK_USB_PHY0]          = GATE(0x0cc, BIT(8)),
29 };
30
31 static struct ccu_reset v3s_resets[] = {
32         [RST_USB_PHY0]          = RESET(0x0cc, BIT(0)),
33
34         [RST_BUS_MMC0]          = RESET(0x2c0, BIT(8)),
35         [RST_BUS_MMC1]          = RESET(0x2c0, BIT(9)),
36         [RST_BUS_MMC2]          = RESET(0x2c0, BIT(10)),
37         [RST_BUS_SPI0]          = RESET(0x2c0, BIT(20)),
38         [RST_BUS_OTG]           = RESET(0x2c0, BIT(24)),
39
40         [RST_BUS_UART0]         = RESET(0x2d8, BIT(16)),
41         [RST_BUS_UART1]         = RESET(0x2d8, BIT(17)),
42         [RST_BUS_UART2]         = RESET(0x2d8, BIT(18)),
43 };
44
45 static const struct ccu_desc v3s_ccu_desc = {
46         .gates = v3s_gates,
47         .resets = v3s_resets,
48 };
49
50 static int v3s_clk_bind(struct udevice *dev)
51 {
52         return sunxi_reset_bind(dev, ARRAY_SIZE(v3s_resets));
53 }
54
55 static const struct udevice_id v3s_clk_ids[] = {
56         { .compatible = "allwinner,sun8i-v3s-ccu",
57           .data = (ulong)&v3s_ccu_desc },
58         { }
59 };
60
61 U_BOOT_DRIVER(clk_sun8i_v3s) = {
62         .name           = "sun8i_v3s_ccu",
63         .id             = UCLASS_CLK,
64         .of_match       = v3s_clk_ids,
65         .priv_auto_alloc_size   = sizeof(struct ccu_priv),
66         .ops            = &sunxi_clk_ops,
67         .probe          = sunxi_clk_probe,
68         .bind           = v3s_clk_bind,
69 };