1 // SPDX-License-Identifier: (GPL-2.0+ OR MIT)
3 * Copyright (C) 2018 Amarula Solutions.
4 * Author: Jagan Teki <jagan@amarulasolutions.com>
8 #include <clk-uclass.h>
11 #include <asm/arch/ccu.h>
12 #include <dt-bindings/clock/sun8i-a83t-ccu.h>
13 #include <dt-bindings/reset/sun8i-a83t-ccu.h>
15 static struct ccu_clk_gate a83t_gates[] = {
16 [CLK_BUS_OTG] = GATE(0x060, BIT(24)),
17 [CLK_BUS_EHCI0] = GATE(0x060, BIT(26)),
18 [CLK_BUS_EHCI1] = GATE(0x060, BIT(27)),
19 [CLK_BUS_OHCI0] = GATE(0x060, BIT(29)),
21 [CLK_USB_PHY0] = GATE(0x0cc, BIT(8)),
22 [CLK_USB_PHY1] = GATE(0x0cc, BIT(9)),
23 [CLK_USB_HSIC] = GATE(0x0cc, BIT(10)),
24 [CLK_USB_HSIC_12M] = GATE(0x0cc, BIT(11)),
25 [CLK_USB_OHCI0] = GATE(0x0cc, BIT(16)),
28 static struct ccu_reset a83t_resets[] = {
29 [RST_USB_PHY0] = RESET(0x0cc, BIT(0)),
30 [RST_USB_PHY1] = RESET(0x0cc, BIT(1)),
31 [RST_USB_HSIC] = RESET(0x0cc, BIT(2)),
33 [RST_BUS_OTG] = RESET(0x2c0, BIT(24)),
34 [RST_BUS_EHCI0] = RESET(0x2c0, BIT(26)),
35 [RST_BUS_EHCI1] = RESET(0x2c0, BIT(27)),
36 [RST_BUS_OHCI0] = RESET(0x2c0, BIT(29)),
39 static const struct ccu_desc a83t_ccu_desc = {
41 .resets = a83t_resets,
44 static int a83t_clk_bind(struct udevice *dev)
46 return sunxi_reset_bind(dev, ARRAY_SIZE(a83t_resets));
49 static const struct udevice_id a83t_clk_ids[] = {
50 { .compatible = "allwinner,sun8i-a83t-ccu",
51 .data = (ulong)&a83t_ccu_desc },
55 U_BOOT_DRIVER(clk_sun8i_a83t) = {
56 .name = "sun8i_a83t_ccu",
58 .of_match = a83t_clk_ids,
59 .priv_auto_alloc_size = sizeof(struct ccu_priv),
60 .ops = &sunxi_clk_ops,
61 .probe = sunxi_clk_probe,
62 .bind = a83t_clk_bind,