clk: Port Linux common clock framework [CCF] for imx6q to U-boot (tag: v5.1.12)
[oweals/u-boot.git] / drivers / clk / imx / clk-pfd.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2019 DENX Software Engineering
4  * Lukasz Majewski, DENX Software Engineering, lukma@denx.de
5  *
6  * Copyright 2012 Freescale Semiconductor, Inc.
7  * Copyright 2012 Linaro Ltd.
8  *
9  * The code contained herein is licensed under the GNU General Public
10  * License. You may obtain a copy of the GNU General Public License
11  * Version 2 or later at the following locations:
12  *
13  * http://www.opensource.org/licenses/gpl-license.html
14  * http://www.gnu.org/copyleft/gpl.html
15  */
16
17 #include <common.h>
18 #include <asm/io.h>
19 #include <malloc.h>
20 #include <clk-uclass.h>
21 #include <dm/device.h>
22 #include <linux/clk-provider.h>
23 #include <div64.h>
24 #include <clk.h>
25 #include "clk.h"
26
27 #define UBOOT_DM_CLK_IMX_PFD "imx_clk_pfd"
28
29 struct clk_pfd {
30         struct clk      clk;
31         void __iomem    *reg;
32         u8              idx;
33 };
34
35 #define to_clk_pfd(_clk) container_of(_clk, struct clk_pfd, clk)
36
37 #define SET     0x4
38 #define CLR     0x8
39 #define OTG     0xc
40
41 static unsigned long clk_pfd_recalc_rate(struct clk *clk)
42 {
43         struct clk_pfd *pfd =
44                 to_clk_pfd(dev_get_clk_ptr(clk->dev));
45         unsigned long parent_rate = clk_get_parent_rate(clk);
46         u64 tmp = parent_rate;
47         u8 frac = (readl(pfd->reg) >> (pfd->idx * 8)) & 0x3f;
48
49         tmp *= 18;
50         do_div(tmp, frac);
51
52         return tmp;
53 }
54
55 static const struct clk_ops clk_pfd_ops = {
56         .get_rate       = clk_pfd_recalc_rate,
57 };
58
59 struct clk *imx_clk_pfd(const char *name, const char *parent_name,
60                         void __iomem *reg, u8 idx)
61 {
62         struct clk_pfd *pfd;
63         struct clk *clk;
64         int ret;
65
66         pfd = kzalloc(sizeof(*pfd), GFP_KERNEL);
67         if (!pfd)
68                 return ERR_PTR(-ENOMEM);
69
70         pfd->reg = reg;
71         pfd->idx = idx;
72
73         /* register the clock */
74         clk = &pfd->clk;
75
76         ret = clk_register(clk, UBOOT_DM_CLK_IMX_PFD, name, parent_name);
77         if (ret) {
78                 kfree(pfd);
79                 return ERR_PTR(ret);
80         }
81
82         return clk;
83 }
84
85 U_BOOT_DRIVER(clk_pfd) = {
86         .name   = UBOOT_DM_CLK_IMX_PFD,
87         .id     = UCLASS_CLK,
88         .ops    = &clk_pfd_ops,
89         .flags = DM_FLAG_PRE_RELOC,
90 };