drivers/clk/clk-uclass.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2015 Google, Inc
   4  * Written by Simon Glass <sjg@chromium.org>
   5  * Copyright (c) 2016, NVIDIA CORPORATION.
   6  * Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
   7  */
   8
   9 #include <common.h>
  10 #include <clk.h>
  11 #include <clk-uclass.h>
  12 #include <dm.h>
  13 #include <dm/read.h>
  14 #include <dt-structs.h>
  15 #include <errno.h>
  16
  17 static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
  18 {
  19         return (const struct clk_ops *)dev->driver->ops;
  20 }
  21
  22 #if CONFIG_IS_ENABLED(OF_CONTROL)
  23 # if CONFIG_IS_ENABLED(OF_PLATDATA)
  24 int clk_get_by_index_platdata(struct udevice *dev, int index,
  25                               struct phandle_1_arg *cells, struct clk *clk)
  26 {
  27         int ret;
  28
  29         if (index != 0)
  30                 return -ENOSYS;
  31         ret = uclass_get_device(UCLASS_CLK, 0, &clk->dev);
  32         if (ret)
  33                 return ret;
  34         clk->id = cells[0].arg[0];
  35
  36         return 0;
  37 }
  38 # else
  39 static int clk_of_xlate_default(struct clk *clk,
  40                                 struct ofnode_phandle_args *args)
  41 {
  42         debug("%s(clk=%p)\n", __func__, clk);
  43
  44         if (args->args_count > 1) {
  45                 debug("Invaild args_count: %d\n", args->args_count);
  46                 return -EINVAL;
  47         }
  48
  49         if (args->args_count)
  50                 clk->id = args->args[0];
  51         else
  52                 clk->id = 0;
  53
  54         clk->data = 0;
  55
  56         return 0;
  57 }
  58
  59 static int clk_get_by_index_tail(int ret, ofnode node,
  60                                  struct ofnode_phandle_args *args,
  61                                  const char *list_name, int index,
  62                                  struct clk *clk)
  63 {
  64         struct udevice *dev_clk;
  65         const struct clk_ops *ops;
  66
  67         assert(clk);
  68         clk->dev = NULL;
  69         if (ret)
  70                 goto err;
  71
  72         ret = uclass_get_device_by_ofnode(UCLASS_CLK, args->node, &dev_clk);
  73         if (ret) {
  74                 debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
  75                       __func__, ret);
  76                 return ret;
  77         }
  78
  79         clk->dev = dev_clk;
  80
  81         ops = clk_dev_ops(dev_clk);
  82
  83         if (ops->of_xlate)
  84                 ret = ops->of_xlate(clk, args);
  85         else
  86                 ret = clk_of_xlate_default(clk, args);
  87         if (ret) {
  88                 debug("of_xlate() failed: %d\n", ret);
  89                 return ret;
  90         }
  91
  92         return clk_request(dev_clk, clk);
  93 err:
  94         debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n",
  95               __func__, ofnode_get_name(node), list_name, index, ret);
  96         return ret;
  97 }
  98
  99 static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
 100                                    int index, struct clk *clk)
 101 {
 102         int ret;
 103         struct ofnode_phandle_args args;
 104
 105         debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
 106
 107         assert(clk);
 108         clk->dev = NULL;
 109
 110         ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
 111                                          index, &args);
 112         if (ret) {
 113                 debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
 114                       __func__, ret);
 115                 return ret;
 116         }
 117
 118
 119         return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
 120                                      index > 0, clk);
 121 }
 122
 123 int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
 124 {
 125         struct ofnode_phandle_args args;
 126         int ret;
 127
 128         ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
 129                                          index, &args);
 130
 131         return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
 132                                      index > 0, clk);
 133 }
 134
 135 int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk)
 136 {
 137         struct ofnode_phandle_args args;
 138         int ret;
 139
 140         ret = ofnode_parse_phandle_with_args(node, "clocks", "#clock-cells", 0,
 141                                              index > 0, &args);
 142
 143         return clk_get_by_index_tail(ret, node, &args, "clocks",
 144                                      index > 0, clk);
 145 }
 146
 147 int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
 148 {
 149         int i, ret, err, count;
 150
 151         bulk->count = 0;
 152
 153         count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
 154         if (count < 1)
 155                 return count;
 156
 157         bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL);
 158         if (!bulk->clks)
 159                 return -ENOMEM;
 160
 161         for (i = 0; i < count; i++) {
 162                 ret = clk_get_by_index(dev, i, &bulk->clks[i]);
 163                 if (ret < 0)
 164                         goto bulk_get_err;
 165
 166                 ++bulk->count;
 167         }
 168
 169         return 0;
 170
 171 bulk_get_err:
 172         err = clk_release_all(bulk->clks, bulk->count);
 173         if (err)
 174                 debug("%s: could release all clocks for %p\n",
 175                       __func__, dev);
 176
 177         return ret;
 178 }
 179
 180 static int clk_set_default_parents(struct udevice *dev)
 181 {
 182         struct clk clk, parent_clk;
 183         int index;
 184         int num_parents;
 185         int ret;
 186
 187         num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
 188                                                   "#clock-cells");
 189         if (num_parents < 0) {
 190                 debug("%s: could not read assigned-clock-parents for %p\n",
 191                       __func__, dev);
 192                 return 0;
 193         }
 194
 195         for (index = 0; index < num_parents; index++) {
 196                 ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
 197                                               index, &parent_clk);
 198                 /* If -ENOENT, this is a no-op entry */
 199                 if (ret == -ENOENT)
 200                         continue;
 201
 202                 if (ret) {
 203                         debug("%s: could not get parent clock %d for %s\n",
 204                               __func__, index, dev_read_name(dev));
 205                         return ret;
 206                 }
 207
 208                 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
 209                                               index, &clk);
 210                 if (ret) {
 211                         debug("%s: could not get assigned clock %d for %s\n",
 212                               __func__, index, dev_read_name(dev));
 213                         return ret;
 214                 }
 215
 216                 ret = clk_set_parent(&clk, &parent_clk);
 217
 218                 /*
 219                  * Not all drivers may support clock-reparenting (as of now).
 220                  * Ignore errors due to this.
 221                  */
 222                 if (ret == -ENOSYS)
 223                         continue;
 224
 225                 if (ret) {
 226                         debug("%s: failed to reparent clock %d for %s\n",
 227                               __func__, index, dev_read_name(dev));
 228                         return ret;
 229                 }
 230         }
 231
 232         return 0;
 233 }
 234
 235 static int clk_set_default_rates(struct udevice *dev)
 236 {
 237         struct clk clk;
 238         int index;
 239         int num_rates;
 240         int size;
 241         int ret = 0;
 242         u32 *rates = NULL;
 243
 244         size = dev_read_size(dev, "assigned-clock-rates");
 245         if (size < 0)
 246                 return 0;
 247
 248         num_rates = size / sizeof(u32);
 249         rates = calloc(num_rates, sizeof(u32));
 250         if (!rates)
 251                 return -ENOMEM;
 252
 253         ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
 254         if (ret)
 255                 goto fail;
 256
 257         for (index = 0; index < num_rates; index++) {
 258                 /* If 0 is passed, this is a no-op */
 259                 if (!rates[index])
 260                         continue;
 261
 262                 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
 263                                               index, &clk);
 264                 if (ret) {
 265                         debug("%s: could not get assigned clock %d for %s\n",
 266                               __func__, index, dev_read_name(dev));
 267                         continue;
 268                 }
 269
 270                 ret = clk_set_rate(&clk, rates[index]);
 271                 if (ret < 0) {
 272                         debug("%s: failed to set rate on clock index %d (%ld) for %s\n",
 273                               __func__, index, clk.id, dev_read_name(dev));
 274                         break;
 275                 }
 276         }
 277
 278 fail:
 279         free(rates);
 280         return ret;
 281 }
 282
 283 int clk_set_defaults(struct udevice *dev)
 284 {
 285         int ret;
 286
 287         /* If this not in SPL and pre-reloc state, don't take any action. */
 288         if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC)))
 289                 return 0;
 290
 291         debug("%s(%s)\n", __func__, dev_read_name(dev));
 292
 293         ret = clk_set_default_parents(dev);
 294         if (ret)
 295                 return ret;
 296
 297         ret = clk_set_default_rates(dev);
 298         if (ret < 0)
 299                 return ret;
 300
 301         return 0;
 302 }
 303 # endif /* OF_PLATDATA */
 304
 305 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
 306 {
 307         int index;
 308
 309         debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
 310         clk->dev = NULL;
 311
 312         index = dev_read_stringlist_search(dev, "clock-names", name);
 313         if (index < 0) {
 314                 debug("fdt_stringlist_search() failed: %d\n", index);
 315                 return index;
 316         }
 317
 318         return clk_get_by_index(dev, index, clk);
 319 }
 320
 321 int clk_release_all(struct clk *clk, int count)
 322 {
 323         int i, ret;
 324
 325         for (i = 0; i < count; i++) {
 326                 debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
 327
 328                 /* check if clock has been previously requested */
 329                 if (!clk[i].dev)
 330                         continue;
 331
 332                 ret = clk_disable(&clk[i]);
 333                 if (ret && ret != -ENOSYS)
 334                         return ret;
 335
 336                 ret = clk_free(&clk[i]);
 337                 if (ret && ret != -ENOSYS)
 338                         return ret;
 339         }
 340
 341         return 0;
 342 }
 343
 344 #endif /* OF_CONTROL */
 345
 346 int clk_request(struct udevice *dev, struct clk *clk)
 347 {
 348         const struct clk_ops *ops = clk_dev_ops(dev);
 349
 350         debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
 351
 352         clk->dev = dev;
 353
 354         if (!ops->request)
 355                 return 0;
 356
 357         return ops->request(clk);
 358 }
 359
 360 int clk_free(struct clk *clk)
 361 {
 362         const struct clk_ops *ops = clk_dev_ops(clk->dev);
 363
 364         debug("%s(clk=%p)\n", __func__, clk);
 365
 366         if (!ops->free)
 367                 return 0;
 368
 369         return ops->free(clk);
 370 }
 371
 372 ulong clk_get_rate(struct clk *clk)
 373 {
 374         const struct clk_ops *ops = clk_dev_ops(clk->dev);
 375
 376         debug("%s(clk=%p)\n", __func__, clk);
 377
 378         if (!ops->get_rate)
 379                 return -ENOSYS;
 380
 381         return ops->get_rate(clk);
 382 }
 383
 384 ulong clk_set_rate(struct clk *clk, ulong rate)
 385 {
 386         const struct clk_ops *ops = clk_dev_ops(clk->dev);
 387
 388         debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
 389
 390         if (!ops->set_rate)
 391                 return -ENOSYS;
 392
 393         return ops->set_rate(clk, rate);
 394 }
 395
 396 int clk_set_parent(struct clk *clk, struct clk *parent)
 397 {
 398         const struct clk_ops *ops = clk_dev_ops(clk->dev);
 399
 400         debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
 401
 402         if (!ops->set_parent)
 403                 return -ENOSYS;
 404
 405         return ops->set_parent(clk, parent);
 406 }
 407
 408 int clk_enable(struct clk *clk)
 409 {
 410         const struct clk_ops *ops = clk_dev_ops(clk->dev);
 411
 412         debug("%s(clk=%p)\n", __func__, clk);
 413
 414         if (!ops->enable)
 415                 return -ENOSYS;
 416
 417         return ops->enable(clk);
 418 }
 419
 420 int clk_enable_bulk(struct clk_bulk *bulk)
 421 {
 422         int i, ret;
 423
 424         for (i = 0; i < bulk->count; i++) {
 425                 ret = clk_enable(&bulk->clks[i]);
 426                 if (ret < 0 && ret != -ENOSYS)
 427                         return ret;
 428         }
 429
 430         return 0;
 431 }
 432
 433 int clk_disable(struct clk *clk)
 434 {
 435         const struct clk_ops *ops = clk_dev_ops(clk->dev);
 436
 437         debug("%s(clk=%p)\n", __func__, clk);
 438
 439         if (!ops->disable)
 440                 return -ENOSYS;
 441
 442         return ops->disable(clk);
 443 }
 444
 445 int clk_disable_bulk(struct clk_bulk *bulk)
 446 {
 447         int i, ret;
 448
 449         for (i = 0; i < bulk->count; i++) {
 450                 ret = clk_disable(&bulk->clks[i]);
 451                 if (ret < 0 && ret != -ENOSYS)
 452                         return ret;
 453         }
 454
 455         return 0;
 456 }
 457
 458 UCLASS_DRIVER(clk) = {
 459         .id             = UCLASS_CLK,
 460         .name           = "clk",
 461 };