drivers/clk/clk-uclass.c

   1 // SPDX-License-Identifier: GPL-2.0+
   2 /*
   3  * Copyright (C) 2015 Google, Inc
   4  * Written by Simon Glass <sjg@chromium.org>
   5  * Copyright (c) 2016, NVIDIA CORPORATION.
   6  * Copyright (c) 2018, Theobroma Systems Design und Consulting GmbH
   7  */
   8
   9 #include <common.h>
  10 #include <clk.h>
  11 #include <clk-uclass.h>
  12 #include <dm.h>
  13 #include <dm/read.h>
  14 #include <dt-structs.h>
  15 #include <errno.h>
  16 #include <linux/clk-provider.h>
  17
  18 static inline const struct clk_ops *clk_dev_ops(struct udevice *dev)
  19 {
  20         return (const struct clk_ops *)dev->driver->ops;
  21 }
  22
  23 #if CONFIG_IS_ENABLED(OF_CONTROL)
  24 # if CONFIG_IS_ENABLED(OF_PLATDATA)
  25 int clk_get_by_index_platdata(struct udevice *dev, int index,
  26                               struct phandle_1_arg *cells, struct clk *clk)
  27 {
  28         int ret;
  29
  30         if (index != 0)
  31                 return -ENOSYS;
  32         ret = uclass_get_device(UCLASS_CLK, 0, &clk->dev);
  33         if (ret)
  34                 return ret;
  35         clk->id = cells[0].arg[0];
  36
  37         return 0;
  38 }
  39 # else
  40 static int clk_of_xlate_default(struct clk *clk,
  41                                 struct ofnode_phandle_args *args)
  42 {
  43         debug("%s(clk=%p)\n", __func__, clk);
  44
  45         if (args->args_count > 1) {
  46                 debug("Invaild args_count: %d\n", args->args_count);
  47                 return -EINVAL;
  48         }
  49
  50         if (args->args_count)
  51                 clk->id = args->args[0];
  52         else
  53                 clk->id = 0;
  54
  55         return 0;
  56 }
  57
  58 static int clk_get_by_index_tail(int ret, ofnode node,
  59                                  struct ofnode_phandle_args *args,
  60                                  const char *list_name, int index,
  61                                  struct clk *clk)
  62 {
  63         struct udevice *dev_clk;
  64         const struct clk_ops *ops;
  65
  66         assert(clk);
  67         clk->dev = NULL;
  68         if (ret)
  69                 goto err;
  70
  71         ret = uclass_get_device_by_ofnode(UCLASS_CLK, args->node, &dev_clk);
  72         if (ret) {
  73                 debug("%s: uclass_get_device_by_of_offset failed: err=%d\n",
  74                       __func__, ret);
  75                 return ret;
  76         }
  77
  78         clk->dev = dev_clk;
  79
  80         ops = clk_dev_ops(dev_clk);
  81
  82         if (ops->of_xlate)
  83                 ret = ops->of_xlate(clk, args);
  84         else
  85                 ret = clk_of_xlate_default(clk, args);
  86         if (ret) {
  87                 debug("of_xlate() failed: %d\n", ret);
  88                 return ret;
  89         }
  90
  91         return clk_request(dev_clk, clk);
  92 err:
  93         debug("%s: Node '%s', property '%s', failed to request CLK index %d: %d\n",
  94               __func__, ofnode_get_name(node), list_name, index, ret);
  95         return ret;
  96 }
  97
  98 static int clk_get_by_indexed_prop(struct udevice *dev, const char *prop_name,
  99                                    int index, struct clk *clk)
 100 {
 101         int ret;
 102         struct ofnode_phandle_args args;
 103
 104         debug("%s(dev=%p, index=%d, clk=%p)\n", __func__, dev, index, clk);
 105
 106         assert(clk);
 107         clk->dev = NULL;
 108
 109         ret = dev_read_phandle_with_args(dev, prop_name, "#clock-cells", 0,
 110                                          index, &args);
 111         if (ret) {
 112                 debug("%s: fdtdec_parse_phandle_with_args failed: err=%d\n",
 113                       __func__, ret);
 114                 return ret;
 115         }
 116
 117
 118         return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
 119                                      index > 0, clk);
 120 }
 121
 122 int clk_get_by_index(struct udevice *dev, int index, struct clk *clk)
 123 {
 124         struct ofnode_phandle_args args;
 125         int ret;
 126
 127         ret = dev_read_phandle_with_args(dev, "clocks", "#clock-cells", 0,
 128                                          index, &args);
 129
 130         return clk_get_by_index_tail(ret, dev_ofnode(dev), &args, "clocks",
 131                                      index > 0, clk);
 132 }
 133
 134 int clk_get_by_index_nodev(ofnode node, int index, struct clk *clk)
 135 {
 136         struct ofnode_phandle_args args;
 137         int ret;
 138
 139         ret = ofnode_parse_phandle_with_args(node, "clocks", "#clock-cells", 0,
 140                                              index > 0, &args);
 141
 142         return clk_get_by_index_tail(ret, node, &args, "clocks",
 143                                      index > 0, clk);
 144 }
 145
 146 int clk_get_bulk(struct udevice *dev, struct clk_bulk *bulk)
 147 {
 148         int i, ret, err, count;
 149
 150         bulk->count = 0;
 151
 152         count = dev_count_phandle_with_args(dev, "clocks", "#clock-cells");
 153         if (count < 1)
 154                 return count;
 155
 156         bulk->clks = devm_kcalloc(dev, count, sizeof(struct clk), GFP_KERNEL);
 157         if (!bulk->clks)
 158                 return -ENOMEM;
 159
 160         for (i = 0; i < count; i++) {
 161                 ret = clk_get_by_index(dev, i, &bulk->clks[i]);
 162                 if (ret < 0)
 163                         goto bulk_get_err;
 164
 165                 ++bulk->count;
 166         }
 167
 168         return 0;
 169
 170 bulk_get_err:
 171         err = clk_release_all(bulk->clks, bulk->count);
 172         if (err)
 173                 debug("%s: could release all clocks for %p\n",
 174                       __func__, dev);
 175
 176         return ret;
 177 }
 178
 179 static int clk_set_default_parents(struct udevice *dev)
 180 {
 181         struct clk clk, parent_clk;
 182         int index;
 183         int num_parents;
 184         int ret;
 185
 186         num_parents = dev_count_phandle_with_args(dev, "assigned-clock-parents",
 187                                                   "#clock-cells");
 188         if (num_parents < 0) {
 189                 debug("%s: could not read assigned-clock-parents for %p\n",
 190                       __func__, dev);
 191                 return 0;
 192         }
 193
 194         for (index = 0; index < num_parents; index++) {
 195                 ret = clk_get_by_indexed_prop(dev, "assigned-clock-parents",
 196                                               index, &parent_clk);
 197                 /* If -ENOENT, this is a no-op entry */
 198                 if (ret == -ENOENT)
 199                         continue;
 200
 201                 if (ret) {
 202                         debug("%s: could not get parent clock %d for %s\n",
 203                               __func__, index, dev_read_name(dev));
 204                         return ret;
 205                 }
 206
 207                 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
 208                                               index, &clk);
 209                 if (ret) {
 210                         debug("%s: could not get assigned clock %d for %s\n",
 211                               __func__, index, dev_read_name(dev));
 212                         return ret;
 213                 }
 214
 215                 ret = clk_set_parent(&clk, &parent_clk);
 216
 217                 /*
 218                  * Not all drivers may support clock-reparenting (as of now).
 219                  * Ignore errors due to this.
 220                  */
 221                 if (ret == -ENOSYS)
 222                         continue;
 223
 224                 if (ret) {
 225                         debug("%s: failed to reparent clock %d for %s\n",
 226                               __func__, index, dev_read_name(dev));
 227                         return ret;
 228                 }
 229         }
 230
 231         return 0;
 232 }
 233
 234 static int clk_set_default_rates(struct udevice *dev)
 235 {
 236         struct clk clk;
 237         int index;
 238         int num_rates;
 239         int size;
 240         int ret = 0;
 241         u32 *rates = NULL;
 242
 243         size = dev_read_size(dev, "assigned-clock-rates");
 244         if (size < 0)
 245                 return 0;
 246
 247         num_rates = size / sizeof(u32);
 248         rates = calloc(num_rates, sizeof(u32));
 249         if (!rates)
 250                 return -ENOMEM;
 251
 252         ret = dev_read_u32_array(dev, "assigned-clock-rates", rates, num_rates);
 253         if (ret)
 254                 goto fail;
 255
 256         for (index = 0; index < num_rates; index++) {
 257                 /* If 0 is passed, this is a no-op */
 258                 if (!rates[index])
 259                         continue;
 260
 261                 ret = clk_get_by_indexed_prop(dev, "assigned-clocks",
 262                                               index, &clk);
 263                 if (ret) {
 264                         debug("%s: could not get assigned clock %d for %s\n",
 265                               __func__, index, dev_read_name(dev));
 266                         continue;
 267                 }
 268
 269                 ret = clk_set_rate(&clk, rates[index]);
 270                 if (ret < 0) {
 271                         debug("%s: failed to set rate on clock index %d (%ld) for %s\n",
 272                               __func__, index, clk.id, dev_read_name(dev));
 273                         break;
 274                 }
 275         }
 276
 277 fail:
 278         free(rates);
 279         return ret;
 280 }
 281
 282 int clk_set_defaults(struct udevice *dev)
 283 {
 284         int ret;
 285
 286         /* If this not in SPL and pre-reloc state, don't take any action. */
 287         if (!(IS_ENABLED(CONFIG_SPL_BUILD) || (gd->flags & GD_FLG_RELOC)))
 288                 return 0;
 289
 290         debug("%s(%s)\n", __func__, dev_read_name(dev));
 291
 292         ret = clk_set_default_parents(dev);
 293         if (ret)
 294                 return ret;
 295
 296         ret = clk_set_default_rates(dev);
 297         if (ret < 0)
 298                 return ret;
 299
 300         return 0;
 301 }
 302 # endif /* OF_PLATDATA */
 303
 304 int clk_get_by_name(struct udevice *dev, const char *name, struct clk *clk)
 305 {
 306         int index;
 307
 308         debug("%s(dev=%p, name=%s, clk=%p)\n", __func__, dev, name, clk);
 309         clk->dev = NULL;
 310
 311         index = dev_read_stringlist_search(dev, "clock-names", name);
 312         if (index < 0) {
 313                 debug("fdt_stringlist_search() failed: %d\n", index);
 314                 return index;
 315         }
 316
 317         return clk_get_by_index(dev, index, clk);
 318 }
 319
 320 int clk_release_all(struct clk *clk, int count)
 321 {
 322         int i, ret;
 323
 324         for (i = 0; i < count; i++) {
 325                 debug("%s(clk[%d]=%p)\n", __func__, i, &clk[i]);
 326
 327                 /* check if clock has been previously requested */
 328                 if (!clk[i].dev)
 329                         continue;
 330
 331                 ret = clk_disable(&clk[i]);
 332                 if (ret && ret != -ENOSYS)
 333                         return ret;
 334
 335                 ret = clk_free(&clk[i]);
 336                 if (ret && ret != -ENOSYS)
 337                         return ret;
 338         }
 339
 340         return 0;
 341 }
 342
 343 #endif /* OF_CONTROL */
 344
 345 int clk_request(struct udevice *dev, struct clk *clk)
 346 {
 347         const struct clk_ops *ops = clk_dev_ops(dev);
 348
 349         debug("%s(dev=%p, clk=%p)\n", __func__, dev, clk);
 350
 351         clk->dev = dev;
 352
 353         if (!ops->request)
 354                 return 0;
 355
 356         return ops->request(clk);
 357 }
 358
 359 int clk_free(struct clk *clk)
 360 {
 361         const struct clk_ops *ops = clk_dev_ops(clk->dev);
 362
 363         debug("%s(clk=%p)\n", __func__, clk);
 364
 365         if (!ops->free)
 366                 return 0;
 367
 368         return ops->free(clk);
 369 }
 370
 371 ulong clk_get_rate(struct clk *clk)
 372 {
 373         const struct clk_ops *ops = clk_dev_ops(clk->dev);
 374
 375         debug("%s(clk=%p)\n", __func__, clk);
 376
 377         if (!ops->get_rate)
 378                 return -ENOSYS;
 379
 380         return ops->get_rate(clk);
 381 }
 382
 383 struct clk *clk_get_parent(struct clk *clk)
 384 {
 385         struct udevice *pdev;
 386         struct clk *pclk;
 387
 388         debug("%s(clk=%p)\n", __func__, clk);
 389
 390         pdev = dev_get_parent(clk->dev);
 391         pclk = dev_get_clk_ptr(pdev);
 392         if (!pclk)
 393                 return ERR_PTR(-ENODEV);
 394
 395         return pclk;
 396 }
 397
 398 ulong clk_set_rate(struct clk *clk, ulong rate)
 399 {
 400         const struct clk_ops *ops = clk_dev_ops(clk->dev);
 401
 402         debug("%s(clk=%p, rate=%lu)\n", __func__, clk, rate);
 403
 404         if (!ops->set_rate)
 405                 return -ENOSYS;
 406
 407         return ops->set_rate(clk, rate);
 408 }
 409
 410 int clk_set_parent(struct clk *clk, struct clk *parent)
 411 {
 412         const struct clk_ops *ops = clk_dev_ops(clk->dev);
 413
 414         debug("%s(clk=%p, parent=%p)\n", __func__, clk, parent);
 415
 416         if (!ops->set_parent)
 417                 return -ENOSYS;
 418
 419         return ops->set_parent(clk, parent);
 420 }
 421
 422 int clk_enable(struct clk *clk)
 423 {
 424         const struct clk_ops *ops = clk_dev_ops(clk->dev);
 425
 426         debug("%s(clk=%p)\n", __func__, clk);
 427
 428         if (!ops->enable)
 429                 return -ENOSYS;
 430
 431         return ops->enable(clk);
 432 }
 433
 434 int clk_enable_bulk(struct clk_bulk *bulk)
 435 {
 436         int i, ret;
 437
 438         for (i = 0; i < bulk->count; i++) {
 439                 ret = clk_enable(&bulk->clks[i]);
 440                 if (ret < 0 && ret != -ENOSYS)
 441                         return ret;
 442         }
 443
 444         return 0;
 445 }
 446
 447 int clk_disable(struct clk *clk)
 448 {
 449         const struct clk_ops *ops = clk_dev_ops(clk->dev);
 450
 451         debug("%s(clk=%p)\n", __func__, clk);
 452
 453         if (!ops->disable)
 454                 return -ENOSYS;
 455
 456         return ops->disable(clk);
 457 }
 458
 459 int clk_disable_bulk(struct clk_bulk *bulk)
 460 {
 461         int i, ret;
 462
 463         for (i = 0; i < bulk->count; i++) {
 464                 ret = clk_disable(&bulk->clks[i]);
 465                 if (ret < 0 && ret != -ENOSYS)
 466                         return ret;
 467         }
 468
 469         return 0;
 470 }
 471
 472 UCLASS_DRIVER(clk) = {
 473         .id             = UCLASS_CLK,
 474         .name           = "clk",
 475 };