2 * Copyright (C) 2016 Atmel Corporation
3 * Wenyou.Yang <wenyou.yang@atmel.com>
5 * SPDX-License-Identifier: GPL-2.0+
9 #include <clk-uclass.h>
10 #include <dm/device.h>
12 #include <mach/at91_pmc.h>
15 #define SYSTEM_MAX_ID 31
18 * at91_system_clk_bind() - for the system clock driver
19 * Recursively bind its children as clk devices.
21 * @return: 0 on success, or negative error code on failure
23 static int at91_system_clk_bind(struct udevice *dev)
25 return at91_clk_sub_device_bind(dev, "system-clk");
28 static const struct udevice_id at91_system_clk_match[] = {
29 { .compatible = "atmel,at91rm9200-clk-system" },
33 U_BOOT_DRIVER(at91_system_clk) = {
34 .name = "at91-system-clk",
36 .of_match = at91_system_clk_match,
37 .bind = at91_system_clk_bind,
40 /*----------------------------------------------------------*/
42 static inline int is_pck(int id)
44 return (id >= 8) && (id <= 15);
47 static int system_clk_enable(struct clk *clk)
49 struct pmc_platdata *plat = dev_get_platdata(clk->dev);
50 struct at91_pmc *pmc = plat->reg_base;
53 if (clk->id > SYSTEM_MAX_ID)
58 writel(mask, &pmc->scer);
61 * For the programmable clocks the Ready status in the PMC
62 * status register should be checked after enabling.
63 * For other clocks this is unnecessary.
68 while (!(readl(&pmc->sr) & mask))
74 static struct clk_ops system_clk_ops = {
75 .of_xlate = at91_clk_of_xlate,
76 .enable = system_clk_enable,
79 U_BOOT_DRIVER(system_clk) = {
82 .probe = at91_clk_probe,
83 .platdata_auto_alloc_size = sizeof(struct pmc_platdata),
84 .ops = &system_clk_ops,