drivers/cfi_flash.c

   1 /*
   2  * (C) Copyright 2002-2004
   3  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   4  *
   5  * Copyright (C) 2003 Arabella Software Ltd.
   6  * Yuli Barcohen <yuli@arabellasw.com>
   7  * Modified to work with AMD flashes
   8  *
   9  * Copyright (C) 2004
  10  * Ed Okerson
  11  * Modified to work with little-endian systems.
  12  *
  13  * See file CREDITS for list of people who contributed to this
  14  * project.
  15  *
  16  * This program is free software; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public License as
  18  * published by the Free Software Foundation; either version 2 of
  19  * the License, or (at your option) any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program; if not, write to the Free Software
  28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29  * MA 02111-1307 USA
  30  *
  31  * History
  32  * 01/20/2004 - combined variants of original driver.
  33  * 01/22/2004 - Write performance enhancements for parallel chips (Tolunay)
  34  * 01/23/2004 - Support for x8/x16 chips (Rune Raknerud)
  35  * 01/27/2004 - Little endian support Ed Okerson
  36  *
  37  * Tested Architectures
  38  * Port Width  Chip Width    # of banks    Flash Chip  Board
  39  * 32          16            1             28F128J3    seranoa/eagle
  40  * 64          16            1             28F128J3    seranoa/falcon
  41  *
  42  */
  43
  44 /* The DEBUG define must be before common to enable debugging */
  45 /* #define DEBUG        */
  46
  47 #include <common.h>
  48 #include <asm/processor.h>
  49 #include <asm/byteorder.h>
  50 #include <environment.h>
  51 #ifdef  CFG_FLASH_CFI_DRIVER
  52
  53 /*
  54  * This file implements a Common Flash Interface (CFI) driver for U-Boot.
  55  * The width of the port and the width of the chips are determined at initialization.
  56  * These widths are used to calculate the address for access CFI data structures.
  57  * It has been tested on an Intel Strataflash implementation and AMD 29F016D.
  58  *
  59  * References
  60  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  61  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  62  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  63  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  64  *
  65  * TODO
  66  *
  67  * Use Primary Extended Query table (PRI) and Alternate Algorithm Query
  68  * Table (ALT) to determine if protection is available
  69  *
  70  * Add support for other command sets Use the PRI and ALT to determine command set
  71  * Verify erase and program timeouts.
  72  */
  73
  74 #ifndef CFG_FLASH_BANKS_LIST
  75 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
  76 #endif
  77
  78 #define FLASH_CMD_CFI                   0x98
  79 #define FLASH_CMD_READ_ID               0x90
  80 #define FLASH_CMD_RESET                 0xff
  81 #define FLASH_CMD_BLOCK_ERASE           0x20
  82 #define FLASH_CMD_ERASE_CONFIRM         0xD0
  83 #define FLASH_CMD_WRITE                 0x40
  84 #define FLASH_CMD_PROTECT               0x60
  85 #define FLASH_CMD_PROTECT_SET           0x01
  86 #define FLASH_CMD_PROTECT_CLEAR         0xD0
  87 #define FLASH_CMD_CLEAR_STATUS          0x50
  88 #define FLASH_CMD_WRITE_TO_BUFFER       0xE8
  89 #define FLASH_CMD_WRITE_BUFFER_CONFIRM  0xD0
  90
  91 #define FLASH_STATUS_DONE               0x80
  92 #define FLASH_STATUS_ESS                0x40
  93 #define FLASH_STATUS_ECLBS              0x20
  94 #define FLASH_STATUS_PSLBS              0x10
  95 #define FLASH_STATUS_VPENS              0x08
  96 #define FLASH_STATUS_PSS                0x04
  97 #define FLASH_STATUS_DPS                0x02
  98 #define FLASH_STATUS_R                  0x01
  99 #define FLASH_STATUS_PROTECT            0x01
 100
 101 #define AMD_CMD_RESET                   0xF0
 102 #define AMD_CMD_WRITE                   0xA0
 103 #define AMD_CMD_ERASE_START             0x80
 104 #define AMD_CMD_ERASE_SECTOR            0x30
 105 #define AMD_CMD_UNLOCK_START            0xAA
 106 #define AMD_CMD_UNLOCK_ACK              0x55
 107 #define AMD_CMD_WRITE_TO_BUFFER         0x25
 108 #define AMD_CMD_WRITE_BUFFER_CONFIRM    0x29
 109
 110 #define AMD_STATUS_TOGGLE               0x40
 111 #define AMD_STATUS_ERROR                0x20
 112
 113 #define AMD_ADDR_ERASE_START    ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
 114 #define AMD_ADDR_START          ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
 115 #define AMD_ADDR_ACK            ((info->portwidth == FLASH_CFI_8BIT) ? 0x555 : 0x2AA)
 116
 117 #define FLASH_OFFSET_CFI                0x55
 118 #define FLASH_OFFSET_CFI_RESP           0x10
 119 #define FLASH_OFFSET_PRIMARY_VENDOR     0x13
 120 #define FLASH_OFFSET_WTOUT              0x1F
 121 #define FLASH_OFFSET_WBTOUT             0x20
 122 #define FLASH_OFFSET_ETOUT              0x21
 123 #define FLASH_OFFSET_CETOUT             0x22
 124 #define FLASH_OFFSET_WMAX_TOUT          0x23
 125 #define FLASH_OFFSET_WBMAX_TOUT         0x24
 126 #define FLASH_OFFSET_EMAX_TOUT          0x25
 127 #define FLASH_OFFSET_CEMAX_TOUT         0x26
 128 #define FLASH_OFFSET_SIZE               0x27
 129 #define FLASH_OFFSET_INTERFACE          0x28
 130 #define FLASH_OFFSET_BUFFER_SIZE        0x2A
 131 #define FLASH_OFFSET_NUM_ERASE_REGIONS  0x2C
 132 #define FLASH_OFFSET_ERASE_REGIONS      0x2D
 133 #define FLASH_OFFSET_PROTECT            0x02
 134 #define FLASH_OFFSET_USER_PROTECTION    0x85
 135 #define FLASH_OFFSET_INTEL_PROTECTION   0x81
 136
 137
 138 #define FLASH_MAN_CFI                   0x01000000
 139
 140 #define CFI_CMDSET_NONE             0
 141 #define CFI_CMDSET_INTEL_EXTENDED   1
 142 #define CFI_CMDSET_AMD_STANDARD     2
 143 #define CFI_CMDSET_INTEL_STANDARD   3
 144 #define CFI_CMDSET_AMD_EXTENDED     4
 145 #define CFI_CMDSET_MITSU_STANDARD   256
 146 #define CFI_CMDSET_MITSU_EXTENDED   257
 147 #define CFI_CMDSET_SST              258
 148
 149
 150 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
 151 # undef  FLASH_CMD_RESET
 152 # define FLASH_CMD_RESET                AMD_CMD_RESET /* use AMD-Reset instead */
 153 #endif
 154
 155
 156 typedef union {
 157         unsigned char c;
 158         unsigned short w;
 159         unsigned long l;
 160         unsigned long long ll;
 161 } cfiword_t;
 162
 163 typedef union {
 164         volatile unsigned char *cp;
 165         volatile unsigned short *wp;
 166         volatile unsigned long *lp;
 167         volatile unsigned long long *llp;
 168 } cfiptr_t;
 169
 170 #define NUM_ERASE_REGIONS 4
 171
 172 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
 173 #ifdef CFG_MAX_FLASH_BANKS_DETECT
 174 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
 175 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT];    /* FLASH chips info */
 176 #else
 177 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
 178 flash_info_t flash_info[CFG_MAX_FLASH_BANKS];           /* FLASH chips info */
 179 #endif
 180
 181 /*
 182  * Check if chip width is defined. If not, start detecting with 8bit.
 183  */
 184 #ifndef CFG_FLASH_CFI_WIDTH
 185 #define CFG_FLASH_CFI_WIDTH     FLASH_CFI_8BIT
 186 #endif
 187
 188
 189 /*-----------------------------------------------------------------------
 190  * Functions
 191  */
 192
 193 typedef unsigned long flash_sect_t;
 194
 195 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
 196 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
 197 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 198 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
 199 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 200 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 201 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
 202 static int flash_detect_cfi (flash_info_t * info);
 203 static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
 204 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 205                                     ulong tout, char *prompt);
 206 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 207 static flash_info_t *flash_get_info(ulong base);
 208 #endif
 209 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 210 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
 211 #endif
 212
 213 /*-----------------------------------------------------------------------
 214  * create an address based on the offset and the port width
 215  */
 216 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
 217 {
 218         return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
 219 }
 220
 221 #ifdef DEBUG
 222 /*-----------------------------------------------------------------------
 223  * Debug support
 224  */
 225 void print_longlong (char *str, unsigned long long data)
 226 {
 227         int i;
 228         char *cp;
 229
 230         cp = (unsigned char *) &data;
 231         for (i = 0; i < 8; i++)
 232                 sprintf (&str[i * 2], "%2.2x", *cp++);
 233 }
 234 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
 235 {
 236         cfiptr_t cptr;
 237         int x, y;
 238
 239         for (x = 0; x < 0x40; x += 16U / info->portwidth) {
 240                 cptr.cp =
 241                         flash_make_addr (info, sect,
 242                                          x + FLASH_OFFSET_CFI_RESP);
 243                 debug ("%p : ", cptr.cp);
 244                 for (y = 0; y < 16; y++) {
 245                         debug ("%2.2x ", cptr.cp[y]);
 246                 }
 247                 debug (" ");
 248                 for (y = 0; y < 16; y++) {
 249                         if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
 250                                 debug ("%c", cptr.cp[y]);
 251                         } else {
 252                                 debug (".");
 253                         }
 254                 }
 255                 debug ("\n");
 256         }
 257 }
 258 #endif
 259
 260
 261 /*-----------------------------------------------------------------------
 262  * read a character at a port width address
 263  */
 264 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
 265 {
 266         uchar *cp;
 267
 268         cp = flash_make_addr (info, 0, offset);
 269 #if defined(__LITTLE_ENDIAN)
 270         return (cp[0]);
 271 #else
 272         return (cp[info->portwidth - 1]);
 273 #endif
 274 }
 275
 276 /*-----------------------------------------------------------------------
 277  * read a short word by swapping for ppc format.
 278  */
 279 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
 280 {
 281         uchar *addr;
 282         ushort retval;
 283
 284 #ifdef DEBUG
 285         int x;
 286 #endif
 287         addr = flash_make_addr (info, sect, offset);
 288
 289 #ifdef DEBUG
 290         debug ("ushort addr is at %p info->portwidth = %d\n", addr,
 291                info->portwidth);
 292         for (x = 0; x < 2 * info->portwidth; x++) {
 293                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 294         }
 295 #endif
 296 #if defined(__LITTLE_ENDIAN)
 297         retval = ((addr[(info->portwidth)] << 8) | addr[0]);
 298 #else
 299         retval = ((addr[(2 * info->portwidth) - 1] << 8) |
 300                   addr[info->portwidth - 1]);
 301 #endif
 302
 303         debug ("retval = 0x%x\n", retval);
 304         return retval;
 305 }
 306
 307 /*-----------------------------------------------------------------------
 308  * read a long word by picking the least significant byte of each maiximum
 309  * port size word. Swap for ppc format.
 310  */
 311 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
 312 {
 313         uchar *addr;
 314         ulong retval;
 315
 316 #ifdef DEBUG
 317         int x;
 318 #endif
 319         addr = flash_make_addr (info, sect, offset);
 320
 321 #ifdef DEBUG
 322         debug ("long addr is at %p info->portwidth = %d\n", addr,
 323                info->portwidth);
 324         for (x = 0; x < 4 * info->portwidth; x++) {
 325                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 326         }
 327 #endif
 328 #if defined(__LITTLE_ENDIAN)
 329         retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
 330                 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
 331 #else
 332         retval = (addr[(2 * info->portwidth) - 1] << 24) |
 333                 (addr[(info->portwidth) - 1] << 16) |
 334                 (addr[(4 * info->portwidth) - 1] << 8) |
 335                 addr[(3 * info->portwidth) - 1];
 336 #endif
 337         return retval;
 338 }
 339
 340
 341 /*-----------------------------------------------------------------------
 342  */
 343 unsigned long flash_init (void)
 344 {
 345         unsigned long size = 0;
 346         int i;
 347
 348         /* Init: no FLASHes known */
 349         for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
 350                 flash_info[i].flash_id = FLASH_UNKNOWN;
 351                 size += flash_info[i].size = flash_get_size (bank_base[i], i);
 352                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
 353 #ifndef CFG_FLASH_QUIET_TEST
 354                         printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
 355                                 i, flash_info[i].size, flash_info[i].size << 20);
 356 #endif /* CFG_FLASH_QUIET_TEST */
 357                 }
 358 #ifdef CFG_FLASH_PROTECTION
 359                 else {
 360                         char *s = getenv("unlock");
 361
 362                         if (((s = getenv("unlock")) != NULL) && (strcmp(s, "yes") == 0)) {
 363                                 /*
 364                                  * Only the U-Boot image and it's environment is protected,
 365                                  * all other sectors are unprotected (unlocked) if flash
 366                                  * hardware protection is used (CFG_FLASH_PROTECTION) and
 367                                  * the environment variable "unlock" is set to "yes".
 368                                  */
 369                                 flash_protect (FLAG_PROTECT_CLEAR,
 370                                                flash_info[i].start[0],
 371                                                flash_info[i].start[0] + flash_info[i].size - 1,
 372                                                &flash_info[i]);
 373                         }
 374                 }
 375 #endif /* CFG_FLASH_PROTECTION */
 376         }
 377
 378         /* Monitor protection ON by default */
 379 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 380         flash_protect (FLAG_PROTECT_SET,
 381                        CFG_MONITOR_BASE,
 382                        CFG_MONITOR_BASE + monitor_flash_len  - 1,
 383                        flash_get_info(CFG_MONITOR_BASE));
 384 #endif
 385
 386         /* Environment protection ON by default */
 387 #ifdef CFG_ENV_IS_IN_FLASH
 388         flash_protect (FLAG_PROTECT_SET,
 389                        CFG_ENV_ADDR,
 390                        CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
 391                        flash_get_info(CFG_ENV_ADDR));
 392 #endif
 393
 394         /* Redundant environment protection ON by default */
 395 #ifdef CFG_ENV_ADDR_REDUND
 396         flash_protect (FLAG_PROTECT_SET,
 397                        CFG_ENV_ADDR_REDUND,
 398                        CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
 399                        flash_get_info(CFG_ENV_ADDR_REDUND));
 400 #endif
 401         return (size);
 402 }
 403
 404 /*-----------------------------------------------------------------------
 405  */
 406 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 407 static flash_info_t *flash_get_info(ulong base)
 408 {
 409         int i;
 410         flash_info_t * info = 0;
 411
 412         for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
 413                 info = & flash_info[i];
 414                 if (info->size && info->start[0] <= base &&
 415                     base <= info->start[0] + info->size - 1)
 416                         break;
 417         }
 418
 419         return i == CFG_MAX_FLASH_BANKS ? 0 : info;
 420 }
 421 #endif
 422
 423 /*-----------------------------------------------------------------------
 424  */
 425 int flash_erase (flash_info_t * info, int s_first, int s_last)
 426 {
 427         int rcode = 0;
 428         int prot;
 429         flash_sect_t sect;
 430
 431         if (info->flash_id != FLASH_MAN_CFI) {
 432                 puts ("Can't erase unknown flash type - aborted\n");
 433                 return 1;
 434         }
 435         if ((s_first < 0) || (s_first > s_last)) {
 436                 puts ("- no sectors to erase\n");
 437                 return 1;
 438         }
 439
 440         prot = 0;
 441         for (sect = s_first; sect <= s_last; ++sect) {
 442                 if (info->protect[sect]) {
 443                         prot++;
 444                 }
 445         }
 446         if (prot) {
 447                 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
 448         } else {
 449                 putc ('\n');
 450         }
 451
 452
 453         for (sect = s_first; sect <= s_last; sect++) {
 454                 if (info->protect[sect] == 0) { /* not protected */
 455                         switch (info->vendor) {
 456                         case CFI_CMDSET_INTEL_STANDARD:
 457                         case CFI_CMDSET_INTEL_EXTENDED:
 458                                 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
 459                                 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
 460                                 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
 461                                 break;
 462                         case CFI_CMDSET_AMD_STANDARD:
 463                         case CFI_CMDSET_AMD_EXTENDED:
 464                                 flash_unlock_seq (info, sect);
 465                                 flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
 466                                                         AMD_CMD_ERASE_START);
 467                                 flash_unlock_seq (info, sect);
 468                                 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
 469                                 break;
 470                         default:
 471                                 debug ("Unkown flash vendor %d\n",
 472                                        info->vendor);
 473                                 break;
 474                         }
 475
 476                         if (flash_full_status_check
 477                             (info, sect, info->erase_blk_tout, "erase")) {
 478                                 rcode = 1;
 479                         } else
 480                                 putc ('.');
 481                 }
 482         }
 483         puts (" done\n");
 484         return rcode;
 485 }
 486
 487 /*-----------------------------------------------------------------------
 488  */
 489 void flash_print_info (flash_info_t * info)
 490 {
 491         int i;
 492
 493         if (info->flash_id != FLASH_MAN_CFI) {
 494                 puts ("missing or unknown FLASH type\n");
 495                 return;
 496         }
 497
 498         printf ("CFI conformant FLASH (%d x %d)",
 499                 (info->portwidth << 3), (info->chipwidth << 3));
 500         printf ("  Size: %ld MB in %d Sectors\n",
 501                 info->size >> 20, info->sector_count);
 502         printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
 503                 info->erase_blk_tout,
 504                 info->write_tout,
 505                 info->buffer_write_tout,
 506                 info->buffer_size);
 507
 508         puts ("  Sector Start Addresses:");
 509         for (i = 0; i < info->sector_count; ++i) {
 510 #ifdef CFG_FLASH_EMPTY_INFO
 511                 int k;
 512                 int size;
 513                 int erased;
 514                 volatile unsigned long *flash;
 515
 516                 /*
 517                  * Check if whole sector is erased
 518                  */
 519                 if (i != (info->sector_count - 1))
 520                         size = info->start[i + 1] - info->start[i];
 521                 else
 522                         size = info->start[0] + info->size - info->start[i];
 523                 erased = 1;
 524                 flash = (volatile unsigned long *) info->start[i];
 525                 size = size >> 2;       /* divide by 4 for longword access */
 526                 for (k = 0; k < size; k++) {
 527                         if (*flash++ != 0xffffffff) {
 528                                 erased = 0;
 529                                 break;
 530                         }
 531                 }
 532
 533                 if ((i % 5) == 0)
 534                         printf ("\n");
 535                 /* print empty and read-only info */
 536                 printf (" %08lX%s%s",
 537                         info->start[i],
 538                         erased ? " E" : "  ",
 539                         info->protect[i] ? "RO " : "   ");
 540 #else   /* ! CFG_FLASH_EMPTY_INFO */
 541                 if ((i % 5) == 0)
 542                         printf ("\n   ");
 543                 printf (" %08lX%s",
 544                         info->start[i], info->protect[i] ? " (RO)" : "     ");
 545 #endif
 546         }
 547         putc ('\n');
 548         return;
 549 }
 550
 551 /*-----------------------------------------------------------------------
 552  * Copy memory to flash, returns:
 553  * 0 - OK
 554  * 1 - write timeout
 555  * 2 - Flash not erased
 556  */
 557 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 558 {
 559         ulong wp;
 560         ulong cp;
 561         int aln;
 562         cfiword_t cword;
 563         int i, rc;
 564
 565 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 566         int buffered_size;
 567 #endif
 568         /* get lower aligned address */
 569         /* get lower aligned address */
 570         wp = (addr & ~(info->portwidth - 1));
 571
 572         /* handle unaligned start */
 573         if ((aln = addr - wp) != 0) {
 574                 cword.l = 0;
 575                 cp = wp;
 576                 for (i = 0; i < aln; ++i, ++cp)
 577                         flash_add_byte (info, &cword, (*(uchar *) cp));
 578
 579                 for (; (i < info->portwidth) && (cnt > 0); i++) {
 580                         flash_add_byte (info, &cword, *src++);
 581                         cnt--;
 582                         cp++;
 583                 }
 584                 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
 585                         flash_add_byte (info, &cword, (*(uchar *) cp));
 586                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 587                         return rc;
 588                 wp = cp;
 589         }
 590
 591         /* handle the aligned part */
 592 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 593         buffered_size = (info->portwidth / info->chipwidth);
 594         buffered_size *= info->buffer_size;
 595         while (cnt >= info->portwidth) {
 596                 /* prohibit buffer write when buffer_size is 1 */
 597                 if (info->buffer_size == 1) {
 598                         cword.l = 0;
 599                         for (i = 0; i < info->portwidth; i++)
 600                                 flash_add_byte (info, &cword, *src++);
 601                         if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 602                                 return rc;
 603                         wp += info->portwidth;
 604                         cnt -= info->portwidth;
 605                         continue;
 606                 }
 607
 608                 /* write buffer until next buffered_size aligned boundary */
 609                 i = buffered_size - (wp % buffered_size);
 610                 if (i > cnt)
 611                         i = cnt;
 612                 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
 613                         return rc;
 614                 i -= i & (info->portwidth - 1);
 615                 wp += i;
 616                 src += i;
 617                 cnt -= i;
 618         }
 619 #else
 620         while (cnt >= info->portwidth) {
 621                 cword.l = 0;
 622                 for (i = 0; i < info->portwidth; i++) {
 623                         flash_add_byte (info, &cword, *src++);
 624                 }
 625                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 626                         return rc;
 627                 wp += info->portwidth;
 628                 cnt -= info->portwidth;
 629         }
 630 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
 631         if (cnt == 0) {
 632                 return (0);
 633         }
 634
 635         /*
 636          * handle unaligned tail bytes
 637          */
 638         cword.l = 0;
 639         for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
 640                 flash_add_byte (info, &cword, *src++);
 641                 --cnt;
 642         }
 643         for (; i < info->portwidth; ++i, ++cp) {
 644                 flash_add_byte (info, &cword, (*(uchar *) cp));
 645         }
 646
 647         return flash_write_cfiword (info, wp, cword);
 648 }
 649
 650 /*-----------------------------------------------------------------------
 651  */
 652 #ifdef CFG_FLASH_PROTECTION
 653
 654 int flash_real_protect (flash_info_t * info, long sector, int prot)
 655 {
 656         int retcode = 0;
 657
 658         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 659         flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
 660         if (prot)
 661                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
 662         else
 663                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
 664
 665         if ((retcode =
 666              flash_full_status_check (info, sector, info->erase_blk_tout,
 667                                       prot ? "protect" : "unprotect")) == 0) {
 668
 669                 info->protect[sector] = prot;
 670                 /* Intel's unprotect unprotects all locking */
 671                 if (prot == 0) {
 672                         flash_sect_t i;
 673
 674                         for (i = 0; i < info->sector_count; i++) {
 675                                 if (info->protect[i])
 676                                         flash_real_protect (info, i, 1);
 677                         }
 678                 }
 679         }
 680         return retcode;
 681 }
 682
 683 /*-----------------------------------------------------------------------
 684  * flash_read_user_serial - read the OneTimeProgramming cells
 685  */
 686 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
 687                              int len)
 688 {
 689         uchar *src;
 690         uchar *dst;
 691
 692         dst = buffer;
 693         src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
 694         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 695         memcpy (dst, src + offset, len);
 696         flash_write_cmd (info, 0, 0, info->cmd_reset);
 697 }
 698
 699 /*
 700  * flash_read_factory_serial - read the device Id from the protection area
 701  */
 702 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
 703                                 int len)
 704 {
 705         uchar *src;
 706
 707         src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
 708         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 709         memcpy (buffer, src + offset, len);
 710         flash_write_cmd (info, 0, 0, info->cmd_reset);
 711 }
 712
 713 #endif /* CFG_FLASH_PROTECTION */
 714
 715 /*
 716  * flash_is_busy - check to see if the flash is busy
 717  * This routine checks the status of the chip and returns true if the chip is busy
 718  */
 719 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
 720 {
 721         int retval;
 722
 723         switch (info->vendor) {
 724         case CFI_CMDSET_INTEL_STANDARD:
 725         case CFI_CMDSET_INTEL_EXTENDED:
 726                 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
 727                 break;
 728         case CFI_CMDSET_AMD_STANDARD:
 729         case CFI_CMDSET_AMD_EXTENDED:
 730                 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
 731                 break;
 732         default:
 733                 retval = 0;
 734         }
 735         debug ("flash_is_busy: %d\n", retval);
 736         return retval;
 737 }
 738
 739 /*-----------------------------------------------------------------------
 740  *  wait for XSR.7 to be set. Time out with an error if it does not.
 741  *  This routine does not set the flash to read-array mode.
 742  */
 743 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 744                                ulong tout, char *prompt)
 745 {
 746         ulong start;
 747
 748         /* Wait for command completion */
 749         start = get_timer (0);
 750         while (flash_is_busy (info, sector)) {
 751                 if (get_timer (start) > tout) {
 752                         printf ("Flash %s timeout at address %lx data %lx\n",
 753                                 prompt, info->start[sector],
 754                                 flash_read_long (info, sector, 0));
 755                         flash_write_cmd (info, sector, 0, info->cmd_reset);
 756                         return ERR_TIMOUT;
 757                 }
 758         }
 759         return ERR_OK;
 760 }
 761
 762 /*-----------------------------------------------------------------------
 763  * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
 764  * This routine sets the flash to read-array mode.
 765  */
 766 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 767                                     ulong tout, char *prompt)
 768 {
 769         int retcode;
 770
 771         retcode = flash_status_check (info, sector, tout, prompt);
 772         switch (info->vendor) {
 773         case CFI_CMDSET_INTEL_EXTENDED:
 774         case CFI_CMDSET_INTEL_STANDARD:
 775                 if ((retcode == ERR_OK)
 776                     && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
 777                         retcode = ERR_INVAL;
 778                         printf ("Flash %s error at address %lx\n", prompt,
 779                                 info->start[sector]);
 780                         if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
 781                                 puts ("Command Sequence Error.\n");
 782                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
 783                                 puts ("Block Erase Error.\n");
 784                                 retcode = ERR_NOT_ERASED;
 785                         } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
 786                                 puts ("Locking Error\n");
 787                         }
 788                         if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
 789                                 puts ("Block locked.\n");
 790                                 retcode = ERR_PROTECTED;
 791                         }
 792                         if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
 793                                 puts ("Vpp Low Error.\n");
 794                 }
 795                 flash_write_cmd (info, sector, 0, info->cmd_reset);
 796                 break;
 797         default:
 798                 break;
 799         }
 800         return retcode;
 801 }
 802
 803 /*-----------------------------------------------------------------------
 804  */
 805 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
 806 {
 807 #if defined(__LITTLE_ENDIAN)
 808         unsigned short  w;
 809         unsigned int    l;
 810         unsigned long long ll;
 811 #endif
 812
 813         switch (info->portwidth) {
 814         case FLASH_CFI_8BIT:
 815                 cword->c = c;
 816                 break;
 817         case FLASH_CFI_16BIT:
 818 #if defined(__LITTLE_ENDIAN)
 819                 w = c;
 820                 w <<= 8;
 821                 cword->w = (cword->w >> 8) | w;
 822 #else
 823                 cword->w = (cword->w << 8) | c;
 824 #endif
 825                 break;
 826         case FLASH_CFI_32BIT:
 827 #if defined(__LITTLE_ENDIAN)
 828                 l = c;
 829                 l <<= 24;
 830                 cword->l = (cword->l >> 8) | l;
 831 #else
 832                 cword->l = (cword->l << 8) | c;
 833 #endif
 834                 break;
 835         case FLASH_CFI_64BIT:
 836 #if defined(__LITTLE_ENDIAN)
 837                 ll = c;
 838                 ll <<= 56;
 839                 cword->ll = (cword->ll >> 8) | ll;
 840 #else
 841                 cword->ll = (cword->ll << 8) | c;
 842 #endif
 843                 break;
 844         }
 845 }
 846
 847
 848 /*-----------------------------------------------------------------------
 849  * make a proper sized command based on the port and chip widths
 850  */
 851 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
 852 {
 853         int i;
 854         uchar *cp = (uchar *) cmdbuf;
 855
 856 #if defined(__LITTLE_ENDIAN)
 857         for (i = info->portwidth; i > 0; i--)
 858 #else
 859         for (i = 1; i <= info->portwidth; i++)
 860 #endif
 861                 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
 862 }
 863
 864 /*
 865  * Write a proper sized command to the correct address
 866  */
 867 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 868 {
 869
 870         volatile cfiptr_t addr;
 871         cfiword_t cword;
 872
 873         addr.cp = flash_make_addr (info, sect, offset);
 874         flash_make_cmd (info, cmd, &cword);
 875         switch (info->portwidth) {
 876         case FLASH_CFI_8BIT:
 877                 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
 878                        cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 879                 *addr.cp = cword.c;
 880                 break;
 881         case FLASH_CFI_16BIT:
 882                 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
 883                        cmd, cword.w,
 884                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 885                 *addr.wp = cword.w;
 886                 break;
 887         case FLASH_CFI_32BIT:
 888                 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
 889                        cmd, cword.l,
 890                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 891                 *addr.lp = cword.l;
 892                 break;
 893         case FLASH_CFI_64BIT:
 894 #ifdef DEBUG
 895                 {
 896                         char str[20];
 897
 898                         print_longlong (str, cword.ll);
 899
 900                         debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 901                                addr.llp, cmd, str,
 902                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 903                 }
 904 #endif
 905                 *addr.llp = cword.ll;
 906                 break;
 907         }
 908 }
 909
 910 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
 911 {
 912         flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
 913         flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
 914 }
 915
 916 /*-----------------------------------------------------------------------
 917  */
 918 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 919 {
 920         cfiptr_t cptr;
 921         cfiword_t cword;
 922         int retval;
 923
 924         cptr.cp = flash_make_addr (info, sect, offset);
 925         flash_make_cmd (info, cmd, &cword);
 926
 927         debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
 928         switch (info->portwidth) {
 929         case FLASH_CFI_8BIT:
 930                 debug ("is= %x %x\n", cptr.cp[0], cword.c);
 931                 retval = (cptr.cp[0] == cword.c);
 932                 break;
 933         case FLASH_CFI_16BIT:
 934                 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
 935                 retval = (cptr.wp[0] == cword.w);
 936                 break;
 937         case FLASH_CFI_32BIT:
 938                 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
 939                 retval = (cptr.lp[0] == cword.l);
 940                 break;
 941         case FLASH_CFI_64BIT:
 942 #ifdef DEBUG
 943                 {
 944                         char str1[20];
 945                         char str2[20];
 946
 947                         print_longlong (str1, cptr.llp[0]);
 948                         print_longlong (str2, cword.ll);
 949                         debug ("is= %s %s\n", str1, str2);
 950                 }
 951 #endif
 952                 retval = (cptr.llp[0] == cword.ll);
 953                 break;
 954         default:
 955                 retval = 0;
 956                 break;
 957         }
 958         return retval;
 959 }
 960
 961 /*-----------------------------------------------------------------------
 962  */
 963 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 964 {
 965         cfiptr_t cptr;
 966         cfiword_t cword;
 967         int retval;
 968
 969         cptr.cp = flash_make_addr (info, sect, offset);
 970         flash_make_cmd (info, cmd, &cword);
 971         switch (info->portwidth) {
 972         case FLASH_CFI_8BIT:
 973                 retval = ((cptr.cp[0] & cword.c) == cword.c);
 974                 break;
 975         case FLASH_CFI_16BIT:
 976                 retval = ((cptr.wp[0] & cword.w) == cword.w);
 977                 break;
 978         case FLASH_CFI_32BIT:
 979                 retval = ((cptr.lp[0] & cword.l) == cword.l);
 980                 break;
 981         case FLASH_CFI_64BIT:
 982                 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
 983                 break;
 984         default:
 985                 retval = 0;
 986                 break;
 987         }
 988         return retval;
 989 }
 990
 991 /*-----------------------------------------------------------------------
 992  */
 993 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
 994 {
 995         cfiptr_t cptr;
 996         cfiword_t cword;
 997         int retval;
 998
 999         cptr.cp = flash_make_addr (info, sect, offset);
1000         flash_make_cmd (info, cmd, &cword);
1001         switch (info->portwidth) {
1002         case FLASH_CFI_8BIT:
1003                 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
1004                 break;
1005         case FLASH_CFI_16BIT:
1006                 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
1007                 break;
1008         case FLASH_CFI_32BIT:
1009                 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
1010                 break;
1011         case FLASH_CFI_64BIT:
1012                 retval = ((cptr.llp[0] & cword.ll) !=
1013                           (cptr.llp[0] & cword.ll));
1014                 break;
1015         default:
1016                 retval = 0;
1017                 break;
1018         }
1019         return retval;
1020 }
1021
1022 /*-----------------------------------------------------------------------
1023  * detect if flash is compatible with the Common Flash Interface (CFI)
1024  * http://www.jedec.org/download/search/jesd68.pdf
1025  *
1026 */
1027 static int flash_detect_cfi (flash_info_t * info)
1028 {
1029         debug ("flash detect cfi\n");
1030
1031         for (info->portwidth = CFG_FLASH_CFI_WIDTH;
1032              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1033                 for (info->chipwidth = FLASH_CFI_BY8;
1034                      info->chipwidth <= info->portwidth;
1035                      info->chipwidth <<= 1) {
1036                         flash_write_cmd (info, 0, 0, info->cmd_reset);
1037                         flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
1038                         if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1039                             && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1040                             && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1041                                 info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
1042                                 debug ("device interface is %d\n",
1043                                        info->interface);
1044                                 debug ("found port %d chip %d ",
1045                                        info->portwidth, info->chipwidth);
1046                                 debug ("port %d bits chip %d bits\n",
1047                                        info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1048                                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1049                                 return 1;
1050                         }
1051                 }
1052         }
1053         debug ("not found\n");
1054         return 0;
1055 }
1056
1057 /*
1058  * The following code cannot be run from FLASH!
1059  *
1060  */
1061 ulong flash_get_size (ulong base, int banknum)
1062 {
1063         flash_info_t *info = &flash_info[banknum];
1064         int i, j;
1065         flash_sect_t sect_cnt;
1066         unsigned long sector;
1067         unsigned long tmp;
1068         int size_ratio;
1069         uchar num_erase_regions;
1070         int erase_region_size;
1071         int erase_region_count;
1072
1073         info->start[0] = base;
1074
1075         if (flash_detect_cfi (info)) {
1076                 info->vendor = flash_read_ushort (info, 0, FLASH_OFFSET_PRIMARY_VENDOR);
1077 #ifdef DEBUG
1078                 flash_printqry (info, 0);
1079 #endif
1080                 switch (info->vendor) {
1081                 case CFI_CMDSET_INTEL_STANDARD:
1082                 case CFI_CMDSET_INTEL_EXTENDED:
1083                 default:
1084                         info->cmd_reset = FLASH_CMD_RESET;
1085                         break;
1086                 case CFI_CMDSET_AMD_STANDARD:
1087                 case CFI_CMDSET_AMD_EXTENDED:
1088                         info->cmd_reset = AMD_CMD_RESET;
1089                         break;
1090                 }
1091
1092                 debug ("manufacturer is %d\n", info->vendor);
1093                 size_ratio = info->portwidth / info->chipwidth;
1094                 /* if the chip is x8/x16 reduce the ratio by half */
1095                 if ((info->interface == FLASH_CFI_X8X16)
1096                     && (info->chipwidth == FLASH_CFI_BY8)) {
1097                         size_ratio >>= 1;
1098                 }
1099                 num_erase_regions = flash_read_uchar (info, FLASH_OFFSET_NUM_ERASE_REGIONS);
1100                 debug ("size_ratio %d port %d bits chip %d bits\n",
1101                        size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1102                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1103                 debug ("found %d erase regions\n", num_erase_regions);
1104                 sect_cnt = 0;
1105                 sector = base;
1106                 for (i = 0; i < num_erase_regions; i++) {
1107                         if (i > NUM_ERASE_REGIONS) {
1108                                 printf ("%d erase regions found, only %d used\n",
1109                                         num_erase_regions, NUM_ERASE_REGIONS);
1110                                 break;
1111                         }
1112                         tmp = flash_read_long (info, 0,
1113                                                FLASH_OFFSET_ERASE_REGIONS +
1114                                                i * 4);
1115                         erase_region_size =
1116                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1117                         tmp >>= 16;
1118                         erase_region_count = (tmp & 0xffff) + 1;
1119                         debug ("erase_region_count = %d erase_region_size = %d\n",
1120                                 erase_region_count, erase_region_size);
1121                         for (j = 0; j < erase_region_count; j++) {
1122                                 info->start[sect_cnt] = sector;
1123                                 sector += (erase_region_size * size_ratio);
1124
1125                                 /*
1126                                  * Only read protection status from supported devices (intel...)
1127                                  */
1128                                 switch (info->vendor) {
1129                                 case CFI_CMDSET_INTEL_EXTENDED:
1130                                 case CFI_CMDSET_INTEL_STANDARD:
1131                                         info->protect[sect_cnt] =
1132                                                 flash_isset (info, sect_cnt,
1133                                                              FLASH_OFFSET_PROTECT,
1134                                                              FLASH_STATUS_PROTECT);
1135                                         break;
1136                                 default:
1137                                         info->protect[sect_cnt] = 0; /* default: not protected */
1138                                 }
1139
1140                                 sect_cnt++;
1141                         }
1142                 }
1143
1144                 info->sector_count = sect_cnt;
1145                 /* multiply the size by the number of chips */
1146                 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
1147                 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
1148                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1149                 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
1150                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT);
1151                 info->buffer_write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)));
1152                 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) *
1153                       (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT));
1154                 info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1155                 info->flash_id = FLASH_MAN_CFI;
1156                 if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
1157                         info->portwidth >>= 1;  /* XXX - Need to test on x8/x16 in parallel. */
1158                 }
1159         }
1160
1161         flash_write_cmd (info, 0, 0, info->cmd_reset);
1162         return (info->size);
1163 }
1164
1165 /* loop through the sectors from the highest address
1166  * when the passed address is greater or equal to the sector address
1167  * we have a match
1168  */
1169 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1170 {
1171         flash_sect_t sector;
1172
1173         for (sector = info->sector_count - 1; sector >= 0; sector--) {
1174                 if (addr >= info->start[sector])
1175                         break;
1176         }
1177         return sector;
1178 }
1179
1180 /*-----------------------------------------------------------------------
1181  */
1182 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1183                                 cfiword_t cword)
1184 {
1185         cfiptr_t ctladdr;
1186         cfiptr_t cptr;
1187         int flag;
1188
1189         ctladdr.cp = flash_make_addr (info, 0, 0);
1190         cptr.cp = (uchar *) dest;
1191
1192
1193         /* Check if Flash is (sufficiently) erased */
1194         switch (info->portwidth) {
1195         case FLASH_CFI_8BIT:
1196                 flag = ((cptr.cp[0] & cword.c) == cword.c);
1197                 break;
1198         case FLASH_CFI_16BIT:
1199                 flag = ((cptr.wp[0] & cword.w) == cword.w);
1200                 break;
1201         case FLASH_CFI_32BIT:
1202                 flag = ((cptr.lp[0] & cword.l) == cword.l);
1203                 break;
1204         case FLASH_CFI_64BIT:
1205                 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
1206                 break;
1207         default:
1208                 return 2;
1209         }
1210         if (!flag)
1211                 return 2;
1212
1213         /* Disable interrupts which might cause a timeout here */
1214         flag = disable_interrupts ();
1215
1216         switch (info->vendor) {
1217         case CFI_CMDSET_INTEL_EXTENDED:
1218         case CFI_CMDSET_INTEL_STANDARD:
1219                 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1220                 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1221                 break;
1222         case CFI_CMDSET_AMD_EXTENDED:
1223         case CFI_CMDSET_AMD_STANDARD:
1224                 flash_unlock_seq (info, 0);
1225                 flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
1226                 break;
1227         }
1228
1229         switch (info->portwidth) {
1230         case FLASH_CFI_8BIT:
1231                 cptr.cp[0] = cword.c;
1232                 break;
1233         case FLASH_CFI_16BIT:
1234                 cptr.wp[0] = cword.w;
1235                 break;
1236         case FLASH_CFI_32BIT:
1237                 cptr.lp[0] = cword.l;
1238                 break;
1239         case FLASH_CFI_64BIT:
1240                 cptr.llp[0] = cword.ll;
1241                 break;
1242         }
1243
1244         /* re-enable interrupts if necessary */
1245         if (flag)
1246                 enable_interrupts ();
1247
1248         return flash_full_status_check (info, find_sector (info, dest),
1249                                         info->write_tout, "write");
1250 }
1251
1252 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1253
1254 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1255                                   int len)
1256 {
1257         flash_sect_t sector;
1258         int cnt;
1259         int retcode;
1260         volatile cfiptr_t src;
1261         volatile cfiptr_t dst;
1262
1263         switch (info->vendor) {
1264         case CFI_CMDSET_INTEL_STANDARD:
1265         case CFI_CMDSET_INTEL_EXTENDED:
1266                 src.cp = cp;
1267                 dst.cp = (uchar *) dest;
1268                 sector = find_sector (info, dest);
1269                 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1270                 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1271                 if ((retcode = flash_status_check (info, sector, info->buffer_write_tout,
1272                                                    "write to buffer")) == ERR_OK) {
1273                         /* reduce the number of loops by the width of the port  */
1274                         switch (info->portwidth) {
1275                         case FLASH_CFI_8BIT:
1276                                 cnt = len;
1277                                 break;
1278                         case FLASH_CFI_16BIT:
1279                                 cnt = len >> 1;
1280                                 break;
1281                         case FLASH_CFI_32BIT:
1282                                 cnt = len >> 2;
1283                                 break;
1284                         case FLASH_CFI_64BIT:
1285                                 cnt = len >> 3;
1286                                 break;
1287                         default:
1288                                 return ERR_INVAL;
1289                                 break;
1290                         }
1291                         flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1292                         while (cnt-- > 0) {
1293                                 switch (info->portwidth) {
1294                                 case FLASH_CFI_8BIT:
1295                                         *dst.cp++ = *src.cp++;
1296                                         break;
1297                                 case FLASH_CFI_16BIT:
1298                                         *dst.wp++ = *src.wp++;
1299                                         break;
1300                                 case FLASH_CFI_32BIT:
1301                                         *dst.lp++ = *src.lp++;
1302                                         break;
1303                                 case FLASH_CFI_64BIT:
1304                                         *dst.llp++ = *src.llp++;
1305                                         break;
1306                                 default:
1307                                         return ERR_INVAL;
1308                                         break;
1309                                 }
1310                         }
1311                         flash_write_cmd (info, sector, 0,
1312                                          FLASH_CMD_WRITE_BUFFER_CONFIRM);
1313                         retcode = flash_full_status_check (info, sector,
1314                                                            info->buffer_write_tout,
1315                                                            "buffer write");
1316                 }
1317                 return retcode;
1318
1319         case CFI_CMDSET_AMD_STANDARD:
1320         case CFI_CMDSET_AMD_EXTENDED:
1321                 src.cp = cp;
1322                 dst.cp = (uchar *) dest;
1323                 sector = find_sector (info, dest);
1324
1325                 flash_unlock_seq(info,0);
1326                 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
1327
1328                 switch (info->portwidth) {
1329                 case FLASH_CFI_8BIT:
1330                         cnt = len;
1331                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1332                         while (cnt-- > 0) *dst.cp++ = *src.cp++;
1333                         break;
1334                 case FLASH_CFI_16BIT:
1335                         cnt = len >> 1;
1336                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1337                         while (cnt-- > 0) *dst.wp++ = *src.wp++;
1338                         break;
1339                 case FLASH_CFI_32BIT:
1340                         cnt = len >> 2;
1341                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1342                         while (cnt-- > 0) *dst.lp++ = *src.lp++;
1343                         break;
1344                 case FLASH_CFI_64BIT:
1345                         cnt = len >> 3;
1346                         flash_write_cmd (info, sector, 0,  (uchar) cnt - 1);
1347                         while (cnt-- > 0) *dst.llp++ = *src.llp++;
1348                         break;
1349                 default:
1350                         return ERR_INVAL;
1351                 }
1352
1353                 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1354                 retcode = flash_full_status_check (info, sector, info->buffer_write_tout,
1355                                                    "buffer write");
1356                 return retcode;
1357
1358         default:
1359                 debug ("Unknown Command Set\n");
1360                 return ERR_INVAL;
1361         }
1362 }
1363 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1364 #endif /* CFG_FLASH_CFI */