2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003, 2006 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
7 * Modified to work with AMD flashes
8 * Added support for byte lanes swap
9 * Added support for 32-bit chips consisting of two 16-bit devices
10 * (for example, S70GL256M00)
14 * Modified to work with little-endian systems.
16 * See file CREDITS for list of people who contributed to this
19 * This program is free software; you can redistribute it and/or
20 * modify it under the terms of the GNU General Public License as
21 * published by the Free Software Foundation; either version 2 of
22 * the License, or (at your option) any later version.
24 * This program is distributed in the hope that it will be useful,
25 * but WITHOUT ANY WARRANTY; without even the implied warranty of
26 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
27 * GNU General Public License for more details.
29 * You should have received a copy of the GNU General Public License
30 * along with this program; if not, write to the Free Software
31 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
35 * 01/20/2004 - combined variants of original driver.
36 * 01/22/2004 - Write performance enhancements for parallel chips (Tolunay)
37 * 01/23/2004 - Support for x8/x16 chips (Rune Raknerud)
38 * 01/27/2004 - Little endian support Ed Okerson
40 * Tested Architectures
41 * Port Width Chip Width # of banks Flash Chip Board
42 * 32 16 1 28F128J3 seranoa/eagle
43 * 64 16 1 28F128J3 seranoa/falcon
47 /* The DEBUG define must be before common to enable debugging */
52 #ifdef CFG_FLASH_CFI_DRIVER
55 #include <asm/processor.h>
56 #include <asm/byteorder.h>
57 #include <environment.h>
60 * This file implements a Common Flash Interface (CFI) driver for U-Boot.
61 * The width of the port and the width of the chips are determined at initialization.
62 * These widths are used to calculate the address for access CFI data structures.
63 * It has been tested on an Intel Strataflash implementation and AMD 29F016D.
66 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
67 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
68 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
69 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
73 * Use Primary Extended Query table (PRI) and Alternate Algorithm Query
74 * Table (ALT) to determine if protection is available
76 * Add support for other command sets Use the PRI and ALT to determine command set
77 * Verify erase and program timeouts.
80 #if defined(__LITTLE_ENDIAN) && !defined(CFG_FLASH_CFI_SWAP)
81 #define CFG_FLASH_CFI_SWAP
84 #ifndef CFG_FLASH_BANKS_LIST
85 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
88 #define FLASH_CMD_CFI 0x98
89 #define FLASH_CMD_READ_ID 0x90
90 #define FLASH_CMD_RESET 0xff
91 #define FLASH_CMD_BLOCK_ERASE 0x20
92 #define FLASH_CMD_ERASE_CONFIRM 0xD0
93 #define FLASH_CMD_WRITE 0x40
94 #define FLASH_CMD_PROTECT 0x60
95 #define FLASH_CMD_PROTECT_SET 0x01
96 #define FLASH_CMD_PROTECT_CLEAR 0xD0
97 #define FLASH_CMD_CLEAR_STATUS 0x50
98 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
99 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
101 #define FLASH_STATUS_DONE 0x80
102 #define FLASH_STATUS_ESS 0x40
103 #define FLASH_STATUS_ECLBS 0x20
104 #define FLASH_STATUS_PSLBS 0x10
105 #define FLASH_STATUS_VPENS 0x08
106 #define FLASH_STATUS_PSS 0x04
107 #define FLASH_STATUS_DPS 0x02
108 #define FLASH_STATUS_R 0x01
109 #define FLASH_STATUS_PROTECT 0x01
111 #define AMD_CMD_RESET 0xF0
112 #define AMD_CMD_WRITE 0xA0
113 #define AMD_CMD_ERASE_START 0x80
114 #define AMD_CMD_ERASE_SECTOR 0x30
115 #define AMD_CMD_UNLOCK_START 0xAA
116 #define AMD_CMD_UNLOCK_ACK 0x55
117 #define AMD_CMD_WRITE_TO_BUFFER 0x25
118 #define AMD_CMD_WRITE_BUFFER_CONFIRM 0x29
120 #define AMD_STATUS_TOGGLE 0x40
121 #define AMD_STATUS_ERROR 0x20
123 #define AMD_ADDR_ERASE_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
124 #define AMD_ADDR_START ((info->portwidth == FLASH_CFI_8BIT) ? 0xAAA : 0x555)
125 #define AMD_ADDR_ACK ((info->portwidth == FLASH_CFI_8BIT) ? 0x555 : 0x2AA)
127 #define FLASH_OFFSET_CFI 0x55
128 #define FLASH_OFFSET_CFI_RESP 0x10
129 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
130 #define FLASH_OFFSET_EXT_QUERY_T_P_ADDR 0x15 /* extended query table primary addr */
131 #define FLASH_OFFSET_WTOUT 0x1F
132 #define FLASH_OFFSET_WBTOUT 0x20
133 #define FLASH_OFFSET_ETOUT 0x21
134 #define FLASH_OFFSET_CETOUT 0x22
135 #define FLASH_OFFSET_WMAX_TOUT 0x23
136 #define FLASH_OFFSET_WBMAX_TOUT 0x24
137 #define FLASH_OFFSET_EMAX_TOUT 0x25
138 #define FLASH_OFFSET_CEMAX_TOUT 0x26
139 #define FLASH_OFFSET_SIZE 0x27
140 #define FLASH_OFFSET_INTERFACE 0x28
141 #define FLASH_OFFSET_BUFFER_SIZE 0x2A
142 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
143 #define FLASH_OFFSET_ERASE_REGIONS 0x2D
144 #define FLASH_OFFSET_PROTECT 0x02
145 #define FLASH_OFFSET_USER_PROTECTION 0x85
146 #define FLASH_OFFSET_INTEL_PROTECTION 0x81
149 #define FLASH_MAN_CFI 0x01000000
151 #define CFI_CMDSET_NONE 0
152 #define CFI_CMDSET_INTEL_EXTENDED 1
153 #define CFI_CMDSET_AMD_STANDARD 2
154 #define CFI_CMDSET_INTEL_STANDARD 3
155 #define CFI_CMDSET_AMD_EXTENDED 4
156 #define CFI_CMDSET_MITSU_STANDARD 256
157 #define CFI_CMDSET_MITSU_EXTENDED 257
158 #define CFI_CMDSET_SST 258
161 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
162 # undef FLASH_CMD_RESET
163 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
171 unsigned long long ll;
175 volatile unsigned char *cp;
176 volatile unsigned short *wp;
177 volatile unsigned long *lp;
178 volatile unsigned long long *llp;
181 #define NUM_ERASE_REGIONS 4
183 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
184 #ifdef CFG_MAX_FLASH_BANKS_DETECT
185 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
186 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */
188 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
189 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */
193 * Check if chip width is defined. If not, start detecting with 8bit.
195 #ifndef CFG_FLASH_CFI_WIDTH
196 #define CFG_FLASH_CFI_WIDTH FLASH_CFI_8BIT
200 /*-----------------------------------------------------------------------
204 typedef unsigned long flash_sect_t;
206 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
207 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
208 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
209 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
210 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
211 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
212 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
213 static int flash_detect_cfi (flash_info_t * info);
214 static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
215 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
216 ulong tout, char *prompt);
217 ulong flash_get_size (ulong base, int banknum);
218 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
219 static flash_info_t *flash_get_info(ulong base);
221 #ifdef CFG_FLASH_USE_BUFFER_WRITE
222 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
225 /*-----------------------------------------------------------------------
226 * create an address based on the offset and the port width
228 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
230 return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
234 /*-----------------------------------------------------------------------
237 void print_longlong (char *str, unsigned long long data)
242 cp = (unsigned char *) &data;
243 for (i = 0; i < 8; i++)
244 sprintf (&str[i * 2], "%2.2x", *cp++);
246 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
251 for (x = 0; x < 0x40; x += 16U / info->portwidth) {
253 flash_make_addr (info, sect,
254 x + FLASH_OFFSET_CFI_RESP);
255 debug ("%p : ", cptr.cp);
256 for (y = 0; y < 16; y++) {
257 debug ("%2.2x ", cptr.cp[y]);
260 for (y = 0; y < 16; y++) {
261 if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
262 debug ("%c", cptr.cp[y]);
273 /*-----------------------------------------------------------------------
274 * read a character at a port width address
276 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
280 cp = flash_make_addr (info, 0, offset);
281 #if defined(CFG_FLASH_CFI_SWAP)
284 return (cp[info->portwidth - 1]);
288 /*-----------------------------------------------------------------------
289 * read a short word by swapping for ppc format.
291 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
299 addr = flash_make_addr (info, sect, offset);
302 debug ("ushort addr is at %p info->portwidth = %d\n", addr,
304 for (x = 0; x < 2 * info->portwidth; x++) {
305 debug ("addr[%x] = 0x%x\n", x, addr[x]);
308 #if defined(CFG_FLASH_CFI_SWAP)
309 retval = ((addr[(info->portwidth)] << 8) | addr[0]);
311 retval = ((addr[(2 * info->portwidth) - 1] << 8) |
312 addr[info->portwidth - 1]);
315 debug ("retval = 0x%x\n", retval);
319 /*-----------------------------------------------------------------------
320 * read a long word by picking the least significant byte of each maiximum
321 * port size word. Swap for ppc format.
323 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
331 addr = flash_make_addr (info, sect, offset);
334 debug ("long addr is at %p info->portwidth = %d\n", addr,
336 for (x = 0; x < 4 * info->portwidth; x++) {
337 debug ("addr[%x] = 0x%x\n", x, addr[x]);
340 #if defined(CFG_FLASH_CFI_SWAP)
341 retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
342 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
344 retval = (addr[(2 * info->portwidth) - 1] << 24) |
345 (addr[(info->portwidth) - 1] << 16) |
346 (addr[(4 * info->portwidth) - 1] << 8) |
347 addr[(3 * info->portwidth) - 1];
353 /*-----------------------------------------------------------------------
355 unsigned long flash_init (void)
357 unsigned long size = 0;
360 #ifdef CFG_FLASH_PROTECTION
361 char *s = getenv("unlock");
364 /* Init: no FLASHes known */
365 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
366 flash_info[i].flash_id = FLASH_UNKNOWN;
367 size += flash_info[i].size = flash_get_size (bank_base[i], i);
368 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
369 #ifndef CFG_FLASH_QUIET_TEST
370 printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
371 i, flash_info[i].size, flash_info[i].size << 20);
372 #endif /* CFG_FLASH_QUIET_TEST */
374 #ifdef CFG_FLASH_PROTECTION
375 else if ((s != NULL) && (strcmp(s, "yes") == 0)) {
377 * Only the U-Boot image and it's environment is protected,
378 * all other sectors are unprotected (unlocked) if flash
379 * hardware protection is used (CFG_FLASH_PROTECTION) and
380 * the environment variable "unlock" is set to "yes".
382 if (flash_info[i].legacy_unlock) {
386 * Disable legacy_unlock temporarily, since
387 * flash_real_protect would relock all other sectors
390 flash_info[i].legacy_unlock = 0;
393 * Legacy unlocking (e.g. Intel J3) -> unlock only one
394 * sector. This will unlock all sectors.
396 flash_real_protect (&flash_info[i], 0, 0);
398 flash_info[i].legacy_unlock = 1;
401 * Manually mark other sectors as unlocked (unprotected)
403 for (k = 1; k < flash_info[i].sector_count; k++)
404 flash_info[i].protect[k] = 0;
407 * No legancy unlocking -> unlock all sectors
409 flash_protect (FLAG_PROTECT_CLEAR,
410 flash_info[i].start[0],
411 flash_info[i].start[0] + flash_info[i].size - 1,
415 #endif /* CFG_FLASH_PROTECTION */
418 /* Monitor protection ON by default */
419 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
420 flash_protect (FLAG_PROTECT_SET,
422 CFG_MONITOR_BASE + monitor_flash_len - 1,
423 flash_get_info(CFG_MONITOR_BASE));
426 /* Environment protection ON by default */
427 #ifdef CFG_ENV_IS_IN_FLASH
428 flash_protect (FLAG_PROTECT_SET,
430 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
431 flash_get_info(CFG_ENV_ADDR));
434 /* Redundant environment protection ON by default */
435 #ifdef CFG_ENV_ADDR_REDUND
436 flash_protect (FLAG_PROTECT_SET,
438 CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
439 flash_get_info(CFG_ENV_ADDR_REDUND));
444 /*-----------------------------------------------------------------------
446 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
447 static flash_info_t *flash_get_info(ulong base)
450 flash_info_t * info = 0;
452 for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
453 info = & flash_info[i];
454 if (info->size && info->start[0] <= base &&
455 base <= info->start[0] + info->size - 1)
459 return i == CFG_MAX_FLASH_BANKS ? 0 : info;
463 /*-----------------------------------------------------------------------
465 int flash_erase (flash_info_t * info, int s_first, int s_last)
471 if (info->flash_id != FLASH_MAN_CFI) {
472 puts ("Can't erase unknown flash type - aborted\n");
475 if ((s_first < 0) || (s_first > s_last)) {
476 puts ("- no sectors to erase\n");
481 for (sect = s_first; sect <= s_last; ++sect) {
482 if (info->protect[sect]) {
487 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
493 for (sect = s_first; sect <= s_last; sect++) {
494 if (info->protect[sect] == 0) { /* not protected */
495 switch (info->vendor) {
496 case CFI_CMDSET_INTEL_STANDARD:
497 case CFI_CMDSET_INTEL_EXTENDED:
498 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
499 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
500 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
502 case CFI_CMDSET_AMD_STANDARD:
503 case CFI_CMDSET_AMD_EXTENDED:
504 flash_unlock_seq (info, sect);
505 flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
506 AMD_CMD_ERASE_START);
507 flash_unlock_seq (info, sect);
508 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
511 debug ("Unkown flash vendor %d\n",
516 if (flash_full_status_check
517 (info, sect, info->erase_blk_tout, "erase")) {
527 /*-----------------------------------------------------------------------
529 void flash_print_info (flash_info_t * info)
533 if (info->flash_id != FLASH_MAN_CFI) {
534 puts ("missing or unknown FLASH type\n");
538 printf ("CFI conformant FLASH (%d x %d)",
539 (info->portwidth << 3), (info->chipwidth << 3));
540 printf (" Size: %ld MB in %d Sectors\n",
541 info->size >> 20, info->sector_count);
542 printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
543 info->erase_blk_tout,
545 info->buffer_write_tout,
548 puts (" Sector Start Addresses:");
549 for (i = 0; i < info->sector_count; ++i) {
550 #ifdef CFG_FLASH_EMPTY_INFO
554 volatile unsigned long *flash;
557 * Check if whole sector is erased
559 if (i != (info->sector_count - 1))
560 size = info->start[i + 1] - info->start[i];
562 size = info->start[0] + info->size - info->start[i];
564 flash = (volatile unsigned long *) info->start[i];
565 size = size >> 2; /* divide by 4 for longword access */
566 for (k = 0; k < size; k++) {
567 if (*flash++ != 0xffffffff) {
575 /* print empty and read-only info */
576 printf (" %08lX%s%s",
579 info->protect[i] ? "RO " : " ");
580 #else /* ! CFG_FLASH_EMPTY_INFO */
584 info->start[i], info->protect[i] ? " (RO)" : " ");
591 /*-----------------------------------------------------------------------
592 * Copy memory to flash, returns:
595 * 2 - Flash not erased
597 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
605 #ifdef CFG_FLASH_USE_BUFFER_WRITE
608 /* get lower aligned address */
609 /* get lower aligned address */
610 wp = (addr & ~(info->portwidth - 1));
612 /* handle unaligned start */
613 if ((aln = addr - wp) != 0) {
616 for (i = 0; i < aln; ++i, ++cp)
617 flash_add_byte (info, &cword, (*(uchar *) cp));
619 for (; (i < info->portwidth) && (cnt > 0); i++) {
620 flash_add_byte (info, &cword, *src++);
624 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
625 flash_add_byte (info, &cword, (*(uchar *) cp));
626 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
631 /* handle the aligned part */
632 #ifdef CFG_FLASH_USE_BUFFER_WRITE
633 buffered_size = (info->portwidth / info->chipwidth);
634 buffered_size *= info->buffer_size;
635 while (cnt >= info->portwidth) {
636 /* prohibit buffer write when buffer_size is 1 */
637 if (info->buffer_size == 1) {
639 for (i = 0; i < info->portwidth; i++)
640 flash_add_byte (info, &cword, *src++);
641 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
643 wp += info->portwidth;
644 cnt -= info->portwidth;
648 /* write buffer until next buffered_size aligned boundary */
649 i = buffered_size - (wp % buffered_size);
652 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
654 i -= i & (info->portwidth - 1);
660 while (cnt >= info->portwidth) {
662 for (i = 0; i < info->portwidth; i++) {
663 flash_add_byte (info, &cword, *src++);
665 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
667 wp += info->portwidth;
668 cnt -= info->portwidth;
670 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
676 * handle unaligned tail bytes
679 for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
680 flash_add_byte (info, &cword, *src++);
683 for (; i < info->portwidth; ++i, ++cp) {
684 flash_add_byte (info, &cword, (*(uchar *) cp));
687 return flash_write_cfiword (info, wp, cword);
690 /*-----------------------------------------------------------------------
692 #ifdef CFG_FLASH_PROTECTION
694 int flash_real_protect (flash_info_t * info, long sector, int prot)
698 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
699 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
701 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
703 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
706 flash_full_status_check (info, sector, info->erase_blk_tout,
707 prot ? "protect" : "unprotect")) == 0) {
709 info->protect[sector] = prot;
712 * On some of Intel's flash chips (marked via legacy_unlock)
713 * unprotect unprotects all locking.
715 if ((prot == 0) && (info->legacy_unlock)) {
718 for (i = 0; i < info->sector_count; i++) {
719 if (info->protect[i])
720 flash_real_protect (info, i, 1);
727 /*-----------------------------------------------------------------------
728 * flash_read_user_serial - read the OneTimeProgramming cells
730 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
737 src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
738 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
739 memcpy (dst, src + offset, len);
740 flash_write_cmd (info, 0, 0, info->cmd_reset);
744 * flash_read_factory_serial - read the device Id from the protection area
746 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
751 src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
752 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
753 memcpy (buffer, src + offset, len);
754 flash_write_cmd (info, 0, 0, info->cmd_reset);
757 #endif /* CFG_FLASH_PROTECTION */
760 * flash_is_busy - check to see if the flash is busy
761 * This routine checks the status of the chip and returns true if the chip is busy
763 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
767 switch (info->vendor) {
768 case CFI_CMDSET_INTEL_STANDARD:
769 case CFI_CMDSET_INTEL_EXTENDED:
770 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
772 case CFI_CMDSET_AMD_STANDARD:
773 case CFI_CMDSET_AMD_EXTENDED:
774 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
779 debug ("flash_is_busy: %d\n", retval);
783 /*-----------------------------------------------------------------------
784 * wait for XSR.7 to be set. Time out with an error if it does not.
785 * This routine does not set the flash to read-array mode.
787 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
788 ulong tout, char *prompt)
796 /* Wait for command completion */
797 start = get_timer (0);
798 while (flash_is_busy (info, sector)) {
799 if (get_timer (start) > tout) {
800 printf ("Flash %s timeout at address %lx data %lx\n",
801 prompt, info->start[sector],
802 flash_read_long (info, sector, 0));
803 flash_write_cmd (info, sector, 0, info->cmd_reset);
806 udelay (1); /* also triggers watchdog */
811 /*-----------------------------------------------------------------------
812 * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
813 * This routine sets the flash to read-array mode.
815 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
816 ulong tout, char *prompt)
820 retcode = flash_status_check (info, sector, tout, prompt);
821 switch (info->vendor) {
822 case CFI_CMDSET_INTEL_EXTENDED:
823 case CFI_CMDSET_INTEL_STANDARD:
824 if ((retcode == ERR_OK)
825 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
827 printf ("Flash %s error at address %lx\n", prompt,
828 info->start[sector]);
829 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
830 puts ("Command Sequence Error.\n");
831 } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
832 puts ("Block Erase Error.\n");
833 retcode = ERR_NOT_ERASED;
834 } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
835 puts ("Locking Error\n");
837 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
838 puts ("Block locked.\n");
839 retcode = ERR_PROTECTED;
841 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
842 puts ("Vpp Low Error.\n");
844 flash_write_cmd (info, sector, 0, info->cmd_reset);
852 /*-----------------------------------------------------------------------
854 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
856 #if defined(__LITTLE_ENDIAN)
859 unsigned long long ll;
862 switch (info->portwidth) {
866 case FLASH_CFI_16BIT:
867 #if defined(__LITTLE_ENDIAN)
870 cword->w = (cword->w >> 8) | w;
872 cword->w = (cword->w << 8) | c;
875 case FLASH_CFI_32BIT:
876 #if defined(__LITTLE_ENDIAN)
879 cword->l = (cword->l >> 8) | l;
881 cword->l = (cword->l << 8) | c;
884 case FLASH_CFI_64BIT:
885 #if defined(__LITTLE_ENDIAN)
888 cword->ll = (cword->ll >> 8) | ll;
890 cword->ll = (cword->ll << 8) | c;
897 /*-----------------------------------------------------------------------
898 * make a proper sized command based on the port and chip widths
900 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
903 uchar *cp = (uchar *) cmdbuf;
905 #if defined(CFG_FLASH_CFI_SWAP)
906 for (i = info->portwidth; i > 0; i--)
908 for (i = 1; i <= info->portwidth; i++)
910 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
911 #ifdef CFG_FLASH_CFI_2x16
912 if ((info->portwidth == FLASH_CFI_32BIT) && (info->chipwidth == FLASH_CFI_BY16))
915 cp = (uchar *) cmdbuf;
920 #endif /* CFG_FLASH_CFI_2x16 */
924 * Write a proper sized command to the correct address
926 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
929 volatile cfiptr_t addr;
932 addr.cp = flash_make_addr (info, sect, offset);
933 flash_make_cmd (info, cmd, &cword);
934 switch (info->portwidth) {
936 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
937 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
939 #ifdef CONFIG_BLACKFIN
943 case FLASH_CFI_16BIT:
944 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
946 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
948 #ifdef CONFIG_BLACKFIN
952 case FLASH_CFI_32BIT:
953 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
955 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
957 #ifdef CONFIG_BLACKFIN
961 case FLASH_CFI_64BIT:
966 print_longlong (str, cword.ll);
968 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
970 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
973 *addr.llp = cword.ll;
974 #ifdef CONFIG_BLACKFIN
981 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
983 flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
984 flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
987 /*-----------------------------------------------------------------------
989 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
995 cptr.cp = flash_make_addr (info, sect, offset);
996 flash_make_cmd (info, cmd, &cword);
998 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
999 switch (info->portwidth) {
1000 case FLASH_CFI_8BIT:
1001 debug ("is= %x %x\n", cptr.cp[0], cword.c);
1002 retval = (cptr.cp[0] == cword.c);
1004 case FLASH_CFI_16BIT:
1005 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
1006 retval = (cptr.wp[0] == cword.w);
1008 case FLASH_CFI_32BIT:
1009 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
1010 retval = (cptr.lp[0] == cword.l);
1012 case FLASH_CFI_64BIT:
1018 print_longlong (str1, cptr.llp[0]);
1019 print_longlong (str2, cword.ll);
1020 debug ("is= %s %s\n", str1, str2);
1023 retval = (cptr.llp[0] == cword.ll);
1032 /*-----------------------------------------------------------------------
1034 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
1040 cptr.cp = flash_make_addr (info, sect, offset);
1041 flash_make_cmd (info, cmd, &cword);
1042 switch (info->portwidth) {
1043 case FLASH_CFI_8BIT:
1044 retval = ((cptr.cp[0] & cword.c) == cword.c);
1046 case FLASH_CFI_16BIT:
1047 retval = ((cptr.wp[0] & cword.w) == cword.w);
1049 case FLASH_CFI_32BIT:
1050 retval = ((cptr.lp[0] & cword.l) == cword.l);
1052 case FLASH_CFI_64BIT:
1053 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
1062 /*-----------------------------------------------------------------------
1064 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
1070 cptr.cp = flash_make_addr (info, sect, offset);
1071 flash_make_cmd (info, cmd, &cword);
1072 switch (info->portwidth) {
1073 case FLASH_CFI_8BIT:
1074 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
1076 case FLASH_CFI_16BIT:
1077 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
1079 case FLASH_CFI_32BIT:
1080 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
1082 case FLASH_CFI_64BIT:
1083 retval = ((cptr.llp[0] & cword.ll) !=
1084 (cptr.llp[0] & cword.ll));
1093 /*-----------------------------------------------------------------------
1094 * detect if flash is compatible with the Common Flash Interface (CFI)
1095 * http://www.jedec.org/download/search/jesd68.pdf
1098 static int flash_detect_cfi (flash_info_t * info)
1100 debug ("flash detect cfi\n");
1102 for (info->portwidth = CFG_FLASH_CFI_WIDTH;
1103 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
1104 for (info->chipwidth = FLASH_CFI_BY8;
1105 info->chipwidth <= info->portwidth;
1106 info->chipwidth <<= 1) {
1107 flash_write_cmd (info, 0, 0, info->cmd_reset);
1108 flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
1109 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
1110 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
1111 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
1112 info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
1113 debug ("device interface is %d\n",
1115 debug ("found port %d chip %d ",
1116 info->portwidth, info->chipwidth);
1117 debug ("port %d bits chip %d bits\n",
1118 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1119 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1124 debug ("not found\n");
1129 * The following code cannot be run from FLASH!
1132 ulong flash_get_size (ulong base, int banknum)
1134 flash_info_t *info = &flash_info[banknum];
1136 flash_sect_t sect_cnt;
1137 unsigned long sector;
1140 uchar num_erase_regions;
1141 int erase_region_size;
1142 int erase_region_count;
1143 #ifdef CFG_FLASH_PROTECTION
1145 info->legacy_unlock = 0;
1148 info->start[0] = base;
1150 if (flash_detect_cfi (info)) {
1151 info->vendor = flash_read_ushort (info, 0, FLASH_OFFSET_PRIMARY_VENDOR);
1153 flash_printqry (info, 0);
1155 switch (info->vendor) {
1156 case CFI_CMDSET_INTEL_STANDARD:
1157 case CFI_CMDSET_INTEL_EXTENDED:
1159 info->cmd_reset = FLASH_CMD_RESET;
1160 #ifdef CFG_FLASH_PROTECTION
1161 /* read legacy lock/unlock bit from intel flash */
1162 ext_addr = flash_read_ushort (info, 0,
1163 FLASH_OFFSET_EXT_QUERY_T_P_ADDR);
1164 info->legacy_unlock =
1165 flash_read_uchar (info, ext_addr + 5) & 0x08;
1168 case CFI_CMDSET_AMD_STANDARD:
1169 case CFI_CMDSET_AMD_EXTENDED:
1170 info->cmd_reset = AMD_CMD_RESET;
1174 debug ("manufacturer is %d\n", info->vendor);
1175 size_ratio = info->portwidth / info->chipwidth;
1176 /* if the chip is x8/x16 reduce the ratio by half */
1177 if ((info->interface == FLASH_CFI_X8X16)
1178 && (info->chipwidth == FLASH_CFI_BY8)) {
1181 num_erase_regions = flash_read_uchar (info, FLASH_OFFSET_NUM_ERASE_REGIONS);
1182 debug ("size_ratio %d port %d bits chip %d bits\n",
1183 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1184 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1185 debug ("found %d erase regions\n", num_erase_regions);
1188 for (i = 0; i < num_erase_regions; i++) {
1189 if (i > NUM_ERASE_REGIONS) {
1190 printf ("%d erase regions found, only %d used\n",
1191 num_erase_regions, NUM_ERASE_REGIONS);
1194 tmp = flash_read_long (info, 0,
1195 FLASH_OFFSET_ERASE_REGIONS +
1198 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1200 erase_region_count = (tmp & 0xffff) + 1;
1201 debug ("erase_region_count = %d erase_region_size = %d\n",
1202 erase_region_count, erase_region_size);
1203 for (j = 0; j < erase_region_count; j++) {
1204 info->start[sect_cnt] = sector;
1205 sector += (erase_region_size * size_ratio);
1208 * Only read protection status from supported devices (intel...)
1210 switch (info->vendor) {
1211 case CFI_CMDSET_INTEL_EXTENDED:
1212 case CFI_CMDSET_INTEL_STANDARD:
1213 info->protect[sect_cnt] =
1214 flash_isset (info, sect_cnt,
1215 FLASH_OFFSET_PROTECT,
1216 FLASH_STATUS_PROTECT);
1219 info->protect[sect_cnt] = 0; /* default: not protected */
1226 info->sector_count = sect_cnt;
1227 /* multiply the size by the number of chips */
1228 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
1229 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
1230 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1231 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
1232 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT)) *
1233 (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT));
1234 info->buffer_write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1235 tmp = (1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT)) *
1236 (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT));
1237 info->write_tout = tmp / 1000 + (tmp % 1000 ? 1 : 0); /* round up when converting to ms */
1238 info->flash_id = FLASH_MAN_CFI;
1239 if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
1240 info->portwidth >>= 1; /* XXX - Need to test on x8/x16 in parallel. */
1244 flash_write_cmd (info, 0, 0, info->cmd_reset);
1245 return (info->size);
1248 /* loop through the sectors from the highest address
1249 * when the passed address is greater or equal to the sector address
1252 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1254 flash_sect_t sector;
1256 for (sector = info->sector_count - 1; sector >= 0; sector--) {
1257 if (addr >= info->start[sector])
1263 /*-----------------------------------------------------------------------
1265 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1272 ctladdr.cp = flash_make_addr (info, 0, 0);
1273 cptr.cp = (uchar *) dest;
1276 /* Check if Flash is (sufficiently) erased */
1277 switch (info->portwidth) {
1278 case FLASH_CFI_8BIT:
1279 flag = ((cptr.cp[0] & cword.c) == cword.c);
1281 case FLASH_CFI_16BIT:
1282 flag = ((cptr.wp[0] & cword.w) == cword.w);
1284 case FLASH_CFI_32BIT:
1285 flag = ((cptr.lp[0] & cword.l) == cword.l);
1287 case FLASH_CFI_64BIT:
1288 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
1296 /* Disable interrupts which might cause a timeout here */
1297 flag = disable_interrupts ();
1299 switch (info->vendor) {
1300 case CFI_CMDSET_INTEL_EXTENDED:
1301 case CFI_CMDSET_INTEL_STANDARD:
1302 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1303 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1305 case CFI_CMDSET_AMD_EXTENDED:
1306 case CFI_CMDSET_AMD_STANDARD:
1307 flash_unlock_seq (info, 0);
1308 flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
1312 switch (info->portwidth) {
1313 case FLASH_CFI_8BIT:
1314 cptr.cp[0] = cword.c;
1316 case FLASH_CFI_16BIT:
1317 cptr.wp[0] = cword.w;
1319 case FLASH_CFI_32BIT:
1320 cptr.lp[0] = cword.l;
1322 case FLASH_CFI_64BIT:
1323 cptr.llp[0] = cword.ll;
1327 /* re-enable interrupts if necessary */
1329 enable_interrupts ();
1331 return flash_full_status_check (info, find_sector (info, dest),
1332 info->write_tout, "write");
1335 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1337 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1340 flash_sect_t sector;
1343 volatile cfiptr_t src;
1344 volatile cfiptr_t dst;
1346 switch (info->vendor) {
1347 case CFI_CMDSET_INTEL_STANDARD:
1348 case CFI_CMDSET_INTEL_EXTENDED:
1350 dst.cp = (uchar *) dest;
1351 sector = find_sector (info, dest);
1352 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1353 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1354 if ((retcode = flash_status_check (info, sector, info->buffer_write_tout,
1355 "write to buffer")) == ERR_OK) {
1356 /* reduce the number of loops by the width of the port */
1357 switch (info->portwidth) {
1358 case FLASH_CFI_8BIT:
1361 case FLASH_CFI_16BIT:
1364 case FLASH_CFI_32BIT:
1367 case FLASH_CFI_64BIT:
1374 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1376 switch (info->portwidth) {
1377 case FLASH_CFI_8BIT:
1378 *dst.cp++ = *src.cp++;
1380 case FLASH_CFI_16BIT:
1381 *dst.wp++ = *src.wp++;
1383 case FLASH_CFI_32BIT:
1384 *dst.lp++ = *src.lp++;
1386 case FLASH_CFI_64BIT:
1387 *dst.llp++ = *src.llp++;
1394 flash_write_cmd (info, sector, 0,
1395 FLASH_CMD_WRITE_BUFFER_CONFIRM);
1396 retcode = flash_full_status_check (info, sector,
1397 info->buffer_write_tout,
1402 case CFI_CMDSET_AMD_STANDARD:
1403 case CFI_CMDSET_AMD_EXTENDED:
1405 dst.cp = (uchar *) dest;
1406 sector = find_sector (info, dest);
1408 flash_unlock_seq(info,0);
1409 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_TO_BUFFER);
1411 switch (info->portwidth) {
1412 case FLASH_CFI_8BIT:
1414 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1415 while (cnt-- > 0) *dst.cp++ = *src.cp++;
1417 case FLASH_CFI_16BIT:
1419 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1420 while (cnt-- > 0) *dst.wp++ = *src.wp++;
1422 case FLASH_CFI_32BIT:
1424 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1425 while (cnt-- > 0) *dst.lp++ = *src.lp++;
1427 case FLASH_CFI_64BIT:
1429 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1430 while (cnt-- > 0) *dst.llp++ = *src.llp++;
1436 flash_write_cmd (info, sector, 0, AMD_CMD_WRITE_BUFFER_CONFIRM);
1437 retcode = flash_full_status_check (info, sector, info->buffer_write_tout,
1442 debug ("Unknown Command Set\n");
1446 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1447 #endif /* CFG_FLASH_CFI */