2 * (C) Copyright 2002-2004
3 * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
5 * Copyright (C) 2003 Arabella Software Ltd.
6 * Yuli Barcohen <yuli@arabellasw.com>
7 * Modified to work with AMD flashes
11 * Modified to work with little-endian systems.
13 * See file CREDITS for list of people who contributed to this
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License as
18 * published by the Free Software Foundation; either version 2 of
19 * the License, or (at your option) any later version.
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
26 * You should have received a copy of the GNU General Public License
27 * along with this program; if not, write to the Free Software
28 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
32 * 01/20/2004 - combined variants of original driver.
33 * 01/22/2004 - Write performance enhancements for parallel chips (Tolunay)
34 * 01/23/2004 - Support for x8/x16 chips (Rune Raknerud)
35 * 01/27/2004 - Little endian support Ed Okerson
37 * Tested Architectures
38 * Port Width Chip Width # of banks Flash Chip Board
39 * 32 16 1 28F128J3 seranoa/eagle
40 * 64 16 1 28F128J3 seranoa/falcon
44 /* The DEBUG define must be before common to enable debugging */
48 #include <asm/processor.h>
49 #include <asm/byteorder.h>
50 #include <environment.h>
51 #ifdef CFG_FLASH_CFI_DRIVER
54 * This file implements a Common Flash Interface (CFI) driver for U-Boot.
55 * The width of the port and the width of the chips are determined at initialization.
56 * These widths are used to calculate the address for access CFI data structures.
57 * It has been tested on an Intel Strataflash implementation and AMD 29F016D.
60 * JEDEC Standard JESD68 - Common Flash Interface (CFI)
61 * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
62 * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
63 * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
67 * Use Primary Extended Query table (PRI) and Alternate Algorithm Query
68 * Table (ALT) to determine if protection is available
70 * Add support for other command sets Use the PRI and ALT to determine command set
71 * Verify erase and program timeouts.
74 #ifndef CFG_FLASH_BANKS_LIST
75 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
78 #define FLASH_CMD_CFI 0x98
79 #define FLASH_CMD_READ_ID 0x90
80 #define FLASH_CMD_RESET 0xff
81 #define FLASH_CMD_BLOCK_ERASE 0x20
82 #define FLASH_CMD_ERASE_CONFIRM 0xD0
83 #define FLASH_CMD_WRITE 0x40
84 #define FLASH_CMD_PROTECT 0x60
85 #define FLASH_CMD_PROTECT_SET 0x01
86 #define FLASH_CMD_PROTECT_CLEAR 0xD0
87 #define FLASH_CMD_CLEAR_STATUS 0x50
88 #define FLASH_CMD_WRITE_TO_BUFFER 0xE8
89 #define FLASH_CMD_WRITE_BUFFER_CONFIRM 0xD0
91 #define FLASH_STATUS_DONE 0x80
92 #define FLASH_STATUS_ESS 0x40
93 #define FLASH_STATUS_ECLBS 0x20
94 #define FLASH_STATUS_PSLBS 0x10
95 #define FLASH_STATUS_VPENS 0x08
96 #define FLASH_STATUS_PSS 0x04
97 #define FLASH_STATUS_DPS 0x02
98 #define FLASH_STATUS_R 0x01
99 #define FLASH_STATUS_PROTECT 0x01
101 #define AMD_CMD_RESET 0xF0
102 #define AMD_CMD_WRITE 0xA0
103 #define AMD_CMD_ERASE_START 0x80
104 #define AMD_CMD_ERASE_SECTOR 0x30
105 #define AMD_CMD_UNLOCK_START 0xAA
106 #define AMD_CMD_UNLOCK_ACK 0x55
108 #define AMD_STATUS_TOGGLE 0x40
109 #define AMD_STATUS_ERROR 0x20
110 #define AMD_ADDR_ERASE_START 0x555
111 #define AMD_ADDR_START 0x555
112 #define AMD_ADDR_ACK 0x2AA
114 #define FLASH_OFFSET_CFI 0x55
115 #define FLASH_OFFSET_CFI_RESP 0x10
116 #define FLASH_OFFSET_PRIMARY_VENDOR 0x13
117 #define FLASH_OFFSET_WTOUT 0x1F
118 #define FLASH_OFFSET_WBTOUT 0x20
119 #define FLASH_OFFSET_ETOUT 0x21
120 #define FLASH_OFFSET_CETOUT 0x22
121 #define FLASH_OFFSET_WMAX_TOUT 0x23
122 #define FLASH_OFFSET_WBMAX_TOUT 0x24
123 #define FLASH_OFFSET_EMAX_TOUT 0x25
124 #define FLASH_OFFSET_CEMAX_TOUT 0x26
125 #define FLASH_OFFSET_SIZE 0x27
126 #define FLASH_OFFSET_INTERFACE 0x28
127 #define FLASH_OFFSET_BUFFER_SIZE 0x2A
128 #define FLASH_OFFSET_NUM_ERASE_REGIONS 0x2C
129 #define FLASH_OFFSET_ERASE_REGIONS 0x2D
130 #define FLASH_OFFSET_PROTECT 0x02
131 #define FLASH_OFFSET_USER_PROTECTION 0x85
132 #define FLASH_OFFSET_INTEL_PROTECTION 0x81
135 #define FLASH_MAN_CFI 0x01000000
137 #define CFI_CMDSET_NONE 0
138 #define CFI_CMDSET_INTEL_EXTENDED 1
139 #define CFI_CMDSET_AMD_STANDARD 2
140 #define CFI_CMDSET_INTEL_STANDARD 3
141 #define CFI_CMDSET_AMD_EXTENDED 4
142 #define CFI_CMDSET_MITSU_STANDARD 256
143 #define CFI_CMDSET_MITSU_EXTENDED 257
144 #define CFI_CMDSET_SST 258
147 #ifdef CFG_FLASH_CFI_AMD_RESET /* needed for STM_ID_29W320DB on UC100 */
148 # undef FLASH_CMD_RESET
149 # define FLASH_CMD_RESET AMD_CMD_RESET /* use AMD-Reset instead */
157 unsigned long long ll;
161 volatile unsigned char *cp;
162 volatile unsigned short *wp;
163 volatile unsigned long *lp;
164 volatile unsigned long long *llp;
167 #define NUM_ERASE_REGIONS 4
169 /* use CFG_MAX_FLASH_BANKS_DETECT if defined */
170 #ifdef CFG_MAX_FLASH_BANKS_DETECT
171 static ulong bank_base[CFG_MAX_FLASH_BANKS_DETECT] = CFG_FLASH_BANKS_LIST;
172 flash_info_t flash_info[CFG_MAX_FLASH_BANKS_DETECT]; /* FLASH chips info */
174 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
175 flash_info_t flash_info[CFG_MAX_FLASH_BANKS]; /* FLASH chips info */
179 /*-----------------------------------------------------------------------
183 typedef unsigned long flash_sect_t;
185 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
186 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
187 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
188 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
189 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
190 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
191 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd);
192 static int flash_detect_cfi (flash_info_t * info);
193 ulong flash_get_size (ulong base, int banknum);
194 static int flash_write_cfiword (flash_info_t * info, ulong dest, cfiword_t cword);
195 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
196 ulong tout, char *prompt);
197 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
198 static flash_info_t *flash_get_info(ulong base);
200 #ifdef CFG_FLASH_USE_BUFFER_WRITE
201 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp, int len);
204 /*-----------------------------------------------------------------------
205 * create an address based on the offset and the port width
207 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect, uint offset)
209 return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
213 /*-----------------------------------------------------------------------
216 void print_longlong (char *str, unsigned long long data)
221 cp = (unsigned char *) &data;
222 for (i = 0; i < 8; i++)
223 sprintf (&str[i * 2], "%2.2x", *cp++);
225 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
230 for (x = 0; x < 0x40; x += 16U / info->portwidth) {
232 flash_make_addr (info, sect,
233 x + FLASH_OFFSET_CFI_RESP);
234 debug ("%p : ", cptr.cp);
235 for (y = 0; y < 16; y++) {
236 debug ("%2.2x ", cptr.cp[y]);
239 for (y = 0; y < 16; y++) {
240 if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
241 debug ("%c", cptr.cp[y]);
252 /*-----------------------------------------------------------------------
253 * read a character at a port width address
255 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
259 cp = flash_make_addr (info, 0, offset);
260 #if defined(__LITTLE_ENDIAN)
263 return (cp[info->portwidth - 1]);
267 /*-----------------------------------------------------------------------
268 * read a short word by swapping for ppc format.
270 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
278 addr = flash_make_addr (info, sect, offset);
281 debug ("ushort addr is at %p info->portwidth = %d\n", addr,
283 for (x = 0; x < 2 * info->portwidth; x++) {
284 debug ("addr[%x] = 0x%x\n", x, addr[x]);
287 #if defined(__LITTLE_ENDIAN)
288 retval = ((addr[(info->portwidth)] << 8) | addr[0]);
290 retval = ((addr[(2 * info->portwidth) - 1] << 8) |
291 addr[info->portwidth - 1]);
294 debug ("retval = 0x%x\n", retval);
298 /*-----------------------------------------------------------------------
299 * read a long word by picking the least significant byte of each maiximum
300 * port size word. Swap for ppc format.
302 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
310 addr = flash_make_addr (info, sect, offset);
313 debug ("long addr is at %p info->portwidth = %d\n", addr,
315 for (x = 0; x < 4 * info->portwidth; x++) {
316 debug ("addr[%x] = 0x%x\n", x, addr[x]);
319 #if defined(__LITTLE_ENDIAN)
320 retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
321 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)] << 8);
323 retval = (addr[(2 * info->portwidth) - 1] << 24) |
324 (addr[(info->portwidth) - 1] << 16) |
325 (addr[(4 * info->portwidth) - 1] << 8) |
326 addr[(3 * info->portwidth) - 1];
331 /*-----------------------------------------------------------------------
333 unsigned long flash_init (void)
335 unsigned long size = 0;
338 /* Init: no FLASHes known */
339 for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
340 flash_info[i].flash_id = FLASH_UNKNOWN;
341 size += flash_info[i].size = flash_get_size (bank_base[i], i);
342 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
343 printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n",
344 i, flash_info[i].size, flash_info[i].size << 20);
348 /* Monitor protection ON by default */
349 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
350 flash_protect (FLAG_PROTECT_SET,
352 CFG_MONITOR_BASE + monitor_flash_len - 1,
353 flash_get_info(CFG_MONITOR_BASE));
356 /* Environment protection ON by default */
357 #ifdef CFG_ENV_IS_IN_FLASH
358 flash_protect (FLAG_PROTECT_SET,
360 CFG_ENV_ADDR + CFG_ENV_SECT_SIZE - 1,
361 flash_get_info(CFG_ENV_ADDR));
364 /* Redundant environment protection ON by default */
365 #ifdef CFG_ENV_ADDR_REDUND
366 flash_protect (FLAG_PROTECT_SET,
368 CFG_ENV_ADDR_REDUND + CFG_ENV_SIZE_REDUND - 1,
369 flash_get_info(CFG_ENV_ADDR_REDUND));
374 /*-----------------------------------------------------------------------
376 #if defined(CFG_ENV_IS_IN_FLASH) || defined(CFG_ENV_ADDR_REDUND) || (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
377 static flash_info_t *flash_get_info(ulong base)
380 flash_info_t * info = 0;
382 for (i = 0; i < CFG_MAX_FLASH_BANKS; i ++) {
383 info = & flash_info[i];
384 if (info->size && info->start[0] <= base &&
385 base <= info->start[0] + info->size - 1)
389 return i == CFG_MAX_FLASH_BANKS ? 0 : info;
393 /*-----------------------------------------------------------------------
395 int flash_erase (flash_info_t * info, int s_first, int s_last)
401 if (info->flash_id != FLASH_MAN_CFI) {
402 puts ("Can't erase unknown flash type - aborted\n");
405 if ((s_first < 0) || (s_first > s_last)) {
406 puts ("- no sectors to erase\n");
411 for (sect = s_first; sect <= s_last; ++sect) {
412 if (info->protect[sect]) {
417 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
423 for (sect = s_first; sect <= s_last; sect++) {
424 if (info->protect[sect] == 0) { /* not protected */
425 switch (info->vendor) {
426 case CFI_CMDSET_INTEL_STANDARD:
427 case CFI_CMDSET_INTEL_EXTENDED:
428 flash_write_cmd (info, sect, 0, FLASH_CMD_CLEAR_STATUS);
429 flash_write_cmd (info, sect, 0, FLASH_CMD_BLOCK_ERASE);
430 flash_write_cmd (info, sect, 0, FLASH_CMD_ERASE_CONFIRM);
432 case CFI_CMDSET_AMD_STANDARD:
433 case CFI_CMDSET_AMD_EXTENDED:
434 flash_unlock_seq (info, sect);
435 flash_write_cmd (info, sect, AMD_ADDR_ERASE_START,
436 AMD_CMD_ERASE_START);
437 flash_unlock_seq (info, sect);
438 flash_write_cmd (info, sect, 0, AMD_CMD_ERASE_SECTOR);
441 debug ("Unkown flash vendor %d\n",
446 if (flash_full_status_check
447 (info, sect, info->erase_blk_tout, "erase")) {
457 /*-----------------------------------------------------------------------
459 void flash_print_info (flash_info_t * info)
463 if (info->flash_id != FLASH_MAN_CFI) {
464 puts ("missing or unknown FLASH type\n");
468 printf ("CFI conformant FLASH (%d x %d)",
469 (info->portwidth << 3), (info->chipwidth << 3));
470 printf (" Size: %ld MB in %d Sectors\n",
471 info->size >> 20, info->sector_count);
472 printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n",
473 info->erase_blk_tout,
475 info->buffer_write_tout,
478 puts (" Sector Start Addresses:");
479 for (i = 0; i < info->sector_count; ++i) {
480 #ifdef CFG_FLASH_EMPTY_INFO
484 volatile unsigned long *flash;
487 * Check if whole sector is erased
489 if (i != (info->sector_count - 1))
490 size = info->start[i + 1] - info->start[i];
492 size = info->start[0] + info->size - info->start[i];
494 flash = (volatile unsigned long *) info->start[i];
495 size = size >> 2; /* divide by 4 for longword access */
496 for (k = 0; k < size; k++) {
497 if (*flash++ != 0xffffffff) {
505 /* print empty and read-only info */
506 printf (" %08lX%s%s",
509 info->protect[i] ? "RO " : " ");
510 #else /* ! CFG_FLASH_EMPTY_INFO */
514 info->start[i], info->protect[i] ? " (RO)" : " ");
521 /*-----------------------------------------------------------------------
522 * Copy memory to flash, returns:
525 * 2 - Flash not erased
527 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
535 #ifdef CFG_FLASH_USE_BUFFER_WRITE
538 /* get lower aligned address */
539 /* get lower aligned address */
540 wp = (addr & ~(info->portwidth - 1));
542 /* handle unaligned start */
543 if ((aln = addr - wp) != 0) {
546 for (i = 0; i < aln; ++i, ++cp)
547 flash_add_byte (info, &cword, (*(uchar *) cp));
549 for (; (i < info->portwidth) && (cnt > 0); i++) {
550 flash_add_byte (info, &cword, *src++);
554 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
555 flash_add_byte (info, &cword, (*(uchar *) cp));
556 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
561 /* handle the aligned part */
562 #ifdef CFG_FLASH_USE_BUFFER_WRITE
563 buffered_size = (info->portwidth / info->chipwidth);
564 buffered_size *= info->buffer_size;
565 while (cnt >= info->portwidth) {
566 i = buffered_size > cnt ? cnt : buffered_size;
567 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
569 i -= i & (info->portwidth - 1);
575 while (cnt >= info->portwidth) {
577 for (i = 0; i < info->portwidth; i++) {
578 flash_add_byte (info, &cword, *src++);
580 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
582 wp += info->portwidth;
583 cnt -= info->portwidth;
585 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
591 * handle unaligned tail bytes
594 for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
595 flash_add_byte (info, &cword, *src++);
598 for (; i < info->portwidth; ++i, ++cp) {
599 flash_add_byte (info, &cword, (*(uchar *) cp));
602 return flash_write_cfiword (info, wp, cword);
605 /*-----------------------------------------------------------------------
607 #ifdef CFG_FLASH_PROTECTION
609 int flash_real_protect (flash_info_t * info, long sector, int prot)
613 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
614 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
616 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
618 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
621 flash_full_status_check (info, sector, info->erase_blk_tout,
622 prot ? "protect" : "unprotect")) == 0) {
624 info->protect[sector] = prot;
625 /* Intel's unprotect unprotects all locking */
629 for (i = 0; i < info->sector_count; i++) {
630 if (info->protect[i])
631 flash_real_protect (info, i, 1);
638 /*-----------------------------------------------------------------------
639 * flash_read_user_serial - read the OneTimeProgramming cells
641 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
648 src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
649 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
650 memcpy (dst, src + offset, len);
651 flash_write_cmd (info, 0, 0, info->cmd_reset);
655 * flash_read_factory_serial - read the device Id from the protection area
657 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
662 src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
663 flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
664 memcpy (buffer, src + offset, len);
665 flash_write_cmd (info, 0, 0, info->cmd_reset);
668 #endif /* CFG_FLASH_PROTECTION */
671 * flash_is_busy - check to see if the flash is busy
672 * This routine checks the status of the chip and returns true if the chip is busy
674 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
678 switch (info->vendor) {
679 case CFI_CMDSET_INTEL_STANDARD:
680 case CFI_CMDSET_INTEL_EXTENDED:
681 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
683 case CFI_CMDSET_AMD_STANDARD:
684 case CFI_CMDSET_AMD_EXTENDED:
685 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
690 debug ("flash_is_busy: %d\n", retval);
694 /*-----------------------------------------------------------------------
695 * wait for XSR.7 to be set. Time out with an error if it does not.
696 * This routine does not set the flash to read-array mode.
698 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
699 ulong tout, char *prompt)
703 /* Wait for command completion */
704 start = get_timer (0);
705 while (flash_is_busy (info, sector)) {
706 if (get_timer (start) > info->erase_blk_tout * CFG_HZ) {
707 printf ("Flash %s timeout at address %lx data %lx\n",
708 prompt, info->start[sector],
709 flash_read_long (info, sector, 0));
710 flash_write_cmd (info, sector, 0, info->cmd_reset);
717 /*-----------------------------------------------------------------------
718 * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
719 * This routine sets the flash to read-array mode.
721 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
722 ulong tout, char *prompt)
726 retcode = flash_status_check (info, sector, tout, prompt);
727 switch (info->vendor) {
728 case CFI_CMDSET_INTEL_EXTENDED:
729 case CFI_CMDSET_INTEL_STANDARD:
730 if ((retcode != ERR_OK)
731 && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
733 printf ("Flash %s error at address %lx\n", prompt,
734 info->start[sector]);
735 if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
736 puts ("Command Sequence Error.\n");
737 } else if (flash_isset (info, sector, 0, FLASH_STATUS_ECLBS)) {
738 puts ("Block Erase Error.\n");
739 retcode = ERR_NOT_ERASED;
740 } else if (flash_isset (info, sector, 0, FLASH_STATUS_PSLBS)) {
741 puts ("Locking Error\n");
743 if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
744 puts ("Block locked.\n");
745 retcode = ERR_PROTECTED;
747 if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
748 puts ("Vpp Low Error.\n");
750 flash_write_cmd (info, sector, 0, info->cmd_reset);
758 /*-----------------------------------------------------------------------
760 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
762 #if defined(__LITTLE_ENDIAN)
765 unsigned long long ll;
768 switch (info->portwidth) {
772 case FLASH_CFI_16BIT:
773 #if defined(__LITTLE_ENDIAN)
776 cword->w = (cword->w >> 8) | w;
778 cword->w = (cword->w << 8) | c;
781 case FLASH_CFI_32BIT:
782 #if defined(__LITTLE_ENDIAN)
785 cword->l = (cword->l >> 8) | l;
787 cword->l = (cword->l << 8) | c;
790 case FLASH_CFI_64BIT:
791 #if defined(__LITTLE_ENDIAN)
794 cword->ll = (cword->ll >> 8) | ll;
796 cword->ll = (cword->ll << 8) | c;
803 /*-----------------------------------------------------------------------
804 * make a proper sized command based on the port and chip widths
806 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
809 uchar *cp = (uchar *) cmdbuf;
811 #if defined(__LITTLE_ENDIAN)
812 for (i = info->portwidth; i > 0; i--)
814 for (i = 1; i <= info->portwidth; i++)
816 *cp++ = (i & (info->chipwidth - 1)) ? '\0' : cmd;
820 * Write a proper sized command to the correct address
822 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
825 volatile cfiptr_t addr;
828 addr.cp = flash_make_addr (info, sect, offset);
829 flash_make_cmd (info, cmd, &cword);
830 switch (info->portwidth) {
832 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
833 cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
836 case FLASH_CFI_16BIT:
837 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
839 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
842 case FLASH_CFI_32BIT:
843 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
845 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
848 case FLASH_CFI_64BIT:
853 print_longlong (str, cword.ll);
855 debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
857 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
860 *addr.llp = cword.ll;
865 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
867 flash_write_cmd (info, sect, AMD_ADDR_START, AMD_CMD_UNLOCK_START);
868 flash_write_cmd (info, sect, AMD_ADDR_ACK, AMD_CMD_UNLOCK_ACK);
871 /*-----------------------------------------------------------------------
873 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
879 cptr.cp = flash_make_addr (info, sect, offset);
880 flash_make_cmd (info, cmd, &cword);
882 debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
883 switch (info->portwidth) {
885 debug ("is= %x %x\n", cptr.cp[0], cword.c);
886 retval = (cptr.cp[0] == cword.c);
888 case FLASH_CFI_16BIT:
889 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
890 retval = (cptr.wp[0] == cword.w);
892 case FLASH_CFI_32BIT:
893 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
894 retval = (cptr.lp[0] == cword.l);
896 case FLASH_CFI_64BIT:
902 print_longlong (str1, cptr.llp[0]);
903 print_longlong (str2, cword.ll);
904 debug ("is= %s %s\n", str1, str2);
907 retval = (cptr.llp[0] == cword.ll);
916 /*-----------------------------------------------------------------------
918 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
924 cptr.cp = flash_make_addr (info, sect, offset);
925 flash_make_cmd (info, cmd, &cword);
926 switch (info->portwidth) {
928 retval = ((cptr.cp[0] & cword.c) == cword.c);
930 case FLASH_CFI_16BIT:
931 retval = ((cptr.wp[0] & cword.w) == cword.w);
933 case FLASH_CFI_32BIT:
934 retval = ((cptr.lp[0] & cword.l) == cword.l);
936 case FLASH_CFI_64BIT:
937 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
946 /*-----------------------------------------------------------------------
948 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset, uchar cmd)
954 cptr.cp = flash_make_addr (info, sect, offset);
955 flash_make_cmd (info, cmd, &cword);
956 switch (info->portwidth) {
958 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
960 case FLASH_CFI_16BIT:
961 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
963 case FLASH_CFI_32BIT:
964 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
966 case FLASH_CFI_64BIT:
967 retval = ((cptr.llp[0] & cword.ll) !=
968 (cptr.llp[0] & cword.ll));
977 /*-----------------------------------------------------------------------
978 * detect if flash is compatible with the Common Flash Interface (CFI)
979 * http://www.jedec.org/download/search/jesd68.pdf
982 static int flash_detect_cfi (flash_info_t * info)
984 debug ("flash detect cfi\n");
986 for (info->portwidth = FLASH_CFI_8BIT;
987 info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
988 for (info->chipwidth = FLASH_CFI_BY8;
989 info->chipwidth <= info->portwidth;
990 info->chipwidth <<= 1) {
991 flash_write_cmd (info, 0, 0, info->cmd_reset);
992 flash_write_cmd (info, 0, FLASH_OFFSET_CFI, FLASH_CMD_CFI);
993 if (flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
994 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 1, 'R')
995 && flash_isequal (info, 0, FLASH_OFFSET_CFI_RESP + 2, 'Y')) {
996 info->interface = flash_read_ushort (info, 0, FLASH_OFFSET_INTERFACE);
997 debug ("device interface is %d\n",
999 debug ("found port %d chip %d ",
1000 info->portwidth, info->chipwidth);
1001 debug ("port %d bits chip %d bits\n",
1002 info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1003 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1008 debug ("not found\n");
1013 * The following code cannot be run from FLASH!
1016 ulong flash_get_size (ulong base, int banknum)
1018 flash_info_t *info = &flash_info[banknum];
1020 flash_sect_t sect_cnt;
1021 unsigned long sector;
1024 uchar num_erase_regions;
1025 int erase_region_size;
1026 int erase_region_count;
1028 info->start[0] = base;
1030 if (flash_detect_cfi (info)) {
1031 info->vendor = flash_read_ushort (info, 0, FLASH_OFFSET_PRIMARY_VENDOR);
1033 flash_printqry (info, 0);
1035 switch (info->vendor) {
1036 case CFI_CMDSET_INTEL_STANDARD:
1037 case CFI_CMDSET_INTEL_EXTENDED:
1039 info->cmd_reset = FLASH_CMD_RESET;
1041 case CFI_CMDSET_AMD_STANDARD:
1042 case CFI_CMDSET_AMD_EXTENDED:
1043 info->cmd_reset = AMD_CMD_RESET;
1047 debug ("manufacturer is %d\n", info->vendor);
1048 size_ratio = info->portwidth / info->chipwidth;
1049 /* if the chip is x8/x16 reduce the ratio by half */
1050 if ((info->interface == FLASH_CFI_X8X16)
1051 && (info->chipwidth == FLASH_CFI_BY8)) {
1054 num_erase_regions = flash_read_uchar (info, FLASH_OFFSET_NUM_ERASE_REGIONS);
1055 debug ("size_ratio %d port %d bits chip %d bits\n",
1056 size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1057 info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1058 debug ("found %d erase regions\n", num_erase_regions);
1061 for (i = 0; i < num_erase_regions; i++) {
1062 if (i > NUM_ERASE_REGIONS) {
1063 printf ("%d erase regions found, only %d used\n",
1064 num_erase_regions, NUM_ERASE_REGIONS);
1067 tmp = flash_read_long (info, 0,
1068 FLASH_OFFSET_ERASE_REGIONS +
1071 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1073 erase_region_count = (tmp & 0xffff) + 1;
1074 debug ("erase_region_count = %d erase_region_size = %d\n",
1075 erase_region_count, erase_region_size);
1076 for (j = 0; j < erase_region_count; j++) {
1077 info->start[sect_cnt] = sector;
1078 sector += (erase_region_size * size_ratio);
1081 * Only read protection status from supported devices (intel...)
1083 switch (info->vendor) {
1084 case CFI_CMDSET_INTEL_EXTENDED:
1085 case CFI_CMDSET_INTEL_STANDARD:
1086 info->protect[sect_cnt] =
1087 flash_isset (info, sect_cnt,
1088 FLASH_OFFSET_PROTECT,
1089 FLASH_STATUS_PROTECT);
1092 info->protect[sect_cnt] = 0; /* default: not protected */
1099 info->sector_count = sect_cnt;
1100 /* multiply the size by the number of chips */
1101 info->size = (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) * size_ratio;
1102 info->buffer_size = (1 << flash_read_ushort (info, 0, FLASH_OFFSET_BUFFER_SIZE));
1103 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1104 info->erase_blk_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
1105 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT);
1106 info->buffer_write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)));
1107 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT);
1108 info->write_tout = (tmp * (1 << flash_read_uchar (info, FLASH_OFFSET_WMAX_TOUT))) / 1000;
1109 info->flash_id = FLASH_MAN_CFI;
1110 if ((info->interface == FLASH_CFI_X8X16) && (info->chipwidth == FLASH_CFI_BY8)) {
1111 info->portwidth >>= 1; /* XXX - Need to test on x8/x16 in parallel. */
1115 flash_write_cmd (info, 0, 0, info->cmd_reset);
1116 return (info->size);
1120 /*-----------------------------------------------------------------------
1122 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1130 ctladdr.cp = flash_make_addr (info, 0, 0);
1131 cptr.cp = (uchar *) dest;
1134 /* Check if Flash is (sufficiently) erased */
1135 switch (info->portwidth) {
1136 case FLASH_CFI_8BIT:
1137 flag = ((cptr.cp[0] & cword.c) == cword.c);
1139 case FLASH_CFI_16BIT:
1140 flag = ((cptr.wp[0] & cword.w) == cword.w);
1142 case FLASH_CFI_32BIT:
1143 flag = ((cptr.lp[0] & cword.l) == cword.l);
1145 case FLASH_CFI_64BIT:
1146 flag = ((cptr.llp[0] & cword.ll) == cword.ll);
1154 /* Disable interrupts which might cause a timeout here */
1155 flag = disable_interrupts ();
1157 switch (info->vendor) {
1158 case CFI_CMDSET_INTEL_EXTENDED:
1159 case CFI_CMDSET_INTEL_STANDARD:
1160 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1161 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1163 case CFI_CMDSET_AMD_EXTENDED:
1164 case CFI_CMDSET_AMD_STANDARD:
1165 flash_unlock_seq (info, 0);
1166 flash_write_cmd (info, 0, AMD_ADDR_START, AMD_CMD_WRITE);
1170 switch (info->portwidth) {
1171 case FLASH_CFI_8BIT:
1172 cptr.cp[0] = cword.c;
1174 case FLASH_CFI_16BIT:
1175 cptr.wp[0] = cword.w;
1177 case FLASH_CFI_32BIT:
1178 cptr.lp[0] = cword.l;
1180 case FLASH_CFI_64BIT:
1181 cptr.llp[0] = cword.ll;
1185 /* re-enable interrupts if necessary */
1187 enable_interrupts ();
1189 return flash_full_status_check (info, 0, info->write_tout, "write");
1192 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1194 /* loop through the sectors from the highest address
1195 * when the passed address is greater or equal to the sector address
1198 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1200 flash_sect_t sector;
1202 for (sector = info->sector_count - 1; sector >= 0; sector--) {
1203 if (addr >= info->start[sector])
1209 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1212 flash_sect_t sector;
1215 volatile cfiptr_t src;
1216 volatile cfiptr_t dst;
1217 /* buffered writes in the AMD chip set is not supported yet */
1218 if((info->vendor == CFI_CMDSET_AMD_STANDARD) ||
1219 (info->vendor == CFI_CMDSET_AMD_EXTENDED))
1223 dst.cp = (uchar *) dest;
1224 sector = find_sector (info, dest);
1225 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1226 flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1228 flash_status_check (info, sector, info->buffer_write_tout,
1229 "write to buffer")) == ERR_OK) {
1230 /* reduce the number of loops by the width of the port */
1231 switch (info->portwidth) {
1232 case FLASH_CFI_8BIT:
1235 case FLASH_CFI_16BIT:
1238 case FLASH_CFI_32BIT:
1241 case FLASH_CFI_64BIT:
1248 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1250 switch (info->portwidth) {
1251 case FLASH_CFI_8BIT:
1252 *dst.cp++ = *src.cp++;
1254 case FLASH_CFI_16BIT:
1255 *dst.wp++ = *src.wp++;
1257 case FLASH_CFI_32BIT:
1258 *dst.lp++ = *src.lp++;
1260 case FLASH_CFI_64BIT:
1261 *dst.llp++ = *src.llp++;
1268 flash_write_cmd (info, sector, 0,
1269 FLASH_CMD_WRITE_BUFFER_CONFIRM);
1271 flash_full_status_check (info, sector,
1272 info->buffer_write_tout,
1275 flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1278 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
1279 #endif /* CFG_FLASH_CFI */