drivers/cfi_flash.c

   1 /*
   2  * (C) Copyright 2002-2004
   3  * Brad Kemp, Seranoa Networks, Brad.Kemp@seranoa.com
   4  *
   5  * Copyright (C) 2003 Arabella Software Ltd.
   6  * Yuli Barcohen <yuli@arabellasw.com>
   7  * Modified to work with AMD flashes
   8  *
   9  * Copyright (C) 2004
  10  * Ed Okerson
  11  * Modified to work with little-endian systems.
  12  *
  13  * See file CREDITS for list of people who contributed to this
  14  * project.
  15  *
  16  * This program is free software; you can redistribute it and/or
  17  * modify it under the terms of the GNU General Public License as
  18  * published by the Free Software Foundation; either version 2 of
  19  * the License, or (at your option) any later version.
  20  *
  21  * This program is distributed in the hope that it will be useful,
  22  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  23  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  24  * GNU General Public License for more details.
  25  *
  26  * You should have received a copy of the GNU General Public License
  27  * along with this program; if not, write to the Free Software
  28  * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
  29  * MA 02111-1307 USA
  30  *
  31  * History
  32  * 01/20/2004 - combined variants of original driver.
  33  * 01/22/2004 - Write performance enhancements for parallel chips (Tolunay)
  34  * 01/23/2004 - Support for x8/x16 chips (Rune Raknerud)
  35  * 01/27/2004 - Little endian support Ed Okerson
  36  *
  37  * Tested Architectures
  38  * Port Width  Chip Width    # of banks    Flash Chip  Board
  39  * 32          16            1             28F128J3    seranoa/eagle
  40  * 64          16            1             28F128J3    seranoa/falcon
  41  *
  42  */
  43
  44 /* The DEBUG define must be before common to enable debugging */
  45 /* #define DEBUG        */
  46
  47 #include <common.h>
  48 #include <asm/processor.h>
  49 #ifdef  CFG_FLASH_CFI_DRIVER
  50 /*
  51  * This file implements a Common Flash Interface (CFI) driver for U-Boot.
  52  * The width of the port and the width of the chips are determined at initialization.
  53  * These widths are used to calculate the address for access CFI data structures.
  54  * It has been tested on an Intel Strataflash implementation and AMD 29F016D.
  55  *
  56  * References
  57  * JEDEC Standard JESD68 - Common Flash Interface (CFI)
  58  * JEDEC Standard JEP137-A Common Flash Interface (CFI) ID Codes
  59  * Intel Application Note 646 Common Flash Interface (CFI) and Command Sets
  60  * Intel 290667-008 3 Volt Intel StrataFlash Memory datasheet
  61  *
  62  * TODO
  63  *
  64  * Use Primary Extended Query table (PRI) and Alternate Algorithm Query
  65  * Table (ALT) to determine if protection is available
  66  *
  67  * Add support for other command sets Use the PRI and ALT to determine command set
  68  * Verify erase and program timeouts.
  69  */
  70
  71 #ifndef CFG_FLASH_BANKS_LIST
  72 #define CFG_FLASH_BANKS_LIST { CFG_FLASH_BASE }
  73 #endif
  74
  75 #define FLASH_CMD_CFI                   0x98
  76 #define FLASH_CMD_READ_ID               0x90
  77 #define FLASH_CMD_RESET                 0xff
  78 #define FLASH_CMD_BLOCK_ERASE           0x20
  79 #define FLASH_CMD_ERASE_CONFIRM         0xD0
  80 #define FLASH_CMD_WRITE                 0x40
  81 #define FLASH_CMD_PROTECT               0x60
  82 #define FLASH_CMD_PROTECT_SET           0x01
  83 #define FLASH_CMD_PROTECT_CLEAR         0xD0
  84 #define FLASH_CMD_CLEAR_STATUS          0x50
  85 #define FLASH_CMD_WRITE_TO_BUFFER       0xE8
  86 #define FLASH_CMD_WRITE_BUFFER_CONFIRM  0xD0
  87
  88 #define FLASH_STATUS_DONE               0x80
  89 #define FLASH_STATUS_ESS                0x40
  90 #define FLASH_STATUS_ECLBS              0x20
  91 #define FLASH_STATUS_PSLBS              0x10
  92 #define FLASH_STATUS_VPENS              0x08
  93 #define FLASH_STATUS_PSS                0x04
  94 #define FLASH_STATUS_DPS                0x02
  95 #define FLASH_STATUS_R                  0x01
  96 #define FLASH_STATUS_PROTECT            0x01
  97
  98 #define AMD_CMD_RESET                   0xF0
  99 #define AMD_CMD_WRITE                   0xA0
 100 #define AMD_CMD_ERASE_START             0x80
 101 #define AMD_CMD_ERASE_SECTOR            0x30
 102
 103 #define AMD_STATUS_TOGGLE               0x40
 104 #define AMD_STATUS_ERROR                0x20
 105
 106 #define FLASH_OFFSET_CFI                0x55
 107 #define FLASH_OFFSET_CFI_RESP           0x10
 108 #define FLASH_OFFSET_PRIMARY_VENDOR     0x13
 109 #define FLASH_OFFSET_WTOUT              0x1F
 110 #define FLASH_OFFSET_WBTOUT             0x20
 111 #define FLASH_OFFSET_ETOUT              0x21
 112 #define FLASH_OFFSET_CETOUT             0x22
 113 #define FLASH_OFFSET_WMAX_TOUT          0x23
 114 #define FLASH_OFFSET_WBMAX_TOUT         0x24
 115 #define FLASH_OFFSET_EMAX_TOUT          0x25
 116 #define FLASH_OFFSET_CEMAX_TOUT         0x26
 117 #define FLASH_OFFSET_SIZE               0x27
 118 #define FLASH_OFFSET_INTERFACE          0x28
 119 #define FLASH_OFFSET_BUFFER_SIZE        0x2A
 120 #define FLASH_OFFSET_NUM_ERASE_REGIONS  0x2C
 121 #define FLASH_OFFSET_ERASE_REGIONS      0x2D
 122 #define FLASH_OFFSET_PROTECT            0x02
 123 #define FLASH_OFFSET_USER_PROTECTION    0x85
 124 #define FLASH_OFFSET_INTEL_PROTECTION   0x81
 125
 126
 127 #define FLASH_MAN_CFI                   0x01000000
 128
 129 #define CFI_CMDSET_NONE             0
 130 #define CFI_CMDSET_INTEL_EXTENDED   1
 131 #define CFI_CMDSET_AMD_STANDARD     2
 132 #define CFI_CMDSET_INTEL_STANDARD   3
 133 #define CFI_CMDSET_AMD_EXTENDED     4
 134 #define CFI_CMDSET_MITSU_STANDARD   256
 135 #define CFI_CMDSET_MITSU_EXTENDED   257
 136 #define CFI_CMDSET_SST              258
 137
 138
 139 typedef union {
 140         unsigned char c;
 141         unsigned short w;
 142         unsigned long l;
 143         unsigned long long ll;
 144 } cfiword_t;
 145
 146 typedef union {
 147         volatile unsigned char *cp;
 148         volatile unsigned short *wp;
 149         volatile unsigned long *lp;
 150         volatile unsigned long long *llp;
 151 } cfiptr_t;
 152
 153 #define NUM_ERASE_REGIONS 4
 154
 155 static ulong bank_base[CFG_MAX_FLASH_BANKS] = CFG_FLASH_BANKS_LIST;
 156
 157 flash_info_t flash_info[CFG_MAX_FLASH_BANKS];   /* info for FLASH chips   */
 158
 159 /*-----------------------------------------------------------------------
 160  * Functions
 161  */
 162
 163 typedef unsigned long flash_sect_t;
 164
 165 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c);
 166 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf);
 167 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
 168                              uint offset, uchar cmd);
 169 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect);
 170 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset,
 171                           uchar cmd);
 172 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset,
 173                         uchar cmd);
 174 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset,
 175                          uchar cmd);
 176 static int flash_detect_cfi (flash_info_t * info);
 177 static ulong flash_get_size (ulong base, int banknum);
 178 static int flash_write_cfiword (flash_info_t * info, ulong dest,
 179                                 cfiword_t cword);
 180 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 181                                     ulong tout, char *prompt);
 182 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 183 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
 184                                   int len);
 185 #endif
 186
 187 /*-----------------------------------------------------------------------
 188  * create an address based on the offset and the port width
 189  */
 190 inline uchar *flash_make_addr (flash_info_t * info, flash_sect_t sect,
 191                                uint offset)
 192 {
 193         return ((uchar *) (info->start[sect] + (offset * info->portwidth)));
 194 }
 195
 196 #ifdef DEBUG
 197 /*-----------------------------------------------------------------------
 198  * Debug support
 199  */
 200 void print_longlong (char *str, unsigned long long data)
 201 {
 202         int i;
 203         char *cp;
 204
 205         cp = (unsigned char *) &data;
 206         for (i = 0; i < 8; i++)
 207                 sprintf (&str[i * 2], "%2.2x", *cp++);
 208 }
 209 static void flash_printqry (flash_info_t * info, flash_sect_t sect)
 210 {
 211         cfiptr_t cptr;
 212         int x, y;
 213
 214         for (x = 0; x < 0x40; x += 16 / info->portwidth) {
 215                 cptr.cp =
 216                         flash_make_addr (info, sect,
 217                                          x + FLASH_OFFSET_CFI_RESP);
 218                 debug ("%p : ", cptr.cp);
 219                 for (y = 0; y < 16; y++) {
 220                         debug ("%2.2x ", cptr.cp[y]);
 221                 }
 222                 debug (" ");
 223                 for (y = 0; y < 16; y++) {
 224                         if (cptr.cp[y] >= 0x20 && cptr.cp[y] <= 0x7e) {
 225                                 debug ("%c", cptr.cp[y]);
 226                         } else {
 227                                 debug (".");
 228                         }
 229                 }
 230                 debug ("\n");
 231         }
 232 }
 233
 234 #endif
 235
 236
 237 /*-----------------------------------------------------------------------
 238  * read a character at a port width address
 239  */
 240 inline uchar flash_read_uchar (flash_info_t * info, uint offset)
 241 {
 242         uchar *cp;
 243
 244         cp = flash_make_addr (info, 0, offset);
 245 #if defined(__LITTLE_ENDIAN)
 246         return (cp[0]);
 247 #else
 248         return (cp[info->portwidth - 1]);
 249 #endif
 250 }
 251
 252 /*-----------------------------------------------------------------------
 253  * read a short word by swapping for ppc format.
 254  */
 255 ushort flash_read_ushort (flash_info_t * info, flash_sect_t sect, uint offset)
 256 {
 257         uchar *addr;
 258         ushort retval;
 259
 260 #ifdef DEBUG
 261         int x;
 262 #endif
 263         addr = flash_make_addr (info, sect, offset);
 264
 265 #ifdef DEBUG
 266         debug ("ushort addr is at %p info->portwidth = %d\n", addr,
 267                info->portwidth);
 268         for (x = 0; x < 2 * info->portwidth; x++) {
 269                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 270         }
 271 #endif
 272 #if defined(__LITTLE_ENDIAN)
 273         retval = ((addr[(info->portwidth)] << 8) | addr[0]);
 274 #else
 275         retval = ((addr[(2 * info->portwidth) - 1] << 8) |
 276                   addr[info->portwidth - 1]);
 277 #endif
 278
 279         debug ("retval = 0x%x\n", retval);
 280         return retval;
 281 }
 282
 283 /*-----------------------------------------------------------------------
 284  * read a long word by picking the least significant byte of each maiximum
 285  * port size word. Swap for ppc format.
 286  */
 287 ulong flash_read_long (flash_info_t * info, flash_sect_t sect, uint offset)
 288 {
 289
 290         uchar *addr;
 291         ulong retval;
 292
 293 #ifdef DEBUG
 294         int x;
 295 #endif
 296         addr = flash_make_addr (info, sect, offset);
 297
 298 #ifdef DEBUG
 299         debug ("long addr is at %p info->portwidth = %d\n", addr,
 300                info->portwidth);
 301         for (x = 0; x < 4 * info->portwidth; x++) {
 302                 debug ("addr[%x] = 0x%x\n", x, addr[x]);
 303         }
 304 #endif
 305 #if defined(__LITTLE_ENDIAN)
 306         retval = (addr[0] << 16) | (addr[(info->portwidth)] << 24) |
 307                 (addr[(2 * info->portwidth)]) | (addr[(3 * info->portwidth)]
 308                                                  << 8);
 309 #else
 310         retval = (addr[(2 * info->portwidth) - 1] << 24) |
 311                 (addr[(info->portwidth) - 1] << 16) |
 312                 (addr[(4 * info->portwidth) - 1] << 8) |
 313                 addr[(3 * info->portwidth) - 1];
 314 #endif
 315         return retval;
 316 }
 317
 318 /*-----------------------------------------------------------------------
 319  */
 320 unsigned long flash_init (void)
 321 {
 322         unsigned long size = 0;
 323         int i;
 324
 325         /* Init: no FLASHes known */
 326         for (i = 0; i < CFG_MAX_FLASH_BANKS; ++i) {
 327                 flash_info[i].flash_id = FLASH_UNKNOWN;
 328                 size += flash_info[i].size = flash_get_size (bank_base[i], i);
 329                 if (flash_info[i].flash_id == FLASH_UNKNOWN) {
 330                         printf ("## Unknown FLASH on Bank %d - Size = 0x%08lx = %ld MB\n", i, flash_info[i].size, flash_info[i].size << 20);
 331                 }
 332         }
 333
 334         /* Monitor protection ON by default */
 335 #if (CFG_MONITOR_BASE >= CFG_FLASH_BASE)
 336         flash_protect (FLAG_PROTECT_SET,
 337                        CFG_MONITOR_BASE,
 338                        CFG_MONITOR_BASE + CFG_MONITOR_LEN - 1,
 339                        &flash_info[0]);
 340 #endif
 341
 342         return (size);
 343 }
 344
 345 /*-----------------------------------------------------------------------
 346  */
 347 int flash_erase (flash_info_t * info, int s_first, int s_last)
 348 {
 349         int rcode = 0;
 350         int prot;
 351         flash_sect_t sect;
 352
 353         if (info->flash_id != FLASH_MAN_CFI) {
 354                 printf ("Can't erase unknown flash type - aborted\n");
 355                 return 1;
 356         }
 357         if ((s_first < 0) || (s_first > s_last)) {
 358                 printf ("- no sectors to erase\n");
 359                 return 1;
 360         }
 361
 362         prot = 0;
 363         for (sect = s_first; sect <= s_last; ++sect) {
 364                 if (info->protect[sect]) {
 365                         prot++;
 366                 }
 367         }
 368         if (prot) {
 369                 printf ("- Warning: %d protected sectors will not be erased!\n", prot);
 370         } else {
 371                 printf ("\n");
 372         }
 373
 374
 375         for (sect = s_first; sect <= s_last; sect++) {
 376                 if (info->protect[sect] == 0) { /* not protected */
 377                         switch (info->vendor) {
 378                         case CFI_CMDSET_INTEL_STANDARD:
 379                         case CFI_CMDSET_INTEL_EXTENDED:
 380                                 flash_write_cmd (info, sect, 0,
 381                                                  FLASH_CMD_CLEAR_STATUS);
 382                                 flash_write_cmd (info, sect, 0,
 383                                                  FLASH_CMD_BLOCK_ERASE);
 384                                 flash_write_cmd (info, sect, 0,
 385                                                  FLASH_CMD_ERASE_CONFIRM);
 386                                 break;
 387                         case CFI_CMDSET_AMD_STANDARD:
 388                         case CFI_CMDSET_AMD_EXTENDED:
 389                                 flash_unlock_seq (info, sect);
 390                                 flash_write_cmd (info, sect, 0x555,
 391                                                  AMD_CMD_ERASE_START);
 392                                 flash_unlock_seq (info, sect);
 393                                 flash_write_cmd (info, sect, 0,
 394                                                  AMD_CMD_ERASE_SECTOR);
 395                                 break;
 396                         default:
 397                                 debug ("Unkown flash vendor %d\n",
 398                                        info->vendor);
 399                                 break;
 400                         }
 401
 402                         if (flash_full_status_check
 403                             (info, sect, info->erase_blk_tout, "erase")) {
 404                                 rcode = 1;
 405                         } else
 406                                 printf (".");
 407                 }
 408         }
 409         printf (" done\n");
 410         return rcode;
 411 }
 412
 413 /*-----------------------------------------------------------------------
 414  */
 415 void flash_print_info (flash_info_t * info)
 416 {
 417         int i;
 418
 419         if (info->flash_id != FLASH_MAN_CFI) {
 420                 printf ("missing or unknown FLASH type\n");
 421                 return;
 422         }
 423
 424         printf ("CFI conformant FLASH (%d x %d)",
 425                 (info->portwidth << 3), (info->chipwidth << 3));
 426         printf ("  Size: %ld MB in %d Sectors\n",
 427                 info->size >> 20, info->sector_count);
 428         printf (" Erase timeout %ld ms, write timeout %ld ms, buffer write timeout %ld ms, buffer size %d\n", info->erase_blk_tout, info->write_tout, info->buffer_write_tout, info->buffer_size);
 429
 430         printf ("  Sector Start Addresses:");
 431         for (i = 0; i < info->sector_count; ++i) {
 432 #ifdef CFG_FLASH_EMPTY_INFO
 433                 int k;
 434                 int size;
 435                 int erased;
 436                 volatile unsigned long *flash;
 437
 438                 /*
 439                  * Check if whole sector is erased
 440                  */
 441                 if (i != (info->sector_count - 1))
 442                         size = info->start[i + 1] - info->start[i];
 443                 else
 444                         size = info->start[0] + info->size - info->start[i];
 445                 erased = 1;
 446                 flash = (volatile unsigned long *) info->start[i];
 447                 size = size >> 2;       /* divide by 4 for longword access */
 448                 for (k = 0; k < size; k++) {
 449                         if (*flash++ != 0xffffffff) {
 450                                 erased = 0;
 451                                 break;
 452                         }
 453                 }
 454
 455                 if ((i % 5) == 0)
 456                         printf ("\n");
 457                 /* print empty and read-only info */
 458                 printf (" %08lX%s%s",
 459                         info->start[i],
 460                         erased ? " E" : "  ",
 461                         info->protect[i] ? "RO " : "   ");
 462 #else
 463                 if ((i % 5) == 0)
 464                         printf ("\n   ");
 465                 printf (" %08lX%s",
 466                         info->start[i], info->protect[i] ? " (RO)" : "     ");
 467 #endif
 468         }
 469         printf ("\n");
 470         return;
 471 }
 472
 473 /*-----------------------------------------------------------------------
 474  * Copy memory to flash, returns:
 475  * 0 - OK
 476  * 1 - write timeout
 477  * 2 - Flash not erased
 478  */
 479 int write_buff (flash_info_t * info, uchar * src, ulong addr, ulong cnt)
 480 {
 481         ulong wp;
 482         ulong cp;
 483         int aln;
 484         cfiword_t cword;
 485         int i, rc;
 486
 487 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 488         int buffered_size;
 489 #endif
 490         int x8mode = 0;
 491
 492         /* special handling of 16 bit devices in 8 bit mode */
 493         if ((info->interface == FLASH_CFI_X8X16)
 494             && (info->chipwidth == FLASH_CFI_BY8)) {
 495                 switch (info->vendor) {
 496                 case CFI_CMDSET_INTEL_STANDARD:
 497                 case CFI_CMDSET_INTEL_EXTENDED:
 498                         x8mode = info->portwidth;
 499                         info->portwidth >>= 1;  /* XXX - Need to test on x9/x16 in parallel. */
 500                         /*info->portwidth = FLASH_CFI_8BIT; */ /* XXX - Need to test on x9/x16 in parallel. */
 501                         break;
 502                 case CFI_CMDSET_AMD_STANDARD:
 503                 case CFI_CMDSET_AMD_EXTENDED:
 504                 default:
 505                         break;
 506                 }
 507         }
 508         /* get lower aligned address */
 509         /* get lower aligned address */
 510         wp = (addr & ~(info->portwidth - 1));
 511
 512         /* handle unaligned start */
 513         if ((aln = addr - wp) != 0) {
 514                 cword.l = 0;
 515                 cp = wp;
 516                 for (i = 0; i < aln; ++i, ++cp)
 517                         flash_add_byte (info, &cword, (*(uchar *) cp));
 518
 519                 for (; (i < info->portwidth) && (cnt > 0); i++) {
 520                         flash_add_byte (info, &cword, *src++);
 521                         cnt--;
 522                         cp++;
 523                 }
 524                 for (; (cnt == 0) && (i < info->portwidth); ++i, ++cp)
 525                         flash_add_byte (info, &cword, (*(uchar *) cp));
 526                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 527                         return rc;
 528                 wp = cp;
 529         }
 530
 531         /* handle the aligned part */
 532 #ifdef CFG_FLASH_USE_BUFFER_WRITE
 533         buffered_size = (info->portwidth / info->chipwidth);
 534         buffered_size *= info->buffer_size;
 535         while (cnt >= info->portwidth) {
 536                 i = buffered_size > cnt ? cnt : buffered_size;
 537                 if ((rc = flash_write_cfibuffer (info, wp, src, i)) != ERR_OK)
 538                         return rc;
 539                 wp += i;
 540                 src += i;
 541                 cnt -= i;
 542         }
 543 #else
 544         while (cnt >= info->portwidth) {
 545                 cword.l = 0;
 546                 for (i = 0; i < info->portwidth; i++) {
 547                         flash_add_byte (info, &cword, *src++);
 548                 }
 549                 if ((rc = flash_write_cfiword (info, wp, cword)) != 0)
 550                         return rc;
 551                 wp += info->portwidth;
 552                 cnt -= info->portwidth;
 553         }
 554 #endif /* CFG_FLASH_USE_BUFFER_WRITE */
 555         if (cnt == 0) {
 556                 return (0);
 557         }
 558
 559         /*
 560          * handle unaligned tail bytes
 561          */
 562         cword.l = 0;
 563         for (i = 0, cp = wp; (i < info->portwidth) && (cnt > 0); ++i, ++cp) {
 564                 flash_add_byte (info, &cword, *src++);
 565                 --cnt;
 566         }
 567         for (; i < info->portwidth; ++i, ++cp) {
 568                 flash_add_byte (info, &cword, (*(uchar *) cp));
 569         }
 570
 571         /* special handling of 16 bit devices in 8 bit mode */
 572         if (x8mode) {
 573                 info->portwidth = x8mode;;
 574         }
 575         return flash_write_cfiword (info, wp, cword);
 576 }
 577
 578 /*-----------------------------------------------------------------------
 579  */
 580 #ifdef CFG_FLASH_PROTECTION
 581
 582 int flash_real_protect (flash_info_t * info, long sector, int prot)
 583 {
 584         int retcode = 0;
 585
 586         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
 587         flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT);
 588         if (prot)
 589                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_SET);
 590         else
 591                 flash_write_cmd (info, sector, 0, FLASH_CMD_PROTECT_CLEAR);
 592
 593         if ((retcode =
 594              flash_full_status_check (info, sector, info->erase_blk_tout,
 595                                       prot ? "protect" : "unprotect")) == 0) {
 596
 597                 info->protect[sector] = prot;
 598                 /* Intel's unprotect unprotects all locking */
 599                 if (prot == 0) {
 600                         flash_sect_t i;
 601
 602                         for (i = 0; i < info->sector_count; i++) {
 603                                 if (info->protect[i])
 604                                         flash_real_protect (info, i, 1);
 605                         }
 606                 }
 607         }
 608
 609         return retcode;
 610 }
 611
 612 /*-----------------------------------------------------------------------
 613  * flash_read_user_serial - read the OneTimeProgramming cells
 614  */
 615 void flash_read_user_serial (flash_info_t * info, void *buffer, int offset,
 616                              int len)
 617 {
 618         uchar *src;
 619         uchar *dst;
 620
 621         dst = buffer;
 622         src = flash_make_addr (info, 0, FLASH_OFFSET_USER_PROTECTION);
 623         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 624         memcpy (dst, src + offset, len);
 625         flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
 626 }
 627
 628 /*
 629  * flash_read_factory_serial - read the device Id from the protection area
 630  */
 631 void flash_read_factory_serial (flash_info_t * info, void *buffer, int offset,
 632                                 int len)
 633 {
 634         uchar *src;
 635
 636         src = flash_make_addr (info, 0, FLASH_OFFSET_INTEL_PROTECTION);
 637         flash_write_cmd (info, 0, 0, FLASH_CMD_READ_ID);
 638         memcpy (buffer, src + offset, len);
 639         flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
 640 }
 641
 642 #endif /* CFG_FLASH_PROTECTION */
 643
 644 /*
 645  * flash_is_busy - check to see if the flash is busy
 646  * This routine checks the status of the chip and returns true if the chip is busy
 647  */
 648 static int flash_is_busy (flash_info_t * info, flash_sect_t sect)
 649 {
 650         int retval;
 651
 652         switch (info->vendor) {
 653         case CFI_CMDSET_INTEL_STANDARD:
 654         case CFI_CMDSET_INTEL_EXTENDED:
 655                 retval = !flash_isset (info, sect, 0, FLASH_STATUS_DONE);
 656                 break;
 657         case CFI_CMDSET_AMD_STANDARD:
 658         case CFI_CMDSET_AMD_EXTENDED:
 659                 retval = flash_toggle (info, sect, 0, AMD_STATUS_TOGGLE);
 660                 break;
 661         default:
 662                 retval = 0;
 663         }
 664         debug ("flash_is_busy: %d\n", retval);
 665         return retval;
 666 }
 667
 668 /*-----------------------------------------------------------------------
 669  *  wait for XSR.7 to be set. Time out with an error if it does not.
 670  *  This routine does not set the flash to read-array mode.
 671  */
 672 static int flash_status_check (flash_info_t * info, flash_sect_t sector,
 673                                ulong tout, char *prompt)
 674 {
 675         ulong start;
 676
 677         /* Wait for command completion */
 678         start = get_timer (0);
 679         while (flash_is_busy (info, sector)) {
 680                 if (get_timer (start) > info->erase_blk_tout * CFG_HZ) {
 681                         printf ("Flash %s timeout at address %lx data %lx\n",
 682                                 prompt, info->start[sector],
 683                                 flash_read_long (info, sector, 0));
 684                         flash_write_cmd (info, sector, 0, info->cmd_reset);
 685                         return ERR_TIMOUT;
 686                 }
 687         }
 688         return ERR_OK;
 689 }
 690
 691 /*-----------------------------------------------------------------------
 692  * Wait for XSR.7 to be set, if it times out print an error, otherwise do a full status check.
 693  * This routine sets the flash to read-array mode.
 694  */
 695 static int flash_full_status_check (flash_info_t * info, flash_sect_t sector,
 696                                     ulong tout, char *prompt)
 697 {
 698         int retcode;
 699
 700         retcode = flash_status_check (info, sector, tout, prompt);
 701         switch (info->vendor) {
 702         case CFI_CMDSET_INTEL_EXTENDED:
 703         case CFI_CMDSET_INTEL_STANDARD:
 704                 if ((retcode != ERR_OK)
 705                     && !flash_isequal (info, sector, 0, FLASH_STATUS_DONE)) {
 706                         retcode = ERR_INVAL;
 707                         printf ("Flash %s error at address %lx\n", prompt,
 708                                 info->start[sector]);
 709                         if (flash_isset
 710                             (info, sector, 0,
 711                              FLASH_STATUS_ECLBS | FLASH_STATUS_PSLBS)) {
 712                                 printf ("Command Sequence Error.\n");
 713                         } else if (flash_isset
 714                                    (info, sector, 0, FLASH_STATUS_ECLBS)) {
 715                                 printf ("Block Erase Error.\n");
 716                                 retcode = ERR_NOT_ERASED;
 717                         } else if (flash_isset
 718                                    (info, sector, 0, FLASH_STATUS_PSLBS)) {
 719                                 printf ("Locking Error\n");
 720                         }
 721                         if (flash_isset (info, sector, 0, FLASH_STATUS_DPS)) {
 722                                 printf ("Block locked.\n");
 723                                 retcode = ERR_PROTECTED;
 724                         }
 725                         if (flash_isset (info, sector, 0, FLASH_STATUS_VPENS))
 726                                 printf ("Vpp Low Error.\n");
 727                 }
 728                 flash_write_cmd (info, sector, 0, FLASH_CMD_RESET);
 729                 break;
 730         default:
 731                 break;
 732         }
 733         return retcode;
 734 }
 735
 736 /*-----------------------------------------------------------------------
 737  */
 738 static void flash_add_byte (flash_info_t * info, cfiword_t * cword, uchar c)
 739 {
 740         switch (info->portwidth) {
 741         case FLASH_CFI_8BIT:
 742                 cword->c = c;
 743                 break;
 744         case FLASH_CFI_16BIT:
 745                 cword->w = (cword->w << 8) | c;
 746                 break;
 747         case FLASH_CFI_32BIT:
 748                 cword->l = (cword->l << 8) | c;
 749                 break;
 750         case FLASH_CFI_64BIT:
 751                 cword->ll = (cword->ll << 8) | c;
 752                 break;
 753         }
 754 }
 755
 756
 757 /*-----------------------------------------------------------------------
 758  * make a proper sized command based on the port and chip widths
 759  */
 760 static void flash_make_cmd (flash_info_t * info, uchar cmd, void *cmdbuf)
 761 {
 762         int i;
 763
 764 #if defined(__LITTLE_ENDIAN)
 765         ushort stmp;
 766 #endif
 767         uchar *cp = (uchar *) cmdbuf;
 768
 769         for (i = 0; i < info->portwidth; i++)
 770                 *cp++ = ((i + 1) % info->chipwidth) ? '\0' : cmd;
 771 #if defined(__LITTLE_ENDIAN)
 772         if (info->portwidth == 2) {
 773                 stmp = *(ushort *) cmdbuf;
 774                 *(ushort *) cmdbuf = swab16 (stmp);
 775         }
 776 #endif
 777 }
 778
 779 /*
 780  * Write a proper sized command to the correct address
 781  */
 782 static void flash_write_cmd (flash_info_t * info, flash_sect_t sect,
 783                              uint offset, uchar cmd)
 784 {
 785
 786         volatile cfiptr_t addr;
 787         cfiword_t cword;
 788
 789         addr.cp = flash_make_addr (info, sect, offset);
 790         flash_make_cmd (info, cmd, &cword);
 791         switch (info->portwidth) {
 792         case FLASH_CFI_8BIT:
 793                 debug ("fwc addr %p cmd %x %x 8bit x %d bit\n", addr.cp, cmd,
 794                        cword.c, info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 795                 *addr.cp = cword.c;
 796                 break;
 797         case FLASH_CFI_16BIT:
 798                 debug ("fwc addr %p cmd %x %4.4x 16bit x %d bit\n", addr.wp,
 799                        cmd, cword.w,
 800                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 801                 *addr.wp = cword.w;
 802                 break;
 803         case FLASH_CFI_32BIT:
 804                 debug ("fwc addr %p cmd %x %8.8lx 32bit x %d bit\n", addr.lp,
 805                        cmd, cword.l,
 806                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 807                 *addr.lp = cword.l;
 808                 break;
 809         case FLASH_CFI_64BIT:
 810 #ifdef DEBUG
 811                 {
 812                         char str[20];
 813
 814                         print_longlong (str, cword.ll);
 815
 816                         debug ("fwrite addr %p cmd %x %s 64 bit x %d bit\n",
 817                                addr.llp, cmd, str,
 818                                info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
 819                 }
 820 #endif
 821                 *addr.llp = cword.ll;
 822                 break;
 823         }
 824 }
 825
 826 static void flash_unlock_seq (flash_info_t * info, flash_sect_t sect)
 827 {
 828         flash_write_cmd (info, sect, 0x555, 0xAA);
 829         flash_write_cmd (info, sect, 0x2AA, 0x55);
 830 }
 831
 832 /*-----------------------------------------------------------------------
 833  */
 834 static int flash_isequal (flash_info_t * info, flash_sect_t sect, uint offset,
 835                           uchar cmd)
 836 {
 837         cfiptr_t cptr;
 838         cfiword_t cword;
 839         int retval;
 840
 841         cptr.cp = flash_make_addr (info, sect, offset);
 842         flash_make_cmd (info, cmd, &cword);
 843
 844         debug ("is= cmd %x(%c) addr %p ", cmd, cmd, cptr.cp);
 845         switch (info->portwidth) {
 846         case FLASH_CFI_8BIT:
 847                 debug ("is= %x %x\n", cptr.cp[0], cword.c);
 848                 retval = (cptr.cp[0] == cword.c);
 849                 break;
 850         case FLASH_CFI_16BIT:
 851                 debug ("is= %4.4x %4.4x\n", cptr.wp[0], cword.w);
 852                 retval = (cptr.wp[0] == cword.w);
 853                 break;
 854         case FLASH_CFI_32BIT:
 855                 debug ("is= %8.8lx %8.8lx\n", cptr.lp[0], cword.l);
 856                 retval = (cptr.lp[0] == cword.l);
 857                 break;
 858         case FLASH_CFI_64BIT:
 859 #ifdef DEBUG
 860                 {
 861                         char str1[20];
 862                         char str2[20];
 863
 864                         print_longlong (str1, cptr.llp[0]);
 865                         print_longlong (str2, cword.ll);
 866                         debug ("is= %s %s\n", str1, str2);
 867                 }
 868 #endif
 869                 retval = (cptr.llp[0] == cword.ll);
 870                 break;
 871         default:
 872                 retval = 0;
 873                 break;
 874         }
 875         return retval;
 876 }
 877
 878 /*-----------------------------------------------------------------------
 879  */
 880 static int flash_isset (flash_info_t * info, flash_sect_t sect, uint offset,
 881                         uchar cmd)
 882 {
 883         cfiptr_t cptr;
 884         cfiword_t cword;
 885         int retval;
 886
 887         cptr.cp = flash_make_addr (info, sect, offset);
 888         flash_make_cmd (info, cmd, &cword);
 889         switch (info->portwidth) {
 890         case FLASH_CFI_8BIT:
 891                 retval = ((cptr.cp[0] & cword.c) == cword.c);
 892                 break;
 893         case FLASH_CFI_16BIT:
 894                 retval = ((cptr.wp[0] & cword.w) == cword.w);
 895                 break;
 896         case FLASH_CFI_32BIT:
 897                 retval = ((cptr.lp[0] & cword.l) == cword.l);
 898                 break;
 899         case FLASH_CFI_64BIT:
 900                 retval = ((cptr.llp[0] & cword.ll) == cword.ll);
 901                 break;
 902         default:
 903                 retval = 0;
 904                 break;
 905         }
 906         return retval;
 907 }
 908
 909 /*-----------------------------------------------------------------------
 910  */
 911 static int flash_toggle (flash_info_t * info, flash_sect_t sect, uint offset,
 912                          uchar cmd)
 913 {
 914         cfiptr_t cptr;
 915         cfiword_t cword;
 916         int retval;
 917
 918         cptr.cp = flash_make_addr (info, sect, offset);
 919         flash_make_cmd (info, cmd, &cword);
 920         switch (info->portwidth) {
 921         case FLASH_CFI_8BIT:
 922                 retval = ((cptr.cp[0] & cword.c) != (cptr.cp[0] & cword.c));
 923                 break;
 924         case FLASH_CFI_16BIT:
 925                 retval = ((cptr.wp[0] & cword.w) != (cptr.wp[0] & cword.w));
 926                 break;
 927         case FLASH_CFI_32BIT:
 928                 retval = ((cptr.lp[0] & cword.l) != (cptr.lp[0] & cword.l));
 929                 break;
 930         case FLASH_CFI_64BIT:
 931                 retval = ((cptr.llp[0] & cword.ll) !=
 932                           (cptr.llp[0] & cword.ll));
 933                 break;
 934         default:
 935                 retval = 0;
 936                 break;
 937         }
 938         return retval;
 939 }
 940
 941 /*-----------------------------------------------------------------------
 942  * detect if flash is compatible with the Common Flash Interface (CFI)
 943  * http://www.jedec.org/download/search/jesd68.pdf
 944  *
 945 */
 946 static int flash_detect_cfi (flash_info_t * info)
 947 {
 948         debug ("flash detect cfi\n");
 949
 950         for (info->portwidth = FLASH_CFI_8BIT;
 951              info->portwidth <= FLASH_CFI_64BIT; info->portwidth <<= 1) {
 952                 for (info->chipwidth = FLASH_CFI_BY8;
 953                      info->chipwidth <= info->portwidth;
 954                      info->chipwidth <<= 1) {
 955                         flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
 956                         flash_write_cmd (info, 0, FLASH_OFFSET_CFI,
 957                                          FLASH_CMD_CFI);
 958                         if (flash_isequal
 959                             (info, 0, FLASH_OFFSET_CFI_RESP, 'Q')
 960                             && flash_isequal (info, 0,
 961                                               FLASH_OFFSET_CFI_RESP + 1, 'R')
 962                             && flash_isequal (info, 0,
 963                                               FLASH_OFFSET_CFI_RESP + 2,
 964                                               'Y')) {
 965                                 info->interface =
 966                                         flash_read_ushort (info, 0,
 967                                                            FLASH_OFFSET_INTERFACE);
 968                                 debug ("device interface is %d\n",
 969                                        info->interface);
 970                                 debug ("found port %d chip %d ",
 971                                        info->portwidth, info->chipwidth);
 972                                 debug ("port %d bits chip %d bits\n",
 973                                        info->
 974                                        portwidth << CFI_FLASH_SHIFT_WIDTH,
 975                                        info->
 976                                        chipwidth << CFI_FLASH_SHIFT_WIDTH);
 977                                 return 1;
 978                         }
 979                 }
 980         }
 981         debug ("not found\n");
 982         return 0;
 983 }
 984
 985 /*
 986  * The following code cannot be run from FLASH!
 987  *
 988  */
 989 static ulong flash_get_size (ulong base, int banknum)
 990 {
 991         flash_info_t *info = &flash_info[banknum];
 992         int i, j;
 993         flash_sect_t sect_cnt;
 994         unsigned long sector;
 995         unsigned long tmp;
 996         int size_ratio;
 997         uchar num_erase_regions;
 998         int erase_region_size;
 999         int erase_region_count;
1000
1001         info->start[0] = base;
1002
1003         if (flash_detect_cfi (info)) {
1004                 info->vendor =
1005                         flash_read_ushort (info, 0,
1006                                            FLASH_OFFSET_PRIMARY_VENDOR);
1007 #ifdef DEBUG
1008                 flash_printqry (info, 0);
1009 #endif
1010                 switch (info->vendor) {
1011                 case CFI_CMDSET_INTEL_STANDARD:
1012                 case CFI_CMDSET_INTEL_EXTENDED:
1013                 default:
1014                         info->cmd_reset = FLASH_CMD_RESET;
1015                         break;
1016                 case CFI_CMDSET_AMD_STANDARD:
1017                 case CFI_CMDSET_AMD_EXTENDED:
1018                         info->cmd_reset = AMD_CMD_RESET;
1019                         break;
1020                 }
1021
1022                 debug ("manufacturer is %d\n", info->vendor);
1023                 size_ratio = info->portwidth / info->chipwidth;
1024                 /* if the chip is x8/x16 reduce the ratio by half */
1025                 if ((info->interface == FLASH_CFI_X8X16)
1026                     && (info->chipwidth == FLASH_CFI_BY8)) {
1027                         size_ratio >>= 1;
1028                 }
1029                 num_erase_regions =
1030                         flash_read_uchar (info,
1031                                           FLASH_OFFSET_NUM_ERASE_REGIONS);
1032                 debug ("size_ratio %d port %d bits chip %d bits\n",
1033                        size_ratio, info->portwidth << CFI_FLASH_SHIFT_WIDTH,
1034                        info->chipwidth << CFI_FLASH_SHIFT_WIDTH);
1035                 debug ("found %d erase regions\n", num_erase_regions);
1036                 sect_cnt = 0;
1037                 sector = base;
1038                 for (i = 0; i < num_erase_regions; i++) {
1039                         if (i > NUM_ERASE_REGIONS) {
1040                                 printf ("%d erase regions found, only %d used\n", num_erase_regions, NUM_ERASE_REGIONS);
1041                                 break;
1042                         }
1043                         tmp = flash_read_long (info, 0,
1044                                                FLASH_OFFSET_ERASE_REGIONS +
1045                                                i * 4);
1046                         erase_region_size =
1047                                 (tmp & 0xffff) ? ((tmp & 0xffff) * 256) : 128;
1048                         tmp >>= 16;
1049                         erase_region_count = (tmp & 0xffff) + 1;
1050                         printf ("erase_region_count = %d erase_region_size = %d\n", erase_region_count, erase_region_size);
1051                         for (j = 0; j < erase_region_count; j++) {
1052                                 info->start[sect_cnt] = sector;
1053                                 sector += (erase_region_size * size_ratio);
1054                                 info->protect[sect_cnt] =
1055                                         flash_isset (info, sect_cnt,
1056                                                      FLASH_OFFSET_PROTECT,
1057                                                      FLASH_STATUS_PROTECT);
1058                                 sect_cnt++;
1059                         }
1060                 }
1061
1062                 info->sector_count = sect_cnt;
1063                 /* multiply the size by the number of chips */
1064                 info->size =
1065                         (1 << flash_read_uchar (info, FLASH_OFFSET_SIZE)) *
1066                         size_ratio;
1067                 info->buffer_size =
1068                         (1 <<
1069                          flash_read_ushort (info, 0,
1070                                             FLASH_OFFSET_BUFFER_SIZE));
1071                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_ETOUT);
1072                 info->erase_blk_tout =
1073                         (tmp *
1074                          (1 <<
1075                           flash_read_uchar (info, FLASH_OFFSET_EMAX_TOUT)));
1076                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WBTOUT);
1077                 info->buffer_write_tout =
1078                         (tmp *
1079                          (1 <<
1080                           flash_read_uchar (info, FLASH_OFFSET_WBMAX_TOUT)));
1081                 tmp = 1 << flash_read_uchar (info, FLASH_OFFSET_WTOUT);
1082                 info->write_tout =
1083                         (tmp *
1084                          (1 <<
1085                           flash_read_uchar (info,
1086                                             FLASH_OFFSET_WMAX_TOUT))) / 1000;
1087                 info->flash_id = FLASH_MAN_CFI;
1088         }
1089
1090         flash_write_cmd (info, 0, 0, FLASH_CMD_RESET);
1091         return (info->size);
1092 }
1093
1094
1095 /*-----------------------------------------------------------------------
1096  */
1097 static int flash_write_cfiword (flash_info_t * info, ulong dest,
1098                                 cfiword_t cword)
1099 {
1100
1101         cfiptr_t ctladdr;
1102         cfiptr_t cptr;
1103         int flag;
1104
1105         ctladdr.cp = flash_make_addr (info, 0, 0);
1106         cptr.cp = (uchar *) dest;
1107
1108
1109         /* Check if Flash is (sufficiently) erased */
1110         switch (info->portwidth) {
1111         case FLASH_CFI_8BIT:
1112                 flag = ((cptr.cp[0] & cword.c) == cword.c);
1113                 break;
1114         case FLASH_CFI_16BIT:
1115                 flag = ((cptr.wp[0] & cword.w) == cword.w);
1116                 break;
1117         case FLASH_CFI_32BIT:
1118                 flag = ((cptr.lp[0] & cword.l) == cword.l);
1119                 break;
1120         case FLASH_CFI_64BIT:
1121                 flag = ((cptr.lp[0] & cword.ll) == cword.ll);
1122                 break;
1123         default:
1124                 return 2;
1125         }
1126         if (!flag)
1127                 return 2;
1128
1129         /* Disable interrupts which might cause a timeout here */
1130         flag = disable_interrupts ();
1131
1132         switch (info->vendor) {
1133         case CFI_CMDSET_INTEL_EXTENDED:
1134         case CFI_CMDSET_INTEL_STANDARD:
1135                 flash_write_cmd (info, 0, 0, FLASH_CMD_CLEAR_STATUS);
1136                 flash_write_cmd (info, 0, 0, FLASH_CMD_WRITE);
1137                 break;
1138         case CFI_CMDSET_AMD_EXTENDED:
1139         case CFI_CMDSET_AMD_STANDARD:
1140                 flash_unlock_seq (info, 0);
1141                 flash_write_cmd (info, 0, 0x555, AMD_CMD_WRITE);
1142                 break;
1143         }
1144
1145         switch (info->portwidth) {
1146         case FLASH_CFI_8BIT:
1147                 cptr.cp[0] = cword.c;
1148                 break;
1149         case FLASH_CFI_16BIT:
1150                 cptr.wp[0] = cword.w;
1151                 break;
1152         case FLASH_CFI_32BIT:
1153                 cptr.lp[0] = cword.l;
1154                 break;
1155         case FLASH_CFI_64BIT:
1156                 cptr.llp[0] = cword.ll;
1157                 break;
1158         }
1159
1160         /* re-enable interrupts if necessary */
1161         if (flag)
1162                 enable_interrupts ();
1163
1164         return flash_full_status_check (info, 0, info->write_tout, "write");
1165 }
1166
1167 #ifdef CFG_FLASH_USE_BUFFER_WRITE
1168
1169 /* loop through the sectors from the highest address
1170  * when the passed address is greater or equal to the sector address
1171  * we have a match
1172  */
1173 static flash_sect_t find_sector (flash_info_t * info, ulong addr)
1174 {
1175         flash_sect_t sector;
1176
1177         for (sector = info->sector_count - 1; sector >= 0; sector--) {
1178                 if (addr >= info->start[sector])
1179                         break;
1180         }
1181         return sector;
1182 }
1183
1184 static int flash_write_cfibuffer (flash_info_t * info, ulong dest, uchar * cp,
1185                                   int len)
1186 {
1187         flash_sect_t sector;
1188         int cnt;
1189         int retcode;
1190         volatile cfiptr_t src;
1191         volatile cfiptr_t dst;
1192
1193         src.cp = cp;
1194         dst.cp = (uchar *) dest;
1195         sector = find_sector (info, dest);
1196         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1197         flash_write_cmd (info, sector, 0, FLASH_CMD_WRITE_TO_BUFFER);
1198         if ((retcode =
1199              flash_status_check (info, sector, info->buffer_write_tout,
1200                                  "write to buffer")) == ERR_OK) {
1201                 /* reduce the number of loops by the width of the port  */
1202                 switch (info->portwidth) {
1203                 case FLASH_CFI_8BIT:
1204                         cnt = len;
1205                         break;
1206                 case FLASH_CFI_16BIT:
1207                         cnt = len >> 1;
1208                         break;
1209                 case FLASH_CFI_32BIT:
1210                         cnt = len >> 2;
1211                         break;
1212                 case FLASH_CFI_64BIT:
1213                         cnt = len >> 3;
1214                         break;
1215                 default:
1216                         return ERR_INVAL;
1217                         break;
1218                 }
1219                 flash_write_cmd (info, sector, 0, (uchar) cnt - 1);
1220                 while (cnt-- > 0) {
1221                         switch (info->portwidth) {
1222                         case FLASH_CFI_8BIT:
1223                                 *dst.cp++ = *src.cp++;
1224                                 break;
1225                         case FLASH_CFI_16BIT:
1226                                 *dst.wp++ = *src.wp++;
1227                                 break;
1228                         case FLASH_CFI_32BIT:
1229                                 *dst.lp++ = *src.lp++;
1230                                 break;
1231                         case FLASH_CFI_64BIT:
1232                                 *dst.llp++ = *src.llp++;
1233                                 break;
1234                         default:
1235                                 return ERR_INVAL;
1236                                 break;
1237                         }
1238                 }
1239                 flash_write_cmd (info, sector, 0,
1240                                  FLASH_CMD_WRITE_BUFFER_CONFIRM);
1241                 retcode =
1242                         flash_full_status_check (info, sector,
1243                                                  info->buffer_write_tout,
1244                                                  "buffer write");
1245         }
1246         flash_write_cmd (info, sector, 0, FLASH_CMD_CLEAR_STATUS);
1247         return retcode;
1248 }
1249 #endif /* CFG_USE_FLASH_BUFFER_WRITE */
1250 #endif /* CFG_FLASH_CFI */