2 * Copyright (c) 2004 Picture Elements, Inc.
3 * Stephen Williams (XXXXXXXXXXXXXXXX)
5 * SPDX-License-Identifier: GPL-2.0+
9 * The Xilinx SystemACE chip support is activated by defining
10 * CONFIG_SYSTEMACE to turn on support, and CONFIG_SYS_SYSTEMACE_BASE
11 * to set the base address of the device. This code currently
12 * assumes that the chip is connected via a byte-wide bus.
14 * The CONFIG_SYSTEMACE also adds to fat support the device class
15 * "ace" that allows the user to execute "fatls ace 0" and the
16 * like. This works by making the systemace_get_dev function
17 * available to cmd_fat.c:get_dev and filling in a block device
18 * description that has all the bits needed for FAT support to
21 * According to Xilinx technical support, before accessing the
22 * SystemACE CF you need to set the following control bits:
30 #include <systemace.h>
35 * The ace_readw and writew functions read/write 16bit words, but the
36 * offset value is the BYTE offset as most used in the Xilinx
37 * datasheet for the SystemACE chip. The CONFIG_SYS_SYSTEMACE_BASE is defined
38 * to be the base address for the chip, usually in the local
42 static u32 base = CONFIG_SYS_SYSTEMACE_BASE;
43 static u32 width = CONFIG_SYS_SYSTEMACE_WIDTH;
45 static void ace_writew(u16 val, unsigned off)
48 #if !defined(__BIG_ENDIAN)
49 writeb(val >> 8, base + off);
50 writeb(val, base + off + 1);
52 writeb(val, base + off);
53 writeb(val >> 8, base + off + 1);
56 out16(base + off, val);
59 static u16 ace_readw(unsigned off)
62 #if !defined(__BIG_ENDIAN)
63 return (readb(base + off) << 8) | readb(base + off + 1);
65 return readb(base + off) | (readb(base + off + 1) << 8);
69 return in16(base + off);
72 static unsigned long systemace_read(int dev, unsigned long start,
73 lbaint_t blkcnt, void *buffer);
75 static block_dev_desc_t systemace_dev = { 0 };
77 static int get_cf_lock(void)
81 /* CONTROLREG = LOCKREG */
82 unsigned val = ace_readw(0x18);
84 ace_writew((val & 0xffff), 0x18);
86 /* Wait for MPULOCK in STATUSREG[15:0] */
87 while (!(ace_readw(0x04) & 0x0002)) {
99 static void release_cf_lock(void)
101 unsigned val = ace_readw(0x18);
103 ace_writew((val & 0xffff), 0x18);
106 #ifdef CONFIG_PARTITIONS
107 block_dev_desc_t *systemace_get_dev(int dev)
109 /* The first time through this, the systemace_dev object is
110 not yet initialized. In that case, fill it in. */
111 if (systemace_dev.blksz == 0) {
112 systemace_dev.if_type = IF_TYPE_UNKNOWN;
113 systemace_dev.dev = 0;
114 systemace_dev.part_type = PART_TYPE_UNKNOWN;
115 systemace_dev.type = DEV_TYPE_HARDDISK;
116 systemace_dev.blksz = 512;
117 systemace_dev.log2blksz = LOG2(systemace_dev.blksz);
118 systemace_dev.removable = 1;
119 systemace_dev.block_read = systemace_read;
122 * Ensure the correct bus mode (8/16 bits) gets enabled
124 ace_writew(width == 8 ? 0 : 0x0001, 0);
126 init_part(&systemace_dev);
130 return &systemace_dev;
135 * This function is called (by dereferencing the block_read pointer in
136 * the dev_desc) to read blocks of data. The return value is the
137 * number of blocks read. A zero return indicates an error.
139 static unsigned long systemace_read(int dev, unsigned long start,
140 lbaint_t blkcnt, void *buffer)
143 unsigned blk_countdown;
144 unsigned char *dp = buffer;
147 if (get_cf_lock() < 0) {
148 unsigned status = ace_readw(0x04);
150 /* If CFDETECT is false, card is missing. */
151 if (!(status & 0x0010)) {
152 printf("** CompactFlash card not present. **\n");
156 printf("**** ACE locked away from me (STATUSREG=%04x)\n",
160 #ifdef DEBUG_SYSTEMACE
161 printf("... systemace read %lu sectors at %lu\n", blkcnt, start);
166 val = ace_readw(0x04);
168 /* If CFDETECT is false, card is missing. */
169 if (!(val & 0x0010)) {
170 printf("**** ACE CompactFlash not found.\n");
175 /* If RDYFORCMD, then we are ready to go. */
180 printf("**** SystemACE not ready.\n");
189 /* The SystemACE can only transfer 256 sectors at a time, so
190 limit the current chunk of sectors. The blk_countdown
191 variable is the number of sectors left to transfer. */
193 blk_countdown = blkcnt;
194 while (blk_countdown > 0) {
195 unsigned trans = blk_countdown;
200 #ifdef DEBUG_SYSTEMACE
201 printf("... transfer %lu sector in a chunk\n", trans);
203 /* Write LBA block address */
204 ace_writew((start >> 0) & 0xffff, 0x10);
205 ace_writew((start >> 16) & 0x0fff, 0x12);
207 /* NOTE: in the Write Sector count below, a count of 0
208 causes a transfer of 256, so &0xff gives the right
209 value for whatever transfer count we want. */
211 /* Write sector count | ReadMemCardData. */
212 ace_writew((trans & 0xff) | 0x0300, 0x14);
215 * For FPGA configuration via SystemACE is reset unacceptable
216 * CFGDONE bit in STATUSREG is not set to 1.
218 #ifndef SYSTEMACE_CONFIG_FPGA
219 /* Reset the configruation controller */
220 val = ace_readw(0x18);
222 ace_writew(val, 0x18);
229 /* Wait for buffer to become ready. */
230 while (!(ace_readw(0x04) & 0x0020)) {
234 /* Read 16 words of 2bytes from the sector buffer. */
235 for (idx = 0; idx < 16; idx += 1) {
236 unsigned short val = ace_readw(0x40);
238 *dp++ = (val >> 8) & 0xff;
244 /* Clear the configruation controller reset */
245 val = ace_readw(0x18);
247 ace_writew(val, 0x18);
249 /* Count the blocks we transfer this time. */
251 blk_countdown -= trans;