1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2000-2011
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
16 #include <linux/delay.h>
19 # define EIEIO __asm__ volatile ("eieio")
20 # define SYNC __asm__ volatile ("sync")
22 # define EIEIO /* nothing */
23 # define SYNC /* nothing */
26 /* Current offset for IDE0 / IDE1 bus access */
27 ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
28 #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
29 CONFIG_SYS_ATA_IDE0_OFFSET,
31 #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
32 CONFIG_SYS_ATA_IDE1_OFFSET,
36 static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
38 struct blk_desc ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
40 #define IDE_TIME_OUT 2000 /* 2 sec timeout */
42 #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
44 #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
46 #ifndef CONFIG_SYS_ATA_PORT_ADDR
47 #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
50 #ifdef CONFIG_IDE_RESET
51 extern void ide_set_reset(int idereset);
53 static void ide_reset(void)
57 for (i = 0; i < CONFIG_SYS_IDE_MAXBUS; ++i)
59 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i)
60 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
62 ide_set_reset(1); /* assert reset */
64 /* the reset signal shall be asserted for et least 25 us */
69 /* de-assert RESET signal */
73 for (i = 0; i < 250; ++i)
77 #define ide_reset() /* dummy */
78 #endif /* CONFIG_IDE_RESET */
81 * Wait until Busy bit is off, or timeout (in ms)
84 static uchar ide_wait(int dev, ulong t)
86 ulong delay = 10 * t; /* poll every 100 us */
89 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
98 * copy src to dest, skipping leading and trailing blanks and null
99 * terminate the string
100 * "len" is the size of available memory including the terminating '\0'
102 static void ident_cpy(unsigned char *dst, unsigned char *src,
105 unsigned char *end, *last;
110 /* reserve space for '\0' */
114 /* skip leading white space */
115 while ((*src) && (src < end) && (*src == ' '))
118 /* copy string, omitting trailing white space */
119 while ((*src) && (src < end)) {
129 /****************************************************************************
133 #if defined(CONFIG_IDE_SWAP_IO)
134 /* since ATAPI may use commands with not 4 bytes alligned length
135 * we have our own transfer functions, 2 bytes alligned */
136 __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
139 volatile ushort *pbuf;
141 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
142 dbuf = (ushort *)sect_buf;
144 debug("in output data shorts base for read is %lx\n",
145 (unsigned long) pbuf);
153 __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
156 volatile ushort *pbuf;
158 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
159 dbuf = (ushort *)sect_buf;
161 debug("in input data shorts base for read is %lx\n",
162 (unsigned long) pbuf);
170 #else /* ! CONFIG_IDE_SWAP_IO */
171 __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
173 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
176 __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
178 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
181 #endif /* CONFIG_IDE_SWAP_IO */
184 * Wait until (Status & mask) == res, or timeout (in ms)
186 * This is used since some ATAPI CD ROMs clears their Busy Bit first
187 * and then they set their DRQ Bit
189 static uchar atapi_wait_mask(int dev, ulong t, uchar mask, uchar res)
191 ulong delay = 10 * t; /* poll every 100 us */
194 /* prevents to read the status before valid */
195 c = ide_inb(dev, ATA_DEV_CTL);
197 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
198 /* break if error occurs (doesn't make sense to wait more) */
199 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR)
209 * issue an atapi command
211 unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen,
212 unsigned char *buffer, int buflen)
214 unsigned char c, err, mask, res;
219 mask = ATA_STAT_BUSY | ATA_STAT_DRQ;
221 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
222 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
223 if ((c & mask) != res) {
224 printf("ATAPI_ISSUE: device %d not ready status %X\n", device,
230 ide_outb(device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
231 ide_outb(device, ATA_SECT_CNT, 0);
232 ide_outb(device, ATA_SECT_NUM, 0);
233 ide_outb(device, ATA_CYL_LOW, (unsigned char) (buflen & 0xFF));
234 ide_outb(device, ATA_CYL_HIGH,
235 (unsigned char) ((buflen >> 8) & 0xFF));
236 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
238 ide_outb(device, ATA_COMMAND, ATA_CMD_PACKET);
241 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
243 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
245 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
246 printf("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",
252 /* write command block */
253 ide_output_data_shorts(device, (unsigned short *)ccb, ccblen / 2);
255 /* ATAPI Command written wait for completition */
256 udelay(5000); /* device must set bsy */
258 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
260 * if no data wait for DRQ = 0 BSY = 0
261 * if data wait for DRQ = 1 BSY = 0
266 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
267 if ((c & mask) != res) {
268 if (c & ATA_STAT_ERR) {
269 err = (ide_inb(device, ATA_ERROR_REG)) >> 4;
270 debug("atapi_issue 1 returned sense key %X status %02X\n",
273 printf("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n",
279 n = ide_inb(device, ATA_CYL_HIGH);
281 n += ide_inb(device, ATA_CYL_LOW);
283 printf("ERROR, transfer bytes %d requested only %d\n", n,
288 if ((n == 0) && (buflen < 0)) {
289 printf("ERROR, transfer bytes %d requested %d\n", n, buflen);
294 debug("WARNING, transfer bytes %d not equal with requested %d\n",
297 if (n != 0) { /* data transfer */
298 debug("ATAPI_ISSUE: %d Bytes to transfer\n", n);
299 /* we transfer shorts */
301 /* ok now decide if it is an in or output */
302 if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) {
303 debug("Write to device\n");
304 ide_output_data_shorts(device, (unsigned short *)buffer,
307 debug("Read from device @ %p shorts %d\n", buffer, n);
308 ide_input_data_shorts(device, (unsigned short *)buffer,
312 udelay(5000); /* seems that some CD ROMs need this... */
313 mask = ATA_STAT_BUSY | ATA_STAT_ERR;
315 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
316 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
317 err = (ide_inb(device, ATA_ERROR_REG) >> 4);
318 debug("atapi_issue 2 returned sense key %X status %X\n", err,
328 * sending the command to atapi_issue. If an status other than good
329 * returns, an request_sense will be issued
332 #define ATAPI_DRIVE_NOT_READY 100
333 #define ATAPI_UNIT_ATTN 10
335 unsigned char atapi_issue_autoreq(int device,
338 unsigned char *buffer, int buflen)
340 unsigned char sense_data[18], sense_ccb[12];
341 unsigned char res, key, asc, ascq;
342 int notready, unitattn;
344 unitattn = ATAPI_UNIT_ATTN;
345 notready = ATAPI_DRIVE_NOT_READY;
348 res = atapi_issue(device, ccb, ccblen, buffer, buflen);
353 return 0xFF; /* error */
355 debug("(auto_req)atapi_issue returned sense key %X\n", res);
357 memset(sense_ccb, 0, sizeof(sense_ccb));
358 memset(sense_data, 0, sizeof(sense_data));
359 sense_ccb[0] = ATAPI_CMD_REQ_SENSE;
360 sense_ccb[4] = 18; /* allocation Length */
362 res = atapi_issue(device, sense_ccb, 12, sense_data, 18);
363 key = (sense_data[2] & 0xF);
364 asc = (sense_data[12]);
365 ascq = (sense_data[13]);
367 debug("ATAPI_CMD_REQ_SENSE returned %x\n", res);
368 debug(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
369 sense_data[0], key, asc, ascq);
372 return 0; /* ok device ready */
374 if ((key == 6) || (asc == 0x29) || (asc == 0x28)) { /* Unit Attention */
375 if (unitattn-- > 0) {
379 printf("Unit Attention, tried %d\n", ATAPI_UNIT_ATTN);
382 if ((asc == 0x4) && (ascq == 0x1)) {
383 /* not ready, but will be ready soon */
384 if (notready-- > 0) {
388 printf("Drive not ready, tried %d times\n",
389 ATAPI_DRIVE_NOT_READY);
393 debug("Media not present\n");
397 printf("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n", key, asc,
400 debug("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq);
406 * we transfer only one block per command, since the multiple DRQ per
407 * command is not yet implemented
409 #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
410 #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
411 #define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
413 ulong atapi_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
416 int device = block_dev->devnum;
418 unsigned char ccb[12]; /* Command descriptor block */
421 debug("atapi_read dev %d start " LBAF " blocks " LBAF
422 " buffer at %lX\n", device, blknr, blkcnt, (ulong) buffer);
425 if (blkcnt > ATAPI_READ_MAX_BLOCK)
426 cnt = ATAPI_READ_MAX_BLOCK;
430 ccb[0] = ATAPI_CMD_READ_12;
431 ccb[1] = 0; /* reserved */
432 ccb[2] = (unsigned char) (blknr >> 24) & 0xFF; /* MSB Block */
433 ccb[3] = (unsigned char) (blknr >> 16) & 0xFF; /* */
434 ccb[4] = (unsigned char) (blknr >> 8) & 0xFF;
435 ccb[5] = (unsigned char) blknr & 0xFF; /* LSB Block */
436 ccb[6] = (unsigned char) (cnt >> 24) & 0xFF; /* MSB Block cnt */
437 ccb[7] = (unsigned char) (cnt >> 16) & 0xFF;
438 ccb[8] = (unsigned char) (cnt >> 8) & 0xFF;
439 ccb[9] = (unsigned char) cnt & 0xFF; /* LSB Block */
440 ccb[10] = 0; /* reserved */
441 ccb[11] = 0; /* reserved */
443 if (atapi_issue_autoreq(device, ccb, 12,
444 (unsigned char *)buffer,
445 cnt * ATAPI_READ_BLOCK_SIZE)
452 buffer += (cnt * ATAPI_READ_BLOCK_SIZE);
453 } while (blkcnt > 0);
457 static void atapi_inquiry(struct blk_desc *dev_desc)
459 unsigned char ccb[12]; /* Command descriptor block */
460 unsigned char iobuf[64]; /* temp buf */
464 device = dev_desc->devnum;
465 dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */
467 dev_desc->block_read = atapi_read;
470 memset(ccb, 0, sizeof(ccb));
471 memset(iobuf, 0, sizeof(iobuf));
473 ccb[0] = ATAPI_CMD_INQUIRY;
474 ccb[4] = 40; /* allocation Legnth */
475 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 40);
477 debug("ATAPI_CMD_INQUIRY returned %x\n", c);
481 /* copy device ident strings */
482 ident_cpy((unsigned char *)dev_desc->vendor, &iobuf[8], 8);
483 ident_cpy((unsigned char *)dev_desc->product, &iobuf[16], 16);
484 ident_cpy((unsigned char *)dev_desc->revision, &iobuf[32], 5);
489 dev_desc->log2blksz = LOG2_INVALID(typeof(dev_desc->log2blksz));
490 dev_desc->type = iobuf[0] & 0x1f;
492 if ((iobuf[1] & 0x80) == 0x80)
493 dev_desc->removable = 1;
495 dev_desc->removable = 0;
497 memset(ccb, 0, sizeof(ccb));
498 memset(iobuf, 0, sizeof(iobuf));
499 ccb[0] = ATAPI_CMD_START_STOP;
500 ccb[4] = 0x03; /* start */
502 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
504 debug("ATAPI_CMD_START_STOP returned %x\n", c);
508 memset(ccb, 0, sizeof(ccb));
509 memset(iobuf, 0, sizeof(iobuf));
510 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
512 debug("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c);
516 memset(ccb, 0, sizeof(ccb));
517 memset(iobuf, 0, sizeof(iobuf));
518 ccb[0] = ATAPI_CMD_READ_CAP;
519 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 8);
520 debug("ATAPI_CMD_READ_CAP returned %x\n", c);
524 debug("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
525 iobuf[0], iobuf[1], iobuf[2], iobuf[3],
526 iobuf[4], iobuf[5], iobuf[6], iobuf[7]);
528 dev_desc->lba = ((unsigned long) iobuf[0] << 24) +
529 ((unsigned long) iobuf[1] << 16) +
530 ((unsigned long) iobuf[2] << 8) + ((unsigned long) iobuf[3]);
531 dev_desc->blksz = ((unsigned long) iobuf[4] << 24) +
532 ((unsigned long) iobuf[5] << 16) +
533 ((unsigned long) iobuf[6] << 8) + ((unsigned long) iobuf[7]);
534 dev_desc->log2blksz = LOG2(dev_desc->blksz);
536 /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
542 #endif /* CONFIG_ATAPI */
544 static void ide_ident(struct blk_desc *dev_desc)
554 device = dev_desc->devnum;
555 printf(" Device %d: ", device);
559 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
560 dev_desc->if_type = IF_TYPE_IDE;
565 /* Warning: This will be tricky to read */
566 while (retries <= 1) {
567 /* check signature */
568 if ((ide_inb(device, ATA_SECT_CNT) == 0x01) &&
569 (ide_inb(device, ATA_SECT_NUM) == 0x01) &&
570 (ide_inb(device, ATA_CYL_LOW) == 0x14) &&
571 (ide_inb(device, ATA_CYL_HIGH) == 0xEB)) {
572 /* ATAPI Signature found */
573 dev_desc->if_type = IF_TYPE_ATAPI;
575 * Start Ident Command
577 ide_outb(device, ATA_COMMAND, ATA_CMD_ID_ATAPI);
579 * Wait for completion - ATAPI devices need more time
582 c = ide_wait(device, ATAPI_TIME_OUT);
587 * Start Ident Command
589 ide_outb(device, ATA_COMMAND, ATA_CMD_ID_ATA);
592 * Wait for completion
594 c = ide_wait(device, IDE_TIME_OUT);
597 if (((c & ATA_STAT_DRQ) == 0) ||
598 ((c & (ATA_STAT_FAULT | ATA_STAT_ERR)) != 0)) {
602 * Need to soft reset the device
603 * in case it's an ATAPI...
605 debug("Retrying...\n");
606 ide_outb(device, ATA_DEV_HD,
607 ATA_LBA | ATA_DEVICE(device));
609 ide_outb(device, ATA_COMMAND, 0x08);
610 udelay(500000); /* 500 ms */
615 ide_outb(device, ATA_DEV_HD,
616 ATA_LBA | ATA_DEVICE(device));
625 } /* see above - ugly to read */
627 if (retries == 2) /* Not found */
631 ide_input_swap_data(device, (ulong *)&iop, ATA_SECTORWORDS);
633 ident_cpy((unsigned char *)dev_desc->revision, iop.fw_rev,
634 sizeof(dev_desc->revision));
635 ident_cpy((unsigned char *)dev_desc->vendor, iop.model,
636 sizeof(dev_desc->vendor));
637 ident_cpy((unsigned char *)dev_desc->product, iop.serial_no,
638 sizeof(dev_desc->product));
639 #ifdef __LITTLE_ENDIAN
641 * firmware revision, model, and serial number have Big Endian Byte
642 * order in Word. Convert all three to little endian.
644 * See CF+ and CompactFlash Specification Revision 2.0:
645 * 6.2.1.6: Identify Drive, Table 39 for more details
648 strswab(dev_desc->revision);
649 strswab(dev_desc->vendor);
650 strswab(dev_desc->product);
651 #endif /* __LITTLE_ENDIAN */
653 if ((iop.config & 0x0080) == 0x0080)
654 dev_desc->removable = 1;
656 dev_desc->removable = 0;
659 if (dev_desc->if_type == IF_TYPE_ATAPI) {
660 atapi_inquiry(dev_desc);
663 #endif /* CONFIG_ATAPI */
667 dev_desc->lba = (iop.lba_capacity << 16) | (iop.lba_capacity >> 16);
668 #else /* ! __BIG_ENDIAN */
670 * do not swap shorts on little endian
672 * See CF+ and CompactFlash Specification Revision 2.0:
673 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
675 dev_desc->lba = iop.lba_capacity;
676 #endif /* __BIG_ENDIAN */
679 if (iop.command_set_2 & 0x0400) { /* LBA 48 support */
681 dev_desc->lba = (unsigned long long) iop.lba48_capacity[0] |
682 ((unsigned long long) iop.lba48_capacity[1] << 16) |
683 ((unsigned long long) iop.lba48_capacity[2] << 32) |
684 ((unsigned long long) iop.lba48_capacity[3] << 48);
688 #endif /* CONFIG_LBA48 */
690 dev_desc->type = DEV_TYPE_HARDDISK;
691 dev_desc->blksz = ATA_BLOCKSIZE;
692 dev_desc->log2blksz = LOG2(dev_desc->blksz);
693 dev_desc->lun = 0; /* just to fill something in... */
695 #if 0 /* only used to test the powersaving mode,
696 * if enabled, the drive goes after 5 sec
698 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
699 c = ide_wait(device, IDE_TIME_OUT);
700 ide_outb(device, ATA_SECT_CNT, 1);
701 ide_outb(device, ATA_LBA_LOW, 0);
702 ide_outb(device, ATA_LBA_MID, 0);
703 ide_outb(device, ATA_LBA_HIGH, 0);
704 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
705 ide_outb(device, ATA_COMMAND, 0xe3);
707 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
711 __weak void ide_outb(int dev, int port, unsigned char val)
713 debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
715 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
717 #if defined(CONFIG_IDE_AHB)
720 ide_write_register(dev, port, val);
723 outb(val, (ATA_CURR_BASE(dev)));
726 outb(val, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
730 __weak unsigned char ide_inb(int dev, int port)
734 #if defined(CONFIG_IDE_AHB)
735 val = ide_read_register(dev, port);
737 val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
740 debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
742 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), val);
751 #ifdef CONFIG_IDE_PREINIT
755 puts("ide_preinit failed\n");
758 #endif /* CONFIG_IDE_PREINIT */
762 /* ATAPI Drives seems to need a proper IDE Reset */
766 * Wait for IDE to get ready.
767 * According to spec, this can take up to 31 seconds!
769 for (bus = 0; bus < CONFIG_SYS_IDE_MAXBUS; ++bus) {
771 bus * (CONFIG_SYS_IDE_MAXDEVICE /
772 CONFIG_SYS_IDE_MAXBUS);
774 printf("Bus %d: ", bus);
780 udelay(100000); /* 100 ms */
781 ide_outb(dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
782 udelay(100000); /* 100 ms */
785 udelay(10000); /* 10 ms */
787 c = ide_inb(dev, ATA_STATUS);
789 if (i > (ATA_RESET_TIME * 100)) {
790 puts("** Timeout **\n");
793 if ((i >= 100) && ((i % 100) == 0))
796 } while (c & ATA_STAT_BUSY);
798 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
799 puts("not available ");
800 debug("Status = 0x%02X ", c);
801 #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
802 } else if ((c & ATA_STAT_READY) == 0) {
803 puts("not available ");
804 debug("Status = 0x%02X ", c);
815 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
816 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
817 ide_dev_desc[i].if_type = IF_TYPE_IDE;
818 ide_dev_desc[i].devnum = i;
819 ide_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
820 ide_dev_desc[i].blksz = 0;
821 ide_dev_desc[i].log2blksz =
822 LOG2_INVALID(typeof(ide_dev_desc[i].log2blksz));
823 ide_dev_desc[i].lba = 0;
825 ide_dev_desc[i].block_read = ide_read;
826 ide_dev_desc[i].block_write = ide_write;
828 if (!ide_bus_ok[IDE_BUS(i)])
830 ide_ident(&ide_dev_desc[i]);
831 dev_print(&ide_dev_desc[i]);
834 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
835 /* initialize partition type */
836 part_init(&ide_dev_desc[i]);
845 uclass_first_device(UCLASS_IDE, &dev);
849 /* We only need to swap data if we are running on a big endian cpu. */
850 #if defined(__LITTLE_ENDIAN)
851 __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
853 ide_input_data(dev, sect_buf, words);
856 __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
858 volatile ushort *pbuf =
859 (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
860 ushort *dbuf = (ushort *)sect_buf;
862 debug("in input swap data base for read is %lx\n",
863 (unsigned long) pbuf);
867 *dbuf++ = swab16p((u16 *)pbuf);
868 *dbuf++ = swab16p((u16 *)pbuf);
870 *dbuf++ = ld_le16(pbuf);
871 *dbuf++ = ld_le16(pbuf);
875 #endif /* __LITTLE_ENDIAN */
878 #if defined(CONFIG_IDE_SWAP_IO)
879 __weak void ide_output_data(int dev, const ulong *sect_buf, int words)
882 volatile ushort *pbuf;
884 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
885 dbuf = (ushort *)sect_buf;
893 #else /* ! CONFIG_IDE_SWAP_IO */
894 __weak void ide_output_data(int dev, const ulong *sect_buf, int words)
896 #if defined(CONFIG_IDE_AHB)
897 ide_write_data(dev, sect_buf, words);
899 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
902 #endif /* CONFIG_IDE_SWAP_IO */
904 #if defined(CONFIG_IDE_SWAP_IO)
905 __weak void ide_input_data(int dev, ulong *sect_buf, int words)
908 volatile ushort *pbuf;
910 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
911 dbuf = (ushort *)sect_buf;
913 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
922 #else /* ! CONFIG_IDE_SWAP_IO */
923 __weak void ide_input_data(int dev, ulong *sect_buf, int words)
925 #if defined(CONFIG_IDE_AHB)
926 ide_read_data(dev, sect_buf, words);
928 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
932 #endif /* CONFIG_IDE_SWAP_IO */
935 ulong ide_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
938 ulong ide_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
943 struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
945 int device = block_dev->devnum;
948 unsigned char pwrsave = 0; /* power save */
951 unsigned char lba48 = 0;
953 if (blknr & 0x0000fffff0000000ULL) {
954 /* more than 28 bits used, use 48bit mode */
958 debug("ide_read dev %d start " LBAF ", blocks " LBAF " buffer at %lX\n",
959 device, blknr, blkcnt, (ulong) buffer);
963 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
964 c = ide_wait(device, IDE_TIME_OUT);
966 if (c & ATA_STAT_BUSY) {
967 printf("IDE read: device %d not ready\n", device);
971 /* first check if the drive is in Powersaving mode, if yes,
972 * increase the timeout value */
973 ide_outb(device, ATA_COMMAND, ATA_CMD_CHK_POWER);
976 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
978 if (c & ATA_STAT_BUSY) {
979 printf("IDE read: device %d not ready\n", device);
982 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
983 printf("No Powersaving mode %X\n", c);
985 c = ide_inb(device, ATA_SECT_CNT);
986 debug("Powersaving %02X\n", c);
992 while (blkcnt-- > 0) {
993 c = ide_wait(device, IDE_TIME_OUT);
995 if (c & ATA_STAT_BUSY) {
996 printf("IDE read: device %d not ready\n", device);
1001 /* write high bits */
1002 ide_outb(device, ATA_SECT_CNT, 0);
1003 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1004 #ifdef CONFIG_SYS_64BIT_LBA
1005 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1006 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1008 ide_outb(device, ATA_LBA_MID, 0);
1009 ide_outb(device, ATA_LBA_HIGH, 0);
1013 ide_outb(device, ATA_SECT_CNT, 1);
1014 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1015 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1016 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1020 ide_outb(device, ATA_DEV_HD,
1021 ATA_LBA | ATA_DEVICE(device));
1022 ide_outb(device, ATA_COMMAND, ATA_CMD_READ_EXT);
1027 ide_outb(device, ATA_DEV_HD, ATA_LBA |
1028 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
1029 ide_outb(device, ATA_COMMAND, ATA_CMD_READ);
1035 /* may take up to 4 sec */
1036 c = ide_wait(device, IDE_SPIN_UP_TIME_OUT);
1039 /* can't take over 500 ms */
1040 c = ide_wait(device, IDE_TIME_OUT);
1043 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
1045 printf("Error (no IRQ) dev %d blk " LBAF
1046 ": status %#02x\n", device, blknr, c);
1050 ide_input_data(device, buffer, ATA_SECTORWORDS);
1051 (void) ide_inb(device, ATA_STATUS); /* clear IRQ */
1055 buffer += ATA_BLOCKSIZE;
1062 ulong ide_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
1065 ulong ide_write(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
1070 struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
1072 int device = block_dev->devnum;
1077 unsigned char lba48 = 0;
1079 if (blknr & 0x0000fffff0000000ULL) {
1080 /* more than 28 bits used, use 48bit mode */
1087 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1089 while (blkcnt-- > 0) {
1090 c = ide_wait(device, IDE_TIME_OUT);
1092 if (c & ATA_STAT_BUSY) {
1093 printf("IDE read: device %d not ready\n", device);
1098 /* write high bits */
1099 ide_outb(device, ATA_SECT_CNT, 0);
1100 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1101 #ifdef CONFIG_SYS_64BIT_LBA
1102 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1103 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1105 ide_outb(device, ATA_LBA_MID, 0);
1106 ide_outb(device, ATA_LBA_HIGH, 0);
1110 ide_outb(device, ATA_SECT_CNT, 1);
1111 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1112 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1113 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1117 ide_outb(device, ATA_DEV_HD,
1118 ATA_LBA | ATA_DEVICE(device));
1119 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
1124 ide_outb(device, ATA_DEV_HD, ATA_LBA |
1125 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
1126 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE);
1131 /* can't take over 500 ms */
1132 c = ide_wait(device, IDE_TIME_OUT);
1134 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
1136 printf("Error (no IRQ) dev %d blk " LBAF
1137 ": status %#02x\n", device, blknr, c);
1141 ide_output_data(device, buffer, ATA_SECTORWORDS);
1142 c = ide_inb(device, ATA_STATUS); /* clear IRQ */
1145 buffer += ATA_BLOCKSIZE;
1151 #if defined(CONFIG_OF_IDE_FIXUP)
1152 int ide_device_present(int dev)
1154 if (dev >= CONFIG_SYS_IDE_MAXBUS)
1156 return ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1;
1161 static int ide_blk_probe(struct udevice *udev)
1163 struct blk_desc *desc = dev_get_uclass_platdata(udev);
1165 /* fill in device vendor/product/rev strings */
1166 strncpy(desc->vendor, ide_dev_desc[desc->devnum].vendor,
1168 desc->vendor[BLK_VEN_SIZE] = '\0';
1169 strncpy(desc->product, ide_dev_desc[desc->devnum].product,
1171 desc->product[BLK_PRD_SIZE] = '\0';
1172 strncpy(desc->revision, ide_dev_desc[desc->devnum].revision,
1174 desc->revision[BLK_REV_SIZE] = '\0';
1179 static const struct blk_ops ide_blk_ops = {
1184 U_BOOT_DRIVER(ide_blk) = {
1187 .ops = &ide_blk_ops,
1188 .probe = ide_blk_probe,
1191 static int ide_probe(struct udevice *udev)
1193 struct udevice *blk_dev;
1200 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; i++) {
1201 if (ide_dev_desc[i].type != DEV_TYPE_UNKNOWN) {
1202 sprintf(name, "blk#%d", i);
1204 blksz = ide_dev_desc[i].blksz;
1205 size = blksz * ide_dev_desc[i].lba;
1208 * With CDROM, if there is no CD inserted, blksz will
1209 * be zero, don't bother to create IDE block device.
1213 ret = blk_create_devicef(udev, "ide_blk", name,
1215 blksz, size, &blk_dev);
1224 U_BOOT_DRIVER(ide) = {
1230 struct pci_device_id ide_supported[] = {
1231 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_IDE << 8, 0xffff00) },
1235 U_BOOT_PCI_DEVICE(ide, ide_supported);
1237 UCLASS_DRIVER(ide) = {
1242 U_BOOT_LEGACY_BLK(ide) = {
1243 .if_typename = "ide",
1244 .if_type = IF_TYPE_IDE,
1245 .max_devs = CONFIG_SYS_IDE_MAXDEVICE,
1246 .desc = ide_dev_desc,