1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2000-2011
4 * Wolfgang Denk, DENX Software Engineering, wd@denx.de.
17 # define EIEIO __asm__ volatile ("eieio")
18 # define SYNC __asm__ volatile ("sync")
20 # define EIEIO /* nothing */
21 # define SYNC /* nothing */
24 /* Current offset for IDE0 / IDE1 bus access */
25 ulong ide_bus_offset[CONFIG_SYS_IDE_MAXBUS] = {
26 #if defined(CONFIG_SYS_ATA_IDE0_OFFSET)
27 CONFIG_SYS_ATA_IDE0_OFFSET,
29 #if defined(CONFIG_SYS_ATA_IDE1_OFFSET) && (CONFIG_SYS_IDE_MAXBUS > 1)
30 CONFIG_SYS_ATA_IDE1_OFFSET,
34 static int ide_bus_ok[CONFIG_SYS_IDE_MAXBUS];
36 struct blk_desc ide_dev_desc[CONFIG_SYS_IDE_MAXDEVICE];
38 #define IDE_TIME_OUT 2000 /* 2 sec timeout */
40 #define ATAPI_TIME_OUT 7000 /* 7 sec timeout (5 sec seems to work...) */
42 #define IDE_SPIN_UP_TIME_OUT 5000 /* 5 sec spin-up timeout */
44 #ifndef CONFIG_SYS_ATA_PORT_ADDR
45 #define CONFIG_SYS_ATA_PORT_ADDR(port) (port)
48 #ifdef CONFIG_IDE_RESET
49 extern void ide_set_reset(int idereset);
51 static void ide_reset(void)
55 for (i = 0; i < CONFIG_SYS_IDE_MAXBUS; ++i)
57 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i)
58 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
60 ide_set_reset(1); /* assert reset */
62 /* the reset signal shall be asserted for et least 25 us */
67 /* de-assert RESET signal */
71 for (i = 0; i < 250; ++i)
75 #define ide_reset() /* dummy */
76 #endif /* CONFIG_IDE_RESET */
79 * Wait until Busy bit is off, or timeout (in ms)
82 static uchar ide_wait(int dev, ulong t)
84 ulong delay = 10 * t; /* poll every 100 us */
87 while ((c = ide_inb(dev, ATA_STATUS)) & ATA_STAT_BUSY) {
96 * copy src to dest, skipping leading and trailing blanks and null
97 * terminate the string
98 * "len" is the size of available memory including the terminating '\0'
100 static void ident_cpy(unsigned char *dst, unsigned char *src,
103 unsigned char *end, *last;
108 /* reserve space for '\0' */
112 /* skip leading white space */
113 while ((*src) && (src < end) && (*src == ' '))
116 /* copy string, omitting trailing white space */
117 while ((*src) && (src < end)) {
127 /****************************************************************************
131 #if defined(CONFIG_IDE_SWAP_IO)
132 /* since ATAPI may use commands with not 4 bytes alligned length
133 * we have our own transfer functions, 2 bytes alligned */
134 __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
137 volatile ushort *pbuf;
139 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
140 dbuf = (ushort *)sect_buf;
142 debug("in output data shorts base for read is %lx\n",
143 (unsigned long) pbuf);
151 __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
154 volatile ushort *pbuf;
156 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
157 dbuf = (ushort *)sect_buf;
159 debug("in input data shorts base for read is %lx\n",
160 (unsigned long) pbuf);
168 #else /* ! CONFIG_IDE_SWAP_IO */
169 __weak void ide_output_data_shorts(int dev, ushort *sect_buf, int shorts)
171 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
174 __weak void ide_input_data_shorts(int dev, ushort *sect_buf, int shorts)
176 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, shorts);
179 #endif /* CONFIG_IDE_SWAP_IO */
182 * Wait until (Status & mask) == res, or timeout (in ms)
184 * This is used since some ATAPI CD ROMs clears their Busy Bit first
185 * and then they set their DRQ Bit
187 static uchar atapi_wait_mask(int dev, ulong t, uchar mask, uchar res)
189 ulong delay = 10 * t; /* poll every 100 us */
192 /* prevents to read the status before valid */
193 c = ide_inb(dev, ATA_DEV_CTL);
195 while (((c = ide_inb(dev, ATA_STATUS)) & mask) != res) {
196 /* break if error occurs (doesn't make sense to wait more) */
197 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR)
207 * issue an atapi command
209 unsigned char atapi_issue(int device, unsigned char *ccb, int ccblen,
210 unsigned char *buffer, int buflen)
212 unsigned char c, err, mask, res;
217 mask = ATA_STAT_BUSY | ATA_STAT_DRQ;
219 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
220 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
221 if ((c & mask) != res) {
222 printf("ATAPI_ISSUE: device %d not ready status %X\n", device,
228 ide_outb(device, ATA_ERROR_REG, 0); /* no DMA, no overlaped */
229 ide_outb(device, ATA_SECT_CNT, 0);
230 ide_outb(device, ATA_SECT_NUM, 0);
231 ide_outb(device, ATA_CYL_LOW, (unsigned char) (buflen & 0xFF));
232 ide_outb(device, ATA_CYL_HIGH,
233 (unsigned char) ((buflen >> 8) & 0xFF));
234 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
236 ide_outb(device, ATA_COMMAND, ATA_CMD_PACKET);
239 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
241 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
243 if ((c & mask) != res) { /* DRQ must be 1, BSY 0 */
244 printf("ATAPI_ISSUE: Error (no IRQ) before sending ccb dev %d status 0x%02x\n",
250 /* write command block */
251 ide_output_data_shorts(device, (unsigned short *)ccb, ccblen / 2);
253 /* ATAPI Command written wait for completition */
254 udelay(5000); /* device must set bsy */
256 mask = ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR;
258 * if no data wait for DRQ = 0 BSY = 0
259 * if data wait for DRQ = 1 BSY = 0
264 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
265 if ((c & mask) != res) {
266 if (c & ATA_STAT_ERR) {
267 err = (ide_inb(device, ATA_ERROR_REG)) >> 4;
268 debug("atapi_issue 1 returned sense key %X status %02X\n",
271 printf("ATAPI_ISSUE: (no DRQ) after sending ccb (%x) status 0x%02x\n",
277 n = ide_inb(device, ATA_CYL_HIGH);
279 n += ide_inb(device, ATA_CYL_LOW);
281 printf("ERROR, transfer bytes %d requested only %d\n", n,
286 if ((n == 0) && (buflen < 0)) {
287 printf("ERROR, transfer bytes %d requested %d\n", n, buflen);
292 debug("WARNING, transfer bytes %d not equal with requested %d\n",
295 if (n != 0) { /* data transfer */
296 debug("ATAPI_ISSUE: %d Bytes to transfer\n", n);
297 /* we transfer shorts */
299 /* ok now decide if it is an in or output */
300 if ((ide_inb(device, ATA_SECT_CNT) & 0x02) == 0) {
301 debug("Write to device\n");
302 ide_output_data_shorts(device, (unsigned short *)buffer,
305 debug("Read from device @ %p shorts %d\n", buffer, n);
306 ide_input_data_shorts(device, (unsigned short *)buffer,
310 udelay(5000); /* seems that some CD ROMs need this... */
311 mask = ATA_STAT_BUSY | ATA_STAT_ERR;
313 c = atapi_wait_mask(device, ATAPI_TIME_OUT, mask, res);
314 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
315 err = (ide_inb(device, ATA_ERROR_REG) >> 4);
316 debug("atapi_issue 2 returned sense key %X status %X\n", err,
326 * sending the command to atapi_issue. If an status other than good
327 * returns, an request_sense will be issued
330 #define ATAPI_DRIVE_NOT_READY 100
331 #define ATAPI_UNIT_ATTN 10
333 unsigned char atapi_issue_autoreq(int device,
336 unsigned char *buffer, int buflen)
338 unsigned char sense_data[18], sense_ccb[12];
339 unsigned char res, key, asc, ascq;
340 int notready, unitattn;
342 unitattn = ATAPI_UNIT_ATTN;
343 notready = ATAPI_DRIVE_NOT_READY;
346 res = atapi_issue(device, ccb, ccblen, buffer, buflen);
351 return 0xFF; /* error */
353 debug("(auto_req)atapi_issue returned sense key %X\n", res);
355 memset(sense_ccb, 0, sizeof(sense_ccb));
356 memset(sense_data, 0, sizeof(sense_data));
357 sense_ccb[0] = ATAPI_CMD_REQ_SENSE;
358 sense_ccb[4] = 18; /* allocation Length */
360 res = atapi_issue(device, sense_ccb, 12, sense_data, 18);
361 key = (sense_data[2] & 0xF);
362 asc = (sense_data[12]);
363 ascq = (sense_data[13]);
365 debug("ATAPI_CMD_REQ_SENSE returned %x\n", res);
366 debug(" Sense page: %02X key %02X ASC %02X ASCQ %02X\n",
367 sense_data[0], key, asc, ascq);
370 return 0; /* ok device ready */
372 if ((key == 6) || (asc == 0x29) || (asc == 0x28)) { /* Unit Attention */
373 if (unitattn-- > 0) {
377 printf("Unit Attention, tried %d\n", ATAPI_UNIT_ATTN);
380 if ((asc == 0x4) && (ascq == 0x1)) {
381 /* not ready, but will be ready soon */
382 if (notready-- > 0) {
386 printf("Drive not ready, tried %d times\n",
387 ATAPI_DRIVE_NOT_READY);
391 debug("Media not present\n");
395 printf("ERROR: Unknown Sense key %02X ASC %02X ASCQ %02X\n", key, asc,
398 debug("ERROR Sense key %02X ASC %02X ASCQ %02X\n", key, asc, ascq);
404 * we transfer only one block per command, since the multiple DRQ per
405 * command is not yet implemented
407 #define ATAPI_READ_MAX_BYTES 2048 /* we read max 2kbytes */
408 #define ATAPI_READ_BLOCK_SIZE 2048 /* assuming CD part */
409 #define ATAPI_READ_MAX_BLOCK (ATAPI_READ_MAX_BYTES/ATAPI_READ_BLOCK_SIZE)
411 ulong atapi_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
414 int device = block_dev->devnum;
416 unsigned char ccb[12]; /* Command descriptor block */
419 debug("atapi_read dev %d start " LBAF " blocks " LBAF
420 " buffer at %lX\n", device, blknr, blkcnt, (ulong) buffer);
423 if (blkcnt > ATAPI_READ_MAX_BLOCK)
424 cnt = ATAPI_READ_MAX_BLOCK;
428 ccb[0] = ATAPI_CMD_READ_12;
429 ccb[1] = 0; /* reserved */
430 ccb[2] = (unsigned char) (blknr >> 24) & 0xFF; /* MSB Block */
431 ccb[3] = (unsigned char) (blknr >> 16) & 0xFF; /* */
432 ccb[4] = (unsigned char) (blknr >> 8) & 0xFF;
433 ccb[5] = (unsigned char) blknr & 0xFF; /* LSB Block */
434 ccb[6] = (unsigned char) (cnt >> 24) & 0xFF; /* MSB Block cnt */
435 ccb[7] = (unsigned char) (cnt >> 16) & 0xFF;
436 ccb[8] = (unsigned char) (cnt >> 8) & 0xFF;
437 ccb[9] = (unsigned char) cnt & 0xFF; /* LSB Block */
438 ccb[10] = 0; /* reserved */
439 ccb[11] = 0; /* reserved */
441 if (atapi_issue_autoreq(device, ccb, 12,
442 (unsigned char *)buffer,
443 cnt * ATAPI_READ_BLOCK_SIZE)
450 buffer += (cnt * ATAPI_READ_BLOCK_SIZE);
451 } while (blkcnt > 0);
455 static void atapi_inquiry(struct blk_desc *dev_desc)
457 unsigned char ccb[12]; /* Command descriptor block */
458 unsigned char iobuf[64]; /* temp buf */
462 device = dev_desc->devnum;
463 dev_desc->type = DEV_TYPE_UNKNOWN; /* not yet valid */
465 dev_desc->block_read = atapi_read;
468 memset(ccb, 0, sizeof(ccb));
469 memset(iobuf, 0, sizeof(iobuf));
471 ccb[0] = ATAPI_CMD_INQUIRY;
472 ccb[4] = 40; /* allocation Legnth */
473 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 40);
475 debug("ATAPI_CMD_INQUIRY returned %x\n", c);
479 /* copy device ident strings */
480 ident_cpy((unsigned char *)dev_desc->vendor, &iobuf[8], 8);
481 ident_cpy((unsigned char *)dev_desc->product, &iobuf[16], 16);
482 ident_cpy((unsigned char *)dev_desc->revision, &iobuf[32], 5);
487 dev_desc->log2blksz = LOG2_INVALID(typeof(dev_desc->log2blksz));
488 dev_desc->type = iobuf[0] & 0x1f;
490 if ((iobuf[1] & 0x80) == 0x80)
491 dev_desc->removable = 1;
493 dev_desc->removable = 0;
495 memset(ccb, 0, sizeof(ccb));
496 memset(iobuf, 0, sizeof(iobuf));
497 ccb[0] = ATAPI_CMD_START_STOP;
498 ccb[4] = 0x03; /* start */
500 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
502 debug("ATAPI_CMD_START_STOP returned %x\n", c);
506 memset(ccb, 0, sizeof(ccb));
507 memset(iobuf, 0, sizeof(iobuf));
508 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 0);
510 debug("ATAPI_CMD_UNIT_TEST_READY returned %x\n", c);
514 memset(ccb, 0, sizeof(ccb));
515 memset(iobuf, 0, sizeof(iobuf));
516 ccb[0] = ATAPI_CMD_READ_CAP;
517 c = atapi_issue_autoreq(device, ccb, 12, (unsigned char *)iobuf, 8);
518 debug("ATAPI_CMD_READ_CAP returned %x\n", c);
522 debug("Read Cap: LBA %02X%02X%02X%02X blksize %02X%02X%02X%02X\n",
523 iobuf[0], iobuf[1], iobuf[2], iobuf[3],
524 iobuf[4], iobuf[5], iobuf[6], iobuf[7]);
526 dev_desc->lba = ((unsigned long) iobuf[0] << 24) +
527 ((unsigned long) iobuf[1] << 16) +
528 ((unsigned long) iobuf[2] << 8) + ((unsigned long) iobuf[3]);
529 dev_desc->blksz = ((unsigned long) iobuf[4] << 24) +
530 ((unsigned long) iobuf[5] << 16) +
531 ((unsigned long) iobuf[6] << 8) + ((unsigned long) iobuf[7]);
532 dev_desc->log2blksz = LOG2(dev_desc->blksz);
534 /* ATAPI devices cannot use 48bit addressing (ATA/ATAPI v7) */
540 #endif /* CONFIG_ATAPI */
542 static void ide_ident(struct blk_desc *dev_desc)
552 device = dev_desc->devnum;
553 printf(" Device %d: ", device);
557 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
558 dev_desc->if_type = IF_TYPE_IDE;
563 /* Warning: This will be tricky to read */
564 while (retries <= 1) {
565 /* check signature */
566 if ((ide_inb(device, ATA_SECT_CNT) == 0x01) &&
567 (ide_inb(device, ATA_SECT_NUM) == 0x01) &&
568 (ide_inb(device, ATA_CYL_LOW) == 0x14) &&
569 (ide_inb(device, ATA_CYL_HIGH) == 0xEB)) {
570 /* ATAPI Signature found */
571 dev_desc->if_type = IF_TYPE_ATAPI;
573 * Start Ident Command
575 ide_outb(device, ATA_COMMAND, ATA_CMD_ID_ATAPI);
577 * Wait for completion - ATAPI devices need more time
580 c = ide_wait(device, ATAPI_TIME_OUT);
585 * Start Ident Command
587 ide_outb(device, ATA_COMMAND, ATA_CMD_ID_ATA);
590 * Wait for completion
592 c = ide_wait(device, IDE_TIME_OUT);
595 if (((c & ATA_STAT_DRQ) == 0) ||
596 ((c & (ATA_STAT_FAULT | ATA_STAT_ERR)) != 0)) {
600 * Need to soft reset the device
601 * in case it's an ATAPI...
603 debug("Retrying...\n");
604 ide_outb(device, ATA_DEV_HD,
605 ATA_LBA | ATA_DEVICE(device));
607 ide_outb(device, ATA_COMMAND, 0x08);
608 udelay(500000); /* 500 ms */
613 ide_outb(device, ATA_DEV_HD,
614 ATA_LBA | ATA_DEVICE(device));
623 } /* see above - ugly to read */
625 if (retries == 2) /* Not found */
629 ide_input_swap_data(device, (ulong *)&iop, ATA_SECTORWORDS);
631 ident_cpy((unsigned char *)dev_desc->revision, iop.fw_rev,
632 sizeof(dev_desc->revision));
633 ident_cpy((unsigned char *)dev_desc->vendor, iop.model,
634 sizeof(dev_desc->vendor));
635 ident_cpy((unsigned char *)dev_desc->product, iop.serial_no,
636 sizeof(dev_desc->product));
637 #ifdef __LITTLE_ENDIAN
639 * firmware revision, model, and serial number have Big Endian Byte
640 * order in Word. Convert all three to little endian.
642 * See CF+ and CompactFlash Specification Revision 2.0:
643 * 6.2.1.6: Identify Drive, Table 39 for more details
646 strswab(dev_desc->revision);
647 strswab(dev_desc->vendor);
648 strswab(dev_desc->product);
649 #endif /* __LITTLE_ENDIAN */
651 if ((iop.config & 0x0080) == 0x0080)
652 dev_desc->removable = 1;
654 dev_desc->removable = 0;
657 if (dev_desc->if_type == IF_TYPE_ATAPI) {
658 atapi_inquiry(dev_desc);
661 #endif /* CONFIG_ATAPI */
665 dev_desc->lba = (iop.lba_capacity << 16) | (iop.lba_capacity >> 16);
666 #else /* ! __BIG_ENDIAN */
668 * do not swap shorts on little endian
670 * See CF+ and CompactFlash Specification Revision 2.0:
671 * 6.2.1.6: Identfy Drive, Table 39, Word Address 57-58 for details.
673 dev_desc->lba = iop.lba_capacity;
674 #endif /* __BIG_ENDIAN */
677 if (iop.command_set_2 & 0x0400) { /* LBA 48 support */
679 dev_desc->lba = (unsigned long long) iop.lba48_capacity[0] |
680 ((unsigned long long) iop.lba48_capacity[1] << 16) |
681 ((unsigned long long) iop.lba48_capacity[2] << 32) |
682 ((unsigned long long) iop.lba48_capacity[3] << 48);
686 #endif /* CONFIG_LBA48 */
688 dev_desc->type = DEV_TYPE_HARDDISK;
689 dev_desc->blksz = ATA_BLOCKSIZE;
690 dev_desc->log2blksz = LOG2(dev_desc->blksz);
691 dev_desc->lun = 0; /* just to fill something in... */
693 #if 0 /* only used to test the powersaving mode,
694 * if enabled, the drive goes after 5 sec
696 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
697 c = ide_wait(device, IDE_TIME_OUT);
698 ide_outb(device, ATA_SECT_CNT, 1);
699 ide_outb(device, ATA_LBA_LOW, 0);
700 ide_outb(device, ATA_LBA_MID, 0);
701 ide_outb(device, ATA_LBA_HIGH, 0);
702 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
703 ide_outb(device, ATA_COMMAND, 0xe3);
705 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
709 __weak void ide_outb(int dev, int port, unsigned char val)
711 debug("ide_outb (dev= %d, port= 0x%x, val= 0x%02x) : @ 0x%08lx\n",
713 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
715 #if defined(CONFIG_IDE_AHB)
718 ide_write_register(dev, port, val);
721 outb(val, (ATA_CURR_BASE(dev)));
724 outb(val, (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
728 __weak unsigned char ide_inb(int dev, int port)
732 #if defined(CONFIG_IDE_AHB)
733 val = ide_read_register(dev, port);
735 val = inb((ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)));
738 debug("ide_inb (dev= %d, port= 0x%x) : @ 0x%08lx -> 0x%02x\n",
740 (ATA_CURR_BASE(dev) + CONFIG_SYS_ATA_PORT_ADDR(port)), val);
749 #ifdef CONFIG_IDE_PREINIT
753 puts("ide_preinit failed\n");
756 #endif /* CONFIG_IDE_PREINIT */
760 /* ATAPI Drives seems to need a proper IDE Reset */
764 * Wait for IDE to get ready.
765 * According to spec, this can take up to 31 seconds!
767 for (bus = 0; bus < CONFIG_SYS_IDE_MAXBUS; ++bus) {
769 bus * (CONFIG_SYS_IDE_MAXDEVICE /
770 CONFIG_SYS_IDE_MAXBUS);
772 printf("Bus %d: ", bus);
778 udelay(100000); /* 100 ms */
779 ide_outb(dev, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(dev));
780 udelay(100000); /* 100 ms */
783 udelay(10000); /* 10 ms */
785 c = ide_inb(dev, ATA_STATUS);
787 if (i > (ATA_RESET_TIME * 100)) {
788 puts("** Timeout **\n");
791 if ((i >= 100) && ((i % 100) == 0))
794 } while (c & ATA_STAT_BUSY);
796 if (c & (ATA_STAT_BUSY | ATA_STAT_FAULT)) {
797 puts("not available ");
798 debug("Status = 0x%02X ", c);
799 #ifndef CONFIG_ATAPI /* ATAPI Devices do not set DRDY */
800 } else if ((c & ATA_STAT_READY) == 0) {
801 puts("not available ");
802 debug("Status = 0x%02X ", c);
813 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; ++i) {
814 ide_dev_desc[i].type = DEV_TYPE_UNKNOWN;
815 ide_dev_desc[i].if_type = IF_TYPE_IDE;
816 ide_dev_desc[i].devnum = i;
817 ide_dev_desc[i].part_type = PART_TYPE_UNKNOWN;
818 ide_dev_desc[i].blksz = 0;
819 ide_dev_desc[i].log2blksz =
820 LOG2_INVALID(typeof(ide_dev_desc[i].log2blksz));
821 ide_dev_desc[i].lba = 0;
823 ide_dev_desc[i].block_read = ide_read;
824 ide_dev_desc[i].block_write = ide_write;
826 if (!ide_bus_ok[IDE_BUS(i)])
828 ide_ident(&ide_dev_desc[i]);
829 dev_print(&ide_dev_desc[i]);
832 if ((ide_dev_desc[i].lba > 0) && (ide_dev_desc[i].blksz > 0)) {
833 /* initialize partition type */
834 part_init(&ide_dev_desc[i]);
843 uclass_first_device(UCLASS_IDE, &dev);
847 /* We only need to swap data if we are running on a big endian cpu. */
848 #if defined(__LITTLE_ENDIAN)
849 __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
851 ide_input_data(dev, sect_buf, words);
854 __weak void ide_input_swap_data(int dev, ulong *sect_buf, int words)
856 volatile ushort *pbuf =
857 (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
858 ushort *dbuf = (ushort *)sect_buf;
860 debug("in input swap data base for read is %lx\n",
861 (unsigned long) pbuf);
865 *dbuf++ = swab16p((u16 *)pbuf);
866 *dbuf++ = swab16p((u16 *)pbuf);
868 *dbuf++ = ld_le16(pbuf);
869 *dbuf++ = ld_le16(pbuf);
873 #endif /* __LITTLE_ENDIAN */
876 #if defined(CONFIG_IDE_SWAP_IO)
877 __weak void ide_output_data(int dev, const ulong *sect_buf, int words)
880 volatile ushort *pbuf;
882 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
883 dbuf = (ushort *)sect_buf;
891 #else /* ! CONFIG_IDE_SWAP_IO */
892 __weak void ide_output_data(int dev, const ulong *sect_buf, int words)
894 #if defined(CONFIG_IDE_AHB)
895 ide_write_data(dev, sect_buf, words);
897 outsw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
900 #endif /* CONFIG_IDE_SWAP_IO */
902 #if defined(CONFIG_IDE_SWAP_IO)
903 __weak void ide_input_data(int dev, ulong *sect_buf, int words)
906 volatile ushort *pbuf;
908 pbuf = (ushort *)(ATA_CURR_BASE(dev) + ATA_DATA_REG);
909 dbuf = (ushort *)sect_buf;
911 debug("in input data base for read is %lx\n", (unsigned long) pbuf);
920 #else /* ! CONFIG_IDE_SWAP_IO */
921 __weak void ide_input_data(int dev, ulong *sect_buf, int words)
923 #if defined(CONFIG_IDE_AHB)
924 ide_read_data(dev, sect_buf, words);
926 insw(ATA_CURR_BASE(dev) + ATA_DATA_REG, sect_buf, words << 1);
930 #endif /* CONFIG_IDE_SWAP_IO */
933 ulong ide_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
936 ulong ide_read(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
941 struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
943 int device = block_dev->devnum;
946 unsigned char pwrsave = 0; /* power save */
949 unsigned char lba48 = 0;
951 if (blknr & 0x0000fffff0000000ULL) {
952 /* more than 28 bits used, use 48bit mode */
956 debug("ide_read dev %d start " LBAF ", blocks " LBAF " buffer at %lX\n",
957 device, blknr, blkcnt, (ulong) buffer);
961 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
962 c = ide_wait(device, IDE_TIME_OUT);
964 if (c & ATA_STAT_BUSY) {
965 printf("IDE read: device %d not ready\n", device);
969 /* first check if the drive is in Powersaving mode, if yes,
970 * increase the timeout value */
971 ide_outb(device, ATA_COMMAND, ATA_CMD_CHK_POWER);
974 c = ide_wait(device, IDE_TIME_OUT); /* can't take over 500 ms */
976 if (c & ATA_STAT_BUSY) {
977 printf("IDE read: device %d not ready\n", device);
980 if ((c & ATA_STAT_ERR) == ATA_STAT_ERR) {
981 printf("No Powersaving mode %X\n", c);
983 c = ide_inb(device, ATA_SECT_CNT);
984 debug("Powersaving %02X\n", c);
990 while (blkcnt-- > 0) {
991 c = ide_wait(device, IDE_TIME_OUT);
993 if (c & ATA_STAT_BUSY) {
994 printf("IDE read: device %d not ready\n", device);
999 /* write high bits */
1000 ide_outb(device, ATA_SECT_CNT, 0);
1001 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1002 #ifdef CONFIG_SYS_64BIT_LBA
1003 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1004 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1006 ide_outb(device, ATA_LBA_MID, 0);
1007 ide_outb(device, ATA_LBA_HIGH, 0);
1011 ide_outb(device, ATA_SECT_CNT, 1);
1012 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1013 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1014 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1018 ide_outb(device, ATA_DEV_HD,
1019 ATA_LBA | ATA_DEVICE(device));
1020 ide_outb(device, ATA_COMMAND, ATA_CMD_READ_EXT);
1025 ide_outb(device, ATA_DEV_HD, ATA_LBA |
1026 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
1027 ide_outb(device, ATA_COMMAND, ATA_CMD_READ);
1033 /* may take up to 4 sec */
1034 c = ide_wait(device, IDE_SPIN_UP_TIME_OUT);
1037 /* can't take over 500 ms */
1038 c = ide_wait(device, IDE_TIME_OUT);
1041 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
1043 printf("Error (no IRQ) dev %d blk " LBAF
1044 ": status %#02x\n", device, blknr, c);
1048 ide_input_data(device, buffer, ATA_SECTORWORDS);
1049 (void) ide_inb(device, ATA_STATUS); /* clear IRQ */
1053 buffer += ATA_BLOCKSIZE;
1060 ulong ide_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
1063 ulong ide_write(struct blk_desc *block_dev, lbaint_t blknr, lbaint_t blkcnt,
1068 struct blk_desc *block_dev = dev_get_uclass_platdata(dev);
1070 int device = block_dev->devnum;
1075 unsigned char lba48 = 0;
1077 if (blknr & 0x0000fffff0000000ULL) {
1078 /* more than 28 bits used, use 48bit mode */
1085 ide_outb(device, ATA_DEV_HD, ATA_LBA | ATA_DEVICE(device));
1087 while (blkcnt-- > 0) {
1088 c = ide_wait(device, IDE_TIME_OUT);
1090 if (c & ATA_STAT_BUSY) {
1091 printf("IDE read: device %d not ready\n", device);
1096 /* write high bits */
1097 ide_outb(device, ATA_SECT_CNT, 0);
1098 ide_outb(device, ATA_LBA_LOW, (blknr >> 24) & 0xFF);
1099 #ifdef CONFIG_SYS_64BIT_LBA
1100 ide_outb(device, ATA_LBA_MID, (blknr >> 32) & 0xFF);
1101 ide_outb(device, ATA_LBA_HIGH, (blknr >> 40) & 0xFF);
1103 ide_outb(device, ATA_LBA_MID, 0);
1104 ide_outb(device, ATA_LBA_HIGH, 0);
1108 ide_outb(device, ATA_SECT_CNT, 1);
1109 ide_outb(device, ATA_LBA_LOW, (blknr >> 0) & 0xFF);
1110 ide_outb(device, ATA_LBA_MID, (blknr >> 8) & 0xFF);
1111 ide_outb(device, ATA_LBA_HIGH, (blknr >> 16) & 0xFF);
1115 ide_outb(device, ATA_DEV_HD,
1116 ATA_LBA | ATA_DEVICE(device));
1117 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE_EXT);
1122 ide_outb(device, ATA_DEV_HD, ATA_LBA |
1123 ATA_DEVICE(device) | ((blknr >> 24) & 0xF));
1124 ide_outb(device, ATA_COMMAND, ATA_CMD_WRITE);
1129 /* can't take over 500 ms */
1130 c = ide_wait(device, IDE_TIME_OUT);
1132 if ((c & (ATA_STAT_DRQ | ATA_STAT_BUSY | ATA_STAT_ERR)) !=
1134 printf("Error (no IRQ) dev %d blk " LBAF
1135 ": status %#02x\n", device, blknr, c);
1139 ide_output_data(device, buffer, ATA_SECTORWORDS);
1140 c = ide_inb(device, ATA_STATUS); /* clear IRQ */
1143 buffer += ATA_BLOCKSIZE;
1149 #if defined(CONFIG_OF_IDE_FIXUP)
1150 int ide_device_present(int dev)
1152 if (dev >= CONFIG_SYS_IDE_MAXBUS)
1154 return ide_dev_desc[dev].type == DEV_TYPE_UNKNOWN ? 0 : 1;
1159 static int ide_blk_probe(struct udevice *udev)
1161 struct blk_desc *desc = dev_get_uclass_platdata(udev);
1163 /* fill in device vendor/product/rev strings */
1164 strncpy(desc->vendor, ide_dev_desc[desc->devnum].vendor,
1166 desc->vendor[BLK_VEN_SIZE] = '\0';
1167 strncpy(desc->product, ide_dev_desc[desc->devnum].product,
1169 desc->product[BLK_PRD_SIZE] = '\0';
1170 strncpy(desc->revision, ide_dev_desc[desc->devnum].revision,
1172 desc->revision[BLK_REV_SIZE] = '\0';
1177 static const struct blk_ops ide_blk_ops = {
1182 U_BOOT_DRIVER(ide_blk) = {
1185 .ops = &ide_blk_ops,
1186 .probe = ide_blk_probe,
1189 static int ide_probe(struct udevice *udev)
1191 struct udevice *blk_dev;
1198 for (i = 0; i < CONFIG_SYS_IDE_MAXDEVICE; i++) {
1199 if (ide_dev_desc[i].type != DEV_TYPE_UNKNOWN) {
1200 sprintf(name, "blk#%d", i);
1202 blksz = ide_dev_desc[i].blksz;
1203 size = blksz * ide_dev_desc[i].lba;
1206 * With CDROM, if there is no CD inserted, blksz will
1207 * be zero, don't bother to create IDE block device.
1211 ret = blk_create_devicef(udev, "ide_blk", name,
1213 blksz, size, &blk_dev);
1222 U_BOOT_DRIVER(ide) = {
1228 struct pci_device_id ide_supported[] = {
1229 { PCI_DEVICE_CLASS(PCI_CLASS_STORAGE_IDE << 8, 0xffff00) },
1233 U_BOOT_PCI_DEVICE(ide, ide_supported);
1235 UCLASS_DRIVER(ide) = {
1240 U_BOOT_LEGACY_BLK(ide) = {
1241 .if_typename = "ide",
1242 .if_type = IF_TYPE_IDE,
1243 .max_devs = CONFIG_SYS_IDE_MAXDEVICE,
1244 .desc = ide_dev_desc,