2 * Copyright (C) 2008 Freescale Semiconductor, Inc.
3 * Dave Liu <daveliu@freescale.com>
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License as
7 * published by the Free Software Foundation; either version 2 of
8 * the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
29 extern block_dev_desc_t sata_dev_desc[CFG_SATA_MAX_DEVICE];
31 #ifndef CFG_SATA1_FLAGS
32 #define CFG_SATA1_FLAGS FLAGS_DMA
34 #ifndef CFG_SATA2_FLAGS
35 #define CFG_SATA2_FLAGS FLAGS_DMA
38 static struct fsl_sata_info fsl_sata_info[] = {
40 {CFG_SATA1, CFG_SATA1_FLAGS},
45 {CFG_SATA2, CFG_SATA2_FLAGS},
51 static inline void mdelay(unsigned long msec)
54 for (i = 0; i < msec; i++)
58 static inline void sdelay(unsigned long sec)
61 for (i = 0; i < sec; i++)
65 void dprint_buffer(unsigned char *buf, int len)
73 for (i = 0; i < len; i++) {
74 printf("%02x ", *buf++);
84 static void fsl_sata_dump_sfis(struct sfis *s)
86 printf("Status FIS dump:\n\r");
87 printf("fis_type: %02x\n\r", s->fis_type);
88 printf("pm_port_i: %02x\n\r", s->pm_port_i);
89 printf("status: %02x\n\r", s->status);
90 printf("error: %02x\n\r", s->error);
91 printf("lba_low: %02x\n\r", s->lba_low);
92 printf("lba_mid: %02x\n\r", s->lba_mid);
93 printf("lba_high: %02x\n\r", s->lba_high);
94 printf("device: %02x\n\r", s->device);
95 printf("lba_low_exp: %02x\n\r", s->lba_low_exp);
96 printf("lba_mid_exp: %02x\n\r", s->lba_mid_exp);
97 printf("lba_high_exp: %02x\n\r", s->lba_high_exp);
98 printf("res1: %02x\n\r", s->res1);
99 printf("sector_count: %02x\n\r", s->sector_count);
100 printf("sector_count_exp: %02x\n\r", s->sector_count_exp);
103 static int ata_wait_register(volatile unsigned *addr, u32 mask,
104 u32 val, u32 timeout_msec)
109 for (i = 0; (((temp = in_le32(addr)) & mask) != val)
110 && i < timeout_msec; i++)
112 return (i < timeout_msec) ? 0 : -1;
115 int init_sata(int dev)
118 cmd_hdr_tbl_t *cmd_hdr;
126 if (dev < 0 || dev > (CFG_SATA_MAX_DEVICE - 1)) {
127 printf("the sata index %d is out of ranges\n\r", dev);
131 /* Allocate SATA device driver struct */
132 sata = (fsl_sata_t *)malloc(sizeof(fsl_sata_t));
134 printf("alloc the sata device struct failed\n\r");
137 /* Zero all of the device driver struct */
138 memset((void *)sata, 0, sizeof(fsl_sata_t));
140 /* Save the private struct to block device struct */
141 sata_dev_desc[dev].priv = (void *)sata;
143 sprintf(sata->name, "SATA%d", dev);
145 /* Set the controller register base address to device struct */
146 reg = (fsl_sata_reg_t *)(fsl_sata_info[dev].sata_reg_base);
147 sata->reg_base = reg;
149 /* Allocate the command header table, 4 bytes aligned */
150 length = sizeof(struct cmd_hdr_tbl);
151 align = SATA_HC_CMD_HDR_TBL_ALIGN;
152 sata->cmd_hdr_tbl_offset = (void *)malloc(length + align);
154 printf("alloc the command header failed\n\r");
158 cmd_hdr = (cmd_hdr_tbl_t *)(((u32)sata->cmd_hdr_tbl_offset + align)
160 sata->cmd_hdr = cmd_hdr;
162 /* Zero all of the command header table */
163 memset((void *)sata->cmd_hdr_tbl_offset, 0, length + align);
165 /* Allocate command descriptor for all command */
166 length = sizeof(struct cmd_desc) * SATA_HC_MAX_CMD;
167 align = SATA_HC_CMD_DESC_ALIGN;
168 sata->cmd_desc_offset = (void *)malloc(length + align);
169 if (!sata->cmd_desc_offset) {
170 printf("alloc the command descriptor failed\n\r");
173 sata->cmd_desc = (cmd_desc_t *)(((u32)sata->cmd_desc_offset + align)
175 /* Zero all of command descriptor */
176 memset((void *)sata->cmd_desc_offset, 0, length + align);
178 /* Link the command descriptor to command header */
179 for (i = 0; i < SATA_HC_MAX_CMD; i++) {
180 cda = ((u32)sata->cmd_desc + SATA_HC_CMD_DESC_SIZE * i)
181 & ~(CMD_HDR_CDA_ALIGN - 1);
182 cmd_hdr->cmd_slot[i].cda = cpu_to_le32(cda);
185 /* To have safe state, force the controller offline */
186 val32 = in_le32(®->hcontrol);
187 val32 &= ~HCONTROL_ONOFF;
188 val32 |= HCONTROL_FORCE_OFFLINE;
189 out_le32(®->hcontrol, val32);
191 /* Wait the controller offline */
192 ata_wait_register(®->hstatus, HSTATUS_ONOFF, 0, 1000);
194 /* Set the command header base address to CHBA register to tell DMA */
195 out_le32(®->chba, (u32)cmd_hdr & ~0x3);
197 /* Snoop for the command header */
198 val32 = in_le32(®->hcontrol);
199 val32 |= HCONTROL_HDR_SNOOP;
200 out_le32(®->hcontrol, val32);
202 /* Disable all of interrupts */
203 val32 = in_le32(®->hcontrol);
204 val32 &= ~HCONTROL_INT_EN_ALL;
205 out_le32(®->hcontrol, val32);
207 /* Clear all of interrupts */
208 val32 = in_le32(®->hstatus);
209 out_le32(®->hstatus, val32);
211 /* Set the ICC, no interrupt coalescing */
212 out_le32(®->icc, 0x01000000);
214 /* No PM attatched, the SATA device direct connect */
215 out_le32(®->cqpmp, 0);
217 /* Clear SError register */
218 val32 = in_le32(®->serror);
219 out_le32(®->serror, val32);
221 /* Clear CER register */
222 val32 = in_le32(®->cer);
223 out_le32(®->cer, val32);
225 /* Clear DER register */
226 val32 = in_le32(®->der);
227 out_le32(®->der, val32);
229 /* No device detection or initialization action requested */
230 out_le32(®->scontrol, 0x00000300);
232 /* Configure the transport layer, default value */
233 out_le32(®->transcfg, 0x08000016);
235 /* Configure the link layer, default value */
236 out_le32(®->linkcfg, 0x0000ff34);
238 /* Bring the controller online */
239 val32 = in_le32(®->hcontrol);
240 val32 |= HCONTROL_ONOFF;
241 out_le32(®->hcontrol, val32);
245 /* print sata device name */
247 printf("%s ", sata->name);
249 printf(" %s ", sata->name);
252 val32 = in_le32(®->hstatus);
253 if (val32 & HSTATUS_PHY_RDY) {
257 printf("(No RDY)\n\r");
261 if (val32 & HSTATUS_SIGNATURE) {
262 sig = in_le32(®->sig);
263 debug("Signature updated, the sig =%08x\n\r", sig);
264 sata->ata_device_type = ata_dev_classify(sig);
267 /* Check the speed */
268 val32 = in_le32(®->sstatus);
269 if ((val32 & SSTATUS_SPD_MASK) == SSTATUS_SPD_GEN1)
270 printf("(1.5 Gbps)\n\r");
271 else if ((val32 & SSTATUS_SPD_MASK) == SSTATUS_SPD_GEN2)
272 printf("(3 Gbps)\n\r");
277 /* Hardware reset, like Power-on and COMRESET */
278 void fsl_sata_hardware_reset(u32 reg_base)
280 fsl_sata_reg_t *reg = (fsl_sata_reg_t *)reg_base;
283 /* Disable the SATA interface and put PHY offline */
284 scontrol = in_le32(®->scontrol);
285 scontrol = (scontrol & 0x0f0) | 0x304;
286 out_le32(®->scontrol, scontrol);
288 /* No speed strict */
289 scontrol = in_le32(®->scontrol);
290 scontrol = scontrol & ~0x0f0;
291 out_le32(®->scontrol, scontrol);
293 /* Issue PHY wake/reset, Hardware_reset_asserted */
294 scontrol = in_le32(®->scontrol);
295 scontrol = (scontrol & 0x0f0) | 0x301;
296 out_le32(®->scontrol, scontrol);
300 /* Resume PHY, COMRESET negated, the device initialize hardware
301 * and execute diagnostics, send good status-signature to host,
302 * which is D2H register FIS, and then the device enter idle state.
304 scontrol = in_le32(®->scontrol);
305 scontrol = (scontrol & 0x0f0) | 0x300;
306 out_le32(®->scontrol, scontrol);
312 static void fsl_sata_dump_regs(fsl_sata_reg_t *reg)
314 printf("\n\rSATA: %08x\n\r", (u32)reg);
315 printf("CQR: %08x\n\r", in_le32(®->cqr));
316 printf("CAR: %08x\n\r", in_le32(®->car));
317 printf("CCR: %08x\n\r", in_le32(®->ccr));
318 printf("CER: %08x\n\r", in_le32(®->cer));
319 printf("CQR: %08x\n\r", in_le32(®->cqr));
320 printf("DER: %08x\n\r", in_le32(®->der));
321 printf("CHBA: %08x\n\r", in_le32(®->chba));
322 printf("HStatus: %08x\n\r", in_le32(®->hstatus));
323 printf("HControl: %08x\n\r", in_le32(®->hcontrol));
324 printf("CQPMP: %08x\n\r", in_le32(®->cqpmp));
325 printf("SIG: %08x\n\r", in_le32(®->sig));
326 printf("ICC: %08x\n\r", in_le32(®->icc));
327 printf("SStatus: %08x\n\r", in_le32(®->sstatus));
328 printf("SError: %08x\n\r", in_le32(®->serror));
329 printf("SControl: %08x\n\r", in_le32(®->scontrol));
330 printf("SNotification: %08x\n\r", in_le32(®->snotification));
331 printf("TransCfg: %08x\n\r", in_le32(®->transcfg));
332 printf("TransStatus: %08x\n\r", in_le32(®->transstatus));
333 printf("LinkCfg: %08x\n\r", in_le32(®->linkcfg));
334 printf("LinkCfg1: %08x\n\r", in_le32(®->linkcfg1));
335 printf("LinkCfg2: %08x\n\r", in_le32(®->linkcfg2));
336 printf("LinkStatus: %08x\n\r", in_le32(®->linkstatus));
337 printf("LinkStatus1: %08x\n\r", in_le32(®->linkstatus1));
338 printf("PhyCtrlCfg: %08x\n\r", in_le32(®->phyctrlcfg));
339 printf("SYSPR: %08x\n\r", in_be32(®->syspr));
342 static int fsl_ata_exec_ata_cmd(struct fsl_sata *sata, struct cfis *cfis,
343 int is_ncq, int tag, u8 *buffer, u32 len)
345 cmd_hdr_entry_t *cmd_hdr;
346 cmd_desc_t *cmd_desc;
353 fsl_sata_reg_t *reg = sata->reg_base;
356 /* Check xfer length */
357 if (len > SATA_HC_MAX_XFER_LEN) {
358 printf("max transfer length is 64MB\n\r");
362 /* Setup the command descriptor */
363 cmd_desc = sata->cmd_desc + tag;
365 /* Get the pointer cfis of command descriptor */
366 h2d = (sata_fis_h2d_t *)cmd_desc->cfis;
368 /* Zero the cfis of command descriptor */
369 memset((void *)h2d, 0, SATA_HC_CMD_DESC_CFIS_SIZE);
371 /* Copy the cfis from user to command descriptor */
372 h2d->fis_type = cfis->fis_type;
373 h2d->pm_port_c = cfis->pm_port_c;
374 h2d->command = cfis->command;
376 h2d->features = cfis->features;
377 h2d->features_exp = cfis->features_exp;
379 h2d->lba_low = cfis->lba_low;
380 h2d->lba_mid = cfis->lba_mid;
381 h2d->lba_high = cfis->lba_high;
382 h2d->lba_low_exp = cfis->lba_low_exp;
383 h2d->lba_mid_exp = cfis->lba_mid_exp;
384 h2d->lba_high_exp = cfis->lba_high_exp;
387 h2d->sector_count = cfis->sector_count;
388 h2d->sector_count_exp = cfis->sector_count_exp;
390 h2d->sector_count = (u8)(tag << 3);
393 h2d->device = cfis->device;
394 h2d->control = cfis->control;
396 /* Setup the PRD table */
397 prde = (prd_entry_t *)cmd_desc->prdt;
398 memset((void *)prde, 0, sizeof(struct prdt));
402 for (i = 0; i < SATA_HC_MAX_PRD_DIRECT; i++) {
405 prde->dba = cpu_to_le32((u32)buffer & ~0x3);
406 debug("dba = %08x\n\r", (u32)buffer);
408 if (len < PRD_ENTRY_MAX_XFER_SZ) {
409 ext_c_ddc = PRD_ENTRY_DATA_SNOOP | len;
410 debug("ext_c_ddc1 = %08x, len = %08x\n\r", ext_c_ddc, len);
411 prde->ext_c_ddc = cpu_to_le32(ext_c_ddc);
416 ext_c_ddc = PRD_ENTRY_DATA_SNOOP; /* 4M bytes */
417 debug("ext_c_ddc2 = %08x, len = %08x\n\r", ext_c_ddc, len);
418 prde->ext_c_ddc = cpu_to_le32(ext_c_ddc);
419 buffer += PRD_ENTRY_MAX_XFER_SZ;
420 len -= PRD_ENTRY_MAX_XFER_SZ;
426 /* Setup the command slot of cmd hdr */
427 cmd_hdr = (cmd_hdr_entry_t *)&sata->cmd_hdr->cmd_slot[tag];
429 cmd_hdr->cda = cpu_to_le32((u32)cmd_desc & ~0x3);
431 val32 = prde_count << CMD_HDR_PRD_ENTRY_SHIFT;
432 val32 |= sizeof(sata_fis_h2d_t);
433 cmd_hdr->prde_fis_len = cpu_to_le32(val32);
435 cmd_hdr->ttl = cpu_to_le32(ttl);
438 val32 = CMD_HDR_ATTR_RES | CMD_HDR_ATTR_SNOOP;
440 val32 = CMD_HDR_ATTR_RES | CMD_HDR_ATTR_SNOOP | CMD_HDR_ATTR_FPDMA;
443 tag &= CMD_HDR_ATTR_TAG;
446 debug("attribute = %08x\n\r", val32);
447 cmd_hdr->attribute = cpu_to_le32(val32);
449 /* Make sure cmd desc and cmd slot valid before commmand issue */
453 val32 = (u32)(h2d->pm_port_c & 0x0f);
454 out_le32(®->cqpmp, val32);
457 if (ata_wait_register(®->car, (1 << tag), 0, 10000))
458 printf("Wait no active time out\n\r");
461 if (!(in_le32(®->cqr) & (1 << tag))) {
463 out_le32(®->cqr, val32);
466 /* Wait command completed for 10s */
467 if (ata_wait_register(®->ccr, (1 << tag), (1 << tag), 10000)) {
469 printf("Non-NCQ command time out\n\r");
471 printf("NCQ command time out\n\r");
474 val32 = in_le32(®->cer);
478 fsl_sata_dump_sfis((struct sfis *)cmd_desc->sfis);
479 printf("CE at device\n\r");
480 fsl_sata_dump_regs(reg);
481 der = in_le32(®->der);
482 out_le32(®->cer, val32);
483 out_le32(®->der, der);
486 /* Clear complete flags */
487 val32 = in_le32(®->ccr);
488 out_le32(®->ccr, val32);
493 static int fsl_ata_exec_reset_cmd(struct fsl_sata *sata, struct cfis *cfis,
494 int tag, u8 *buffer, u32 len)
499 static int fsl_sata_exec_cmd(struct fsl_sata *sata, struct cfis *cfis,
500 enum cmd_type command_type, int tag, u8 *buffer, u32 len)
504 if (tag > SATA_HC_MAX_CMD || tag < 0) {
505 printf("tag is out of range, tag=\n\r", tag);
509 switch (command_type) {
511 rc = fsl_ata_exec_ata_cmd(sata, cfis, 0, tag, buffer, len);
514 rc = fsl_ata_exec_reset_cmd(sata, cfis, tag, buffer, len);
517 rc = fsl_ata_exec_ata_cmd(sata, cfis, 1, tag, buffer, len);
520 case CMD_VENDOR_BIST:
522 printf("not support now\n\r");
531 static void fsl_sata_identify(int dev, u16 *id)
533 fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
534 struct sata_fis_h2d h2d;
537 cfis = (struct cfis *)&h2d;
538 memset((void *)cfis, 0, sizeof(struct cfis));
540 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
541 cfis->pm_port_c = 0x80; /* is command */
542 cfis->command = ATA_CMD_ID_ATA;
544 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, (u8 *)id, ATA_ID_WORDS * 2);
545 ata_swap_buf_le16(id, ATA_ID_WORDS);
548 static void fsl_sata_xfer_mode(int dev, u16 *id)
550 fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
552 sata->pio = id[ATA_ID_PIO_MODES];
553 sata->mwdma = id[ATA_ID_MWDMA_MODES];
554 sata->udma = id[ATA_ID_UDMA_MODES];
555 debug("pio %04x, mwdma %04x, udma %04x\n\r", sata->pio, sata->mwdma, sata->udma);
558 static void fsl_sata_set_features(int dev)
560 fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
561 struct sata_fis_h2d h2d;
565 cfis = (struct cfis *)&h2d;
566 memset((void *)cfis, 0, sizeof(struct cfis));
568 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
569 cfis->pm_port_c = 0x80; /* is command */
570 cfis->command = ATA_CMD_SET_FEATURES;
571 cfis->features = SETFEATURES_XFER;
573 /* First check the device capablity */
574 udma_cap = (u8)(sata->udma & 0xff);
575 debug("udma_cap %02x\n\r", udma_cap);
577 if (udma_cap == ATA_UDMA6)
578 cfis->sector_count = XFER_UDMA_6;
579 if (udma_cap == ATA_UDMA5)
580 cfis->sector_count = XFER_UDMA_5;
581 if (udma_cap == ATA_UDMA4)
582 cfis->sector_count = XFER_UDMA_4;
583 if (udma_cap == ATA_UDMA3)
584 cfis->sector_count = XFER_UDMA_3;
586 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, NULL, 0);
589 static u32 fsl_sata_rw_cmd(int dev, u32 start, u32 blkcnt, u8 *buffer, int is_write)
591 fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
592 struct sata_fis_h2d h2d;
597 cfis = (struct cfis *)&h2d;
599 memset((void *)cfis, 0, sizeof(struct cfis));
601 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
602 cfis->pm_port_c = 0x80; /* is command */
603 cfis->command = (is_write) ? ATA_CMD_WRITE : ATA_CMD_READ;
604 cfis->device = ATA_LBA;
606 cfis->device |= (block >> 24) & 0xf;
607 cfis->lba_high = (block >> 16) & 0xff;
608 cfis->lba_mid = (block >> 8) & 0xff;
609 cfis->lba_low = block & 0xff;
610 cfis->sector_count = (u8)(blkcnt & 0xff);
612 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, buffer, ATA_SECT_SIZE * blkcnt);
616 void fsl_sata_flush_cache(int dev)
618 fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
619 struct sata_fis_h2d h2d;
622 cfis = (struct cfis *)&h2d;
624 memset((void *)cfis, 0, sizeof(struct cfis));
626 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
627 cfis->pm_port_c = 0x80; /* is command */
628 cfis->command = ATA_CMD_FLUSH;
630 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, NULL, 0);
633 static u32 fsl_sata_rw_cmd_ext(int dev, u32 start, u32 blkcnt, u8 *buffer, int is_write)
635 fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
636 struct sata_fis_h2d h2d;
641 cfis = (struct cfis *)&h2d;
643 memset((void *)cfis, 0, sizeof(struct cfis));
645 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
646 cfis->pm_port_c = 0x80; /* is command */
648 cfis->command = (is_write) ? ATA_CMD_WRITE_EXT
651 cfis->lba_high_exp = (block >> 40) & 0xff;
652 cfis->lba_mid_exp = (block >> 32) & 0xff;
653 cfis->lba_low_exp = (block >> 24) & 0xff;
654 cfis->lba_high = (block >> 16) & 0xff;
655 cfis->lba_mid = (block >> 8) & 0xff;
656 cfis->lba_low = block & 0xff;
657 cfis->device = ATA_LBA;
658 cfis->sector_count_exp = (blkcnt >> 8) & 0xff;
659 cfis->sector_count = blkcnt & 0xff;
661 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, buffer, ATA_SECT_SIZE * blkcnt);
665 u32 fsl_sata_rw_ncq_cmd(int dev, u32 start, u32 blkcnt, u8 *buffer, int is_write)
667 fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
668 struct sata_fis_h2d h2d;
673 if (sata_dev_desc[dev].lba48 != 1) {
674 printf("execute FPDMA command on non-LBA48 hard disk\n\r");
679 cfis = (struct cfis *)&h2d;
681 memset((void *)cfis, 0, sizeof(struct cfis));
683 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
684 cfis->pm_port_c = 0x80; /* is command */
686 cfis->command = (is_write) ? ATA_CMD_FPDMA_WRITE
687 : ATA_CMD_FPDMA_READ;
689 cfis->lba_high_exp = (block >> 40) & 0xff;
690 cfis->lba_mid_exp = (block >> 32) & 0xff;
691 cfis->lba_low_exp = (block >> 24) & 0xff;
692 cfis->lba_high = (block >> 16) & 0xff;
693 cfis->lba_mid = (block >> 8) & 0xff;
694 cfis->lba_low = block & 0xff;
696 cfis->device = ATA_LBA;
697 cfis->features_exp = (blkcnt >> 8) & 0xff;
698 cfis->features = blkcnt & 0xff;
700 if (sata->queue_depth >= SATA_HC_MAX_CMD)
701 ncq_channel = SATA_HC_MAX_CMD - 1;
703 ncq_channel = sata->queue_depth - 1;
705 /* Use the latest queue */
706 fsl_sata_exec_cmd(sata, cfis, CMD_NCQ, ncq_channel, buffer, ATA_SECT_SIZE * blkcnt);
710 void fsl_sata_flush_cache_ext(int dev)
712 fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
713 struct sata_fis_h2d h2d;
716 cfis = (struct cfis *)&h2d;
718 memset((void *)cfis, 0, sizeof(struct cfis));
720 cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
721 cfis->pm_port_c = 0x80; /* is command */
722 cfis->command = ATA_CMD_FLUSH_EXT;
724 fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, NULL, 0);
727 /* Software reset, set SRST of the Device Control register */
728 void fsl_sata_software_reset(int dev)
733 static void fsl_sata_init_wcache(int dev, u16 *id)
735 fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
737 if (ata_id_has_wcache(id) && ata_id_wcache_enabled(id))
739 if (ata_id_has_flush(id))
741 if (ata_id_has_flush_ext(id))
745 static int fsl_sata_get_wcache(int dev)
747 fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
751 static int fsl_sata_get_flush(int dev)
753 fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
757 static int fsl_sata_get_flush_ext(int dev)
759 fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
760 return sata->flush_ext;
763 u32 ata_low_level_rw_lba48(int dev, u32 blknr, u32 blkcnt, void *buffer, int is_write)
773 max_blks = ATA_MAX_SECTORS_LBA48;
775 if (blks > max_blks) {
776 if (fsl_sata_info[dev].flags != FLAGS_FPDMA)
777 fsl_sata_rw_cmd_ext(dev, start, max_blks, addr, is_write);
779 fsl_sata_rw_ncq_cmd(dev, start, max_blks, addr, is_write);
782 addr += ATA_SECT_SIZE * max_blks;
784 if (fsl_sata_info[dev].flags != FLAGS_FPDMA)
785 fsl_sata_rw_cmd_ext(dev, start, blks, addr, is_write);
787 fsl_sata_rw_ncq_cmd(dev, start, blks, addr, is_write);
790 addr += ATA_SECT_SIZE * blks;
797 u32 ata_low_level_rw_lba28(int dev, u32 blknr, u32 blkcnt, void *buffer, int is_write)
807 max_blks = ATA_MAX_SECTORS;
809 if (blks > max_blks) {
810 fsl_sata_rw_cmd(dev, start, max_blks, addr, is_write);
813 addr += ATA_SECT_SIZE * max_blks;
815 fsl_sata_rw_cmd(dev, start, blks, addr, is_write);
818 addr += ATA_SECT_SIZE * blks;
826 * SATA interface between low level driver and command layer
828 ulong sata_read(int dev, u32 blknr, u32 blkcnt, void *buffer)
832 if (sata_dev_desc[dev].lba48)
833 rc = ata_low_level_rw_lba48(dev, blknr, blkcnt, buffer, READ_CMD);
835 rc = ata_low_level_rw_lba28(dev, blknr, blkcnt, buffer, READ_CMD);
839 ulong sata_write(int dev, u32 blknr, u32 blkcnt, void *buffer)
843 if (sata_dev_desc[dev].lba48) {
844 rc = ata_low_level_rw_lba48(dev, blknr, blkcnt, buffer, WRITE_CMD);
845 if (fsl_sata_get_wcache(dev) && fsl_sata_get_flush_ext(dev))
846 fsl_sata_flush_cache_ext(dev);
848 rc = ata_low_level_rw_lba28(dev, blknr, blkcnt, buffer, WRITE_CMD);
849 if (fsl_sata_get_wcache(dev) && fsl_sata_get_flush(dev))
850 fsl_sata_flush_cache(dev);
855 int scan_sata(int dev)
857 fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
858 unsigned char serial[ATA_ID_SERNO_LEN + 1];
859 unsigned char firmware[ATA_ID_FW_REV_LEN + 1];
860 unsigned char product[ATA_ID_PROD_LEN + 1];
864 /* if no detected link */
868 id = (u16 *)malloc(ATA_ID_WORDS * 2);
870 printf("id malloc failed\n\r");
874 /* Identify device to get information */
875 fsl_sata_identify(dev, id);
878 ata_id_c_string(id, serial, ATA_ID_SERNO, sizeof(serial));
879 memcpy(sata_dev_desc[dev].product, serial, sizeof(serial));
881 /* Firmware version */
882 ata_id_c_string(id, firmware, ATA_ID_FW_REV, sizeof(firmware));
883 memcpy(sata_dev_desc[dev].revision, firmware, sizeof(firmware));
886 ata_id_c_string(id, product, ATA_ID_PROD, sizeof(product));
887 memcpy(sata_dev_desc[dev].vendor, product, sizeof(product));
890 n_sectors = ata_id_n_sectors(id);
891 sata_dev_desc[dev].lba = (u32)n_sectors;
893 /* Check if support LBA48 */
894 if (ata_id_has_lba48(id)) {
895 sata_dev_desc[dev].lba48 = 1;
896 debug("Device support LBA48\n\r");
899 /* Get the NCQ queue depth from device */
900 sata->queue_depth = ata_id_queue_depth(id);
902 /* Get the xfer mode from device */
903 fsl_sata_xfer_mode(dev, id);
905 /* Get the write cache status from device */
906 fsl_sata_init_wcache(dev, id);
908 /* Set the xfer mode to highest speed */
909 fsl_sata_set_features(dev);
911 fsl_sata_identify(dev, id);