2 * Copyright (C) Freescale Semiconductor, Inc. 2006.
3 * Author: Jason Jin<Jason.jin@freescale.com>
4 * Zhang Wei<wei.zhang@freescale.com>
6 * See file CREDITS for list of people who contributed to this
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation; either version 2 of
12 * the License, or (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
24 * with the reference on libata and ahci drvier in kernel
31 #include <asm/processor.h>
32 #include <asm/errno.h>
37 #include <linux/ctype.h>
40 struct ahci_probe_ent *probe_ent = NULL;
41 hd_driveid_t *ataid[AHCI_MAX_PORTS];
43 #define writel_with_flush(a,b) do { writel(a,b); readl(b); } while (0)
46 * Some controllers limit number of blocks they can read at once. Contemporary
47 * SSD devices work much faster if the read size is aligned to a power of 2.
48 * Let's set default to 128 and allowing to be overwritten if needed.
50 #ifndef MAX_SATA_BLOCKS_READ
51 #define MAX_SATA_BLOCKS_READ 0x80
54 static inline u32 ahci_port_base(u32 base, u32 port)
56 return base + 0x100 + (port * 0x80);
60 static void ahci_setup_port(struct ahci_ioports *port, unsigned long base,
61 unsigned int port_idx)
63 base = ahci_port_base(base, port_idx);
65 port->cmd_addr = base;
66 port->scr_addr = base + PORT_SCR;
70 #define msleep(a) udelay(a * 1000)
71 #define ssleep(a) msleep(a * 1000)
73 static int waiting_for_cmd_completed(volatile u8 *offset,
80 for (i = 0; ((status = readl(offset)) & sign) && i < timeout_msec; i++)
83 return (i < timeout_msec) ? 0 : -1;
87 static int ahci_host_init(struct ahci_probe_ent *probe_ent)
89 #ifndef CONFIG_SCSI_AHCI_PLAT
90 pci_dev_t pdev = probe_ent->dev;
92 unsigned short vendor;
94 volatile u8 *mmio = (volatile u8 *)probe_ent->mmio_base;
97 volatile u8 *port_mmio;
99 debug("ahci_host_init: start\n");
101 cap_save = readl(mmio + HOST_CAP);
102 cap_save &= ((1 << 28) | (1 << 17));
103 cap_save |= (1 << 27);
105 /* global controller reset */
106 tmp = readl(mmio + HOST_CTL);
107 if ((tmp & HOST_RESET) == 0)
108 writel_with_flush(tmp | HOST_RESET, mmio + HOST_CTL);
110 /* reset must complete within 1 second, or
111 * the hardware should be considered fried.
116 tmp = readl(mmio + HOST_CTL);
118 debug("controller reset failed (0x%x)\n", tmp);
121 } while (tmp & HOST_RESET);
123 writel_with_flush(HOST_AHCI_EN, mmio + HOST_CTL);
124 writel(cap_save, mmio + HOST_CAP);
125 writel_with_flush(0xf, mmio + HOST_PORTS_IMPL);
127 #ifndef CONFIG_SCSI_AHCI_PLAT
128 pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor);
130 if (vendor == PCI_VENDOR_ID_INTEL) {
132 pci_read_config_word(pdev, 0x92, &tmp16);
134 pci_write_config_word(pdev, 0x92, tmp16);
137 probe_ent->cap = readl(mmio + HOST_CAP);
138 probe_ent->port_map = readl(mmio + HOST_PORTS_IMPL);
139 probe_ent->n_ports = (probe_ent->cap & 0x1f) + 1;
141 debug("cap 0x%x port_map 0x%x n_ports %d\n",
142 probe_ent->cap, probe_ent->port_map, probe_ent->n_ports);
144 if (probe_ent->n_ports > CONFIG_SYS_SCSI_MAX_SCSI_ID)
145 probe_ent->n_ports = CONFIG_SYS_SCSI_MAX_SCSI_ID;
147 for (i = 0; i < probe_ent->n_ports; i++) {
148 probe_ent->port[i].port_mmio = ahci_port_base((u32) mmio, i);
149 port_mmio = (u8 *) probe_ent->port[i].port_mmio;
150 ahci_setup_port(&probe_ent->port[i], (unsigned long)mmio, i);
152 /* make sure port is not active */
153 tmp = readl(port_mmio + PORT_CMD);
154 if (tmp & (PORT_CMD_LIST_ON | PORT_CMD_FIS_ON |
155 PORT_CMD_FIS_RX | PORT_CMD_START)) {
156 tmp &= ~(PORT_CMD_LIST_ON | PORT_CMD_FIS_ON |
157 PORT_CMD_FIS_RX | PORT_CMD_START);
158 writel_with_flush(tmp, port_mmio + PORT_CMD);
160 /* spec says 500 msecs for each bit, so
161 * this is slightly incorrect.
166 writel(PORT_CMD_SPIN_UP, port_mmio + PORT_CMD);
170 tmp = readl(port_mmio + PORT_SCR_STAT);
171 if ((tmp & 0xf) == 0x3)
181 tmp = readl(port_mmio + PORT_SCR_ERR);
182 debug("PORT_SCR_ERR 0x%x\n", tmp);
183 writel(tmp, port_mmio + PORT_SCR_ERR);
185 /* ack any pending irq events for this port */
186 tmp = readl(port_mmio + PORT_IRQ_STAT);
187 debug("PORT_IRQ_STAT 0x%x\n", tmp);
189 writel(tmp, port_mmio + PORT_IRQ_STAT);
191 writel(1 << i, mmio + HOST_IRQ_STAT);
193 /* set irq mask (enables interrupts) */
194 writel(DEF_PORT_IRQ, port_mmio + PORT_IRQ_MASK);
196 /*register linkup ports */
197 tmp = readl(port_mmio + PORT_SCR_STAT);
198 debug("Port %d status: 0x%x\n", i, tmp);
199 if ((tmp & 0xf) == 0x03)
200 probe_ent->link_port_map |= (0x01 << i);
203 tmp = readl(mmio + HOST_CTL);
204 debug("HOST_CTL 0x%x\n", tmp);
205 writel(tmp | HOST_IRQ_EN, mmio + HOST_CTL);
206 tmp = readl(mmio + HOST_CTL);
207 debug("HOST_CTL 0x%x\n", tmp);
208 #ifndef CONFIG_SCSI_AHCI_PLAT
209 pci_read_config_word(pdev, PCI_COMMAND, &tmp16);
210 tmp |= PCI_COMMAND_MASTER;
211 pci_write_config_word(pdev, PCI_COMMAND, tmp16);
217 static void ahci_print_info(struct ahci_probe_ent *probe_ent)
219 #ifndef CONFIG_SCSI_AHCI_PLAT
220 pci_dev_t pdev = probe_ent->dev;
223 volatile u8 *mmio = (volatile u8 *)probe_ent->mmio_base;
224 u32 vers, cap, impl, speed;
228 vers = readl(mmio + HOST_VERSION);
229 cap = probe_ent->cap;
230 impl = probe_ent->port_map;
232 speed = (cap >> 20) & 0xf;
240 #ifdef CONFIG_SCSI_AHCI_PLAT
243 pci_read_config_word(pdev, 0x0a, &cc);
246 else if (cc == 0x0106)
248 else if (cc == 0x0104)
253 printf("AHCI %02x%02x.%02x%02x "
254 "%u slots %u ports %s Gbps 0x%x impl %s mode\n",
259 ((cap >> 8) & 0x1f) + 1, (cap & 0x1f) + 1, speed_s, impl, scc_s);
264 cap & (1 << 31) ? "64bit " : "",
265 cap & (1 << 30) ? "ncq " : "",
266 cap & (1 << 28) ? "ilck " : "",
267 cap & (1 << 27) ? "stag " : "",
268 cap & (1 << 26) ? "pm " : "",
269 cap & (1 << 25) ? "led " : "",
270 cap & (1 << 24) ? "clo " : "",
271 cap & (1 << 19) ? "nz " : "",
272 cap & (1 << 18) ? "only " : "",
273 cap & (1 << 17) ? "pmp " : "",
274 cap & (1 << 15) ? "pio " : "",
275 cap & (1 << 14) ? "slum " : "",
276 cap & (1 << 13) ? "part " : "");
279 #ifndef CONFIG_SCSI_AHCI_PLAT
280 static int ahci_init_one(pci_dev_t pdev)
285 memset((void *)ataid, 0, sizeof(hd_driveid_t *) * AHCI_MAX_PORTS);
287 probe_ent = malloc(sizeof(struct ahci_probe_ent));
288 memset(probe_ent, 0, sizeof(struct ahci_probe_ent));
289 probe_ent->dev = pdev;
291 probe_ent->host_flags = ATA_FLAG_SATA
296 probe_ent->pio_mask = 0x1f;
297 probe_ent->udma_mask = 0x7f; /*Fixme,assume to support UDMA6 */
299 pci_read_config_dword(pdev, PCI_BASE_ADDRESS_5, &probe_ent->mmio_base);
300 debug("ahci mmio_base=0x%08x\n", probe_ent->mmio_base);
303 * JMicron-specific fixup:
304 * make sure we're in AHCI mode
306 pci_read_config_word(pdev, PCI_VENDOR_ID, &vendor);
307 if (vendor == 0x197b)
308 pci_write_config_byte(pdev, 0x41, 0xa1);
310 /* initialize adapter */
311 rc = ahci_host_init(probe_ent);
315 ahci_print_info(probe_ent);
324 #define MAX_DATA_BYTE_COUNT (4*1024*1024)
326 static int ahci_fill_sg(u8 port, unsigned char *buf, int buf_len)
328 struct ahci_ioports *pp = &(probe_ent->port[port]);
329 struct ahci_sg *ahci_sg = pp->cmd_tbl_sg;
333 sg_count = ((buf_len - 1) / MAX_DATA_BYTE_COUNT) + 1;
334 if (sg_count > AHCI_MAX_SG) {
335 printf("Error:Too much sg!\n");
339 for (i = 0; i < sg_count; i++) {
341 cpu_to_le32((u32) buf + i * MAX_DATA_BYTE_COUNT);
342 ahci_sg->addr_hi = 0;
343 ahci_sg->flags_size = cpu_to_le32(0x3fffff &
344 (buf_len < MAX_DATA_BYTE_COUNT
346 : (MAX_DATA_BYTE_COUNT - 1)));
348 buf_len -= MAX_DATA_BYTE_COUNT;
355 static void ahci_fill_cmd_slot(struct ahci_ioports *pp, u32 opts)
357 pp->cmd_slot->opts = cpu_to_le32(opts);
358 pp->cmd_slot->status = 0;
359 pp->cmd_slot->tbl_addr = cpu_to_le32(pp->cmd_tbl & 0xffffffff);
360 pp->cmd_slot->tbl_addr_hi = 0;
364 static void ahci_set_feature(u8 port)
366 struct ahci_ioports *pp = &(probe_ent->port[port]);
367 volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
368 u32 cmd_fis_len = 5; /* five dwords */
375 fis[2] = ATA_CMD_SETF;
376 fis[3] = SETFEATURES_XFER;
377 fis[12] = __ilog2(probe_ent->udma_mask + 1) + 0x40 - 0x01;
379 memcpy((unsigned char *)pp->cmd_tbl, fis, 20);
380 ahci_fill_cmd_slot(pp, cmd_fis_len);
381 writel(1, port_mmio + PORT_CMD_ISSUE);
382 readl(port_mmio + PORT_CMD_ISSUE);
384 if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
385 printf("set feature error!\n");
390 static int ahci_port_start(u8 port)
392 struct ahci_ioports *pp = &(probe_ent->port[port]);
393 volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
397 debug("Enter start port: %d\n", port);
398 port_status = readl(port_mmio + PORT_SCR_STAT);
399 debug("Port %d status: %x\n", port, port_status);
400 if ((port_status & 0xf) != 0x03) {
401 printf("No Link on this port!\n");
405 mem = (u32) malloc(AHCI_PORT_PRIV_DMA_SZ + 2048);
408 printf("No mem for table!\n");
412 mem = (mem + 0x800) & (~0x7ff); /* Aligned to 2048-bytes */
413 memset((u8 *) mem, 0, AHCI_PORT_PRIV_DMA_SZ);
416 * First item in chunk of DMA memory: 32-slot command table,
417 * 32 bytes each in size
419 pp->cmd_slot = (struct ahci_cmd_hdr *)mem;
420 debug("cmd_slot = 0x%x\n", (unsigned)pp->cmd_slot);
421 mem += (AHCI_CMD_SLOT_SZ + 224);
424 * Second item: Received-FIS area
427 mem += AHCI_RX_FIS_SZ;
430 * Third item: data area for storing a single command
431 * and its scatter-gather table
434 debug("cmd_tbl_dma = 0x%x\n", pp->cmd_tbl);
436 mem += AHCI_CMD_TBL_HDR;
437 pp->cmd_tbl_sg = (struct ahci_sg *)mem;
439 writel_with_flush((u32) pp->cmd_slot, port_mmio + PORT_LST_ADDR);
441 writel_with_flush(pp->rx_fis, port_mmio + PORT_FIS_ADDR);
443 writel_with_flush(PORT_CMD_ICC_ACTIVE | PORT_CMD_FIS_RX |
444 PORT_CMD_POWER_ON | PORT_CMD_SPIN_UP |
445 PORT_CMD_START, port_mmio + PORT_CMD);
447 debug("Exit start port %d\n", port);
453 static int get_ahci_device_data(u8 port, u8 *fis, int fis_len, u8 *buf,
457 struct ahci_ioports *pp = &(probe_ent->port[port]);
458 volatile u8 *port_mmio = (volatile u8 *)pp->port_mmio;
463 debug("Enter get_ahci_device_data: for port %d\n", port);
465 if (port > probe_ent->n_ports) {
466 printf("Invaild port number %d\n", port);
470 port_status = readl(port_mmio + PORT_SCR_STAT);
471 if ((port_status & 0xf) != 0x03) {
472 debug("No Link on port %d!\n", port);
476 memcpy((unsigned char *)pp->cmd_tbl, fis, fis_len);
478 sg_count = ahci_fill_sg(port, buf, buf_len);
479 opts = (fis_len >> 2) | (sg_count << 16);
480 ahci_fill_cmd_slot(pp, opts);
482 writel_with_flush(1, port_mmio + PORT_CMD_ISSUE);
484 if (waiting_for_cmd_completed(port_mmio + PORT_CMD_ISSUE, 150, 0x1)) {
485 printf("timeout exit!\n");
488 debug("get_ahci_device_data: %d byte transferred.\n",
489 pp->cmd_slot->status);
495 static char *ata_id_strcpy(u16 *target, u16 *src, int len)
498 for (i = 0; i < len / 2; i++)
499 target[i] = swab16(src[i]);
500 return (char *)target;
504 static void dump_ataid(hd_driveid_t *ataid)
506 debug("(49)ataid->capability = 0x%x\n", ataid->capability);
507 debug("(53)ataid->field_valid =0x%x\n", ataid->field_valid);
508 debug("(63)ataid->dma_mword = 0x%x\n", ataid->dma_mword);
509 debug("(64)ataid->eide_pio_modes = 0x%x\n", ataid->eide_pio_modes);
510 debug("(75)ataid->queue_depth = 0x%x\n", ataid->queue_depth);
511 debug("(80)ataid->major_rev_num = 0x%x\n", ataid->major_rev_num);
512 debug("(81)ataid->minor_rev_num = 0x%x\n", ataid->minor_rev_num);
513 debug("(82)ataid->command_set_1 = 0x%x\n", ataid->command_set_1);
514 debug("(83)ataid->command_set_2 = 0x%x\n", ataid->command_set_2);
515 debug("(84)ataid->cfsse = 0x%x\n", ataid->cfsse);
516 debug("(85)ataid->cfs_enable_1 = 0x%x\n", ataid->cfs_enable_1);
517 debug("(86)ataid->cfs_enable_2 = 0x%x\n", ataid->cfs_enable_2);
518 debug("(87)ataid->csf_default = 0x%x\n", ataid->csf_default);
519 debug("(88)ataid->dma_ultra = 0x%x\n", ataid->dma_ultra);
520 debug("(93)ataid->hw_config = 0x%x\n", ataid->hw_config);
525 * SCSI INQUIRY command operation.
527 static int ata_scsiop_inquiry(ccb *pccb)
532 0x5, /* claim SPC-3 version compatibility */
540 /* Clean ccb data buffer */
541 memset(pccb->pdata, 0, pccb->datalen);
543 memcpy(pccb->pdata, hdr, sizeof(hdr));
545 if (pccb->datalen <= 35)
549 /* Construct the FIS */
550 fis[0] = 0x27; /* Host to device FIS. */
551 fis[1] = 1 << 7; /* Command FIS. */
552 fis[2] = ATA_CMD_IDENT; /* Command byte. */
554 /* Read id from sata */
556 if (!(tmpid = malloc(sizeof(hd_driveid_t))))
559 if (get_ahci_device_data(port, (u8 *) & fis, 20,
560 tmpid, sizeof(hd_driveid_t))) {
561 debug("scsi_ahci: SCSI inquiry command failure.\n");
567 ataid[port] = (hd_driveid_t *) tmpid;
569 memcpy(&pccb->pdata[8], "ATA ", 8);
570 ata_id_strcpy((u16 *) &pccb->pdata[16], (u16 *)ataid[port]->model, 16);
571 ata_id_strcpy((u16 *) &pccb->pdata[32], (u16 *)ataid[port]->fw_rev, 4);
573 dump_ataid(ataid[port]);
579 * SCSI READ10 command operation.
581 static int ata_scsiop_read10(ccb * pccb)
586 u8 *user_buffer = pccb->pdata;
587 u32 user_buffer_size = pccb->datalen;
589 /* Retrieve the base LBA number from the ccb structure. */
590 memcpy(&lba, pccb->cmd + 2, sizeof(lba));
591 lba = be32_to_cpu(lba);
594 * And the number of blocks.
596 * For 10-byte and 16-byte SCSI R/W commands, transfer
597 * length 0 means transfer 0 block of data.
598 * However, for ATA R/W commands, sector count 0 means
599 * 256 or 65536 sectors, not 0 sectors as in SCSI.
601 * WARNING: one or two older ATA drives treat 0 as 0...
603 blocks = (((u16)pccb->cmd[7]) << 8) | ((u16) pccb->cmd[8]);
605 debug("scsi_ahci: read %d blocks starting from lba 0x%x\n",
606 (unsigned)lba, blocks);
610 fis[0] = 0x27; /* Host to device FIS. */
611 fis[1] = 1 << 7; /* Command FIS. */
612 fis[2] = ATA_CMD_RD_DMA; /* Command byte. */
615 u16 now_blocks; /* number of blocks per iteration */
616 u32 transfer_size; /* number of bytes per iteration */
618 now_blocks = min(MAX_SATA_BLOCKS_READ, blocks);
620 transfer_size = ATA_BLOCKSIZE * now_blocks;
621 if (transfer_size > user_buffer_size) {
622 printf("scsi_ahci: Error: buffer too small.\n");
626 /* LBA address, only support LBA28 in this driver */
627 fis[4] = (lba >> 0) & 0xff;
628 fis[5] = (lba >> 8) & 0xff;
629 fis[6] = (lba >> 16) & 0xff;
630 fis[7] = ((lba >> 24) & 0xf) | 0xe0;
632 /* Block (sector) count */
633 fis[12] = (now_blocks >> 0) & 0xff;
634 fis[13] = (now_blocks >> 8) & 0xff;
637 if (get_ahci_device_data(pccb->target, (u8 *) &fis, sizeof(fis),
638 user_buffer, user_buffer_size)) {
639 debug("scsi_ahci: SCSI READ10 command failure.\n");
642 user_buffer += transfer_size;
643 user_buffer_size -= transfer_size;
644 blocks -= now_blocks;
653 * SCSI READ CAPACITY10 command operation.
655 static int ata_scsiop_read_capacity10(ccb *pccb)
659 if (!ataid[pccb->target]) {
660 printf("scsi_ahci: SCSI READ CAPACITY10 command failure. "
662 "\tPlease run SCSI commmand INQUIRY firstly!\n");
666 cap = be32_to_cpu(ataid[pccb->target]->lba_capacity);
667 memcpy(pccb->pdata, &cap, sizeof(cap));
669 pccb->pdata[4] = pccb->pdata[5] = 0;
670 pccb->pdata[6] = 512 >> 8;
671 pccb->pdata[7] = 512 & 0xff;
678 * SCSI TEST UNIT READY command operation.
680 static int ata_scsiop_test_unit_ready(ccb *pccb)
682 return (ataid[pccb->target]) ? 0 : -EPERM;
686 int scsi_exec(ccb *pccb)
690 switch (pccb->cmd[0]) {
692 ret = ata_scsiop_read10(pccb);
695 ret = ata_scsiop_read_capacity10(pccb);
698 ret = ata_scsiop_test_unit_ready(pccb);
701 ret = ata_scsiop_inquiry(pccb);
704 printf("Unsupport SCSI command 0x%02x\n", pccb->cmd[0]);
709 debug("SCSI command 0x%02x ret errno %d\n", pccb->cmd[0], ret);
717 void scsi_low_level_init(int busdevfunc)
722 #ifndef CONFIG_SCSI_AHCI_PLAT
723 ahci_init_one(busdevfunc);
726 linkmap = probe_ent->link_port_map;
728 for (i = 0; i < CONFIG_SYS_SCSI_MAX_SCSI_ID; i++) {
729 if (((linkmap >> i) & 0x01)) {
730 if (ahci_port_start((u8) i)) {
731 printf("Can not start port %d\n", i);
734 ahci_set_feature((u8) i);
739 #ifdef CONFIG_SCSI_AHCI_PLAT
740 int ahci_init(u32 base)
745 memset(ataid, 0, sizeof(ataid));
747 probe_ent = malloc(sizeof(struct ahci_probe_ent));
748 memset(probe_ent, 0, sizeof(struct ahci_probe_ent));
750 probe_ent->host_flags = ATA_FLAG_SATA
755 probe_ent->pio_mask = 0x1f;
756 probe_ent->udma_mask = 0x7f; /*Fixme,assume to support UDMA6 */
758 probe_ent->mmio_base = base;
760 /* initialize adapter */
761 rc = ahci_host_init(probe_ent);
765 ahci_print_info(probe_ent);
767 linkmap = probe_ent->link_port_map;
769 for (i = 0; i < CONFIG_SYS_SCSI_MAX_SCSI_ID; i++) {
770 if (((linkmap >> i) & 0x01)) {
771 if (ahci_port_start((u8) i)) {
772 printf("Can not start port %d\n", i);
775 ahci_set_feature((u8) i);
783 void scsi_bus_reset(void)
789 void scsi_print_error(ccb * pccb)
791 /*The ahci error info can be read in the ahci driver*/