4 Support AXI (Advanced eXtensible Interface) busses, a on-chip
5 interconnect specification for managing functional blocks in SoC
6 designs, which is also often used in designs involving FPGAs (e.g.
7 communication with IP cores in Xilinx FPGAs).
9 These types of busses expose a virtual address space that can be
10 accessed using different address widths (8, 16, and 32 are supported
13 Other similar bus architectures may be compatible as well.
18 bool "Enable IHS AXI driver"
21 Support for gdsys Integrated Hardware Systems Advanced eXtensible
22 Interface (IHS AXI) bus on a gdsys IHS FPGA used to communicate with
23 IP cores in the FPGA (e.g. video transmitter cores).
26 bool "Enable AXI sandbox driver"
29 Support AXI (Advanced eXtensible Interface) emulation for the sandbox