Merge tag 'dm-pull-3dec19' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm
[oweals/u-boot.git] / drivers / ata / fsl_sata.c
1 // SPDX-License-Identifier: GPL-2.0+
2 /*
3  * Copyright (C) 2008,2010 Freescale Semiconductor, Inc.
4  * Copyright 2019 NXP
5  * Author: Dave Liu <daveliu@freescale.com>
6  */
7
8 #include <common.h>
9 #include <command.h>
10 #include <console.h>
11 #include <cpu_func.h>
12 #include <asm/io.h>
13 #include <asm/processor.h>
14 #include <asm/fsl_serdes.h>
15 #include <malloc.h>
16 #include <libata.h>
17 #include <fis.h>
18 #include <sata.h>
19 #include "fsl_sata.h"
20
21 #if CONFIG_IS_ENABLED(BLK)
22 #include <dm.h>
23 #include <ahci.h>
24 #include <blk.h>
25 #else
26 #ifndef CONFIG_SYS_SATA1_FLAGS
27         #define CONFIG_SYS_SATA1_FLAGS  FLAGS_DMA
28 #endif
29 #ifndef CONFIG_SYS_SATA2_FLAGS
30         #define CONFIG_SYS_SATA2_FLAGS  FLAGS_DMA
31 #endif
32
33 static struct fsl_sata_info fsl_sata_info[] = {
34 #ifdef CONFIG_SATA1
35         {CONFIG_SYS_SATA1, CONFIG_SYS_SATA1_FLAGS},
36 #else
37         {0, 0},
38 #endif
39 #ifdef CONFIG_SATA2
40         {CONFIG_SYS_SATA2, CONFIG_SYS_SATA2_FLAGS},
41 #else
42         {0, 0},
43 #endif
44 };
45 #endif
46
47 static inline void sdelay(unsigned long sec)
48 {
49         unsigned long i;
50         for (i = 0; i < sec; i++)
51                 mdelay(1000);
52 }
53
54 static void fsl_sata_dump_sfis(struct sata_fis_d2h *s)
55 {
56         printf("Status FIS dump:\n\r");
57         printf("fis_type:               %02x\n\r", s->fis_type);
58         printf("pm_port_i:              %02x\n\r", s->pm_port_i);
59         printf("status:                 %02x\n\r", s->status);
60         printf("error:                  %02x\n\r", s->error);
61         printf("lba_low:                %02x\n\r", s->lba_low);
62         printf("lba_mid:                %02x\n\r", s->lba_mid);
63         printf("lba_high:               %02x\n\r", s->lba_high);
64         printf("device:                 %02x\n\r", s->device);
65         printf("lba_low_exp:            %02x\n\r", s->lba_low_exp);
66         printf("lba_mid_exp:            %02x\n\r", s->lba_mid_exp);
67         printf("lba_high_exp:           %02x\n\r", s->lba_high_exp);
68         printf("res1:                   %02x\n\r", s->res1);
69         printf("sector_count:           %02x\n\r", s->sector_count);
70         printf("sector_count_exp:       %02x\n\r", s->sector_count_exp);
71 }
72
73 static int ata_wait_register(unsigned __iomem *addr, u32 mask,
74                          u32 val, u32 timeout_msec)
75 {
76         int i;
77         u32 temp;
78
79         for (i = 0; (((temp = in_le32(addr)) & mask) != val)
80                          && i < timeout_msec; i++)
81                 mdelay(1);
82         return (i < timeout_msec) ? 0 : -1;
83 }
84
85 #if !CONFIG_IS_ENABLED(BLK)
86 int init_sata(int dev)
87 #else
88 static int init_sata(struct fsl_ata_priv *priv, int dev)
89 #endif
90 {
91         u32 length, align;
92         cmd_hdr_tbl_t *cmd_hdr;
93         u32 cda;
94         u32 val32;
95         fsl_sata_reg_t __iomem *reg;
96         u32 sig;
97         int i;
98         fsl_sata_t *sata;
99
100         if (dev < 0 || dev > (CONFIG_SYS_SATA_MAX_DEVICE - 1)) {
101                 printf("the sata index %d is out of ranges\n\r", dev);
102                 return -1;
103         }
104
105 #ifdef CONFIG_MPC85xx
106         if ((dev == 0) && (!is_serdes_configured(SATA1))) {
107                 printf("SATA%d [dev = %d] is not enabled\n", dev+1, dev);
108                 return -1;
109         }
110         if ((dev == 1) && (!is_serdes_configured(SATA2))) {
111                 printf("SATA%d [dev = %d] is not enabled\n", dev+1, dev);
112                 return -1;
113         }
114 #endif
115
116         /* Allocate SATA device driver struct */
117         sata = (fsl_sata_t *)malloc(sizeof(fsl_sata_t));
118         if (!sata) {
119                 printf("alloc the sata device struct failed\n\r");
120                 return -1;
121         }
122         /* Zero all of the device driver struct */
123         memset((void *)sata, 0, sizeof(fsl_sata_t));
124
125         snprintf(sata->name, 12, "SATA%d:\n", dev);
126
127         /* Set the controller register base address to device struct */
128 #if !CONFIG_IS_ENABLED(BLK)
129         sata_dev_desc[dev].priv = (void *)sata;
130         reg = (fsl_sata_reg_t *)(fsl_sata_info[dev].sata_reg_base);
131         sata->dma_flag = fsl_sata_info[dev].flags;
132 #else
133         reg = (fsl_sata_reg_t *)(priv->base + priv->offset * dev);
134         sata->dma_flag = priv->flag;
135         priv->fsl_sata = sata;
136 #endif
137         sata->reg_base = reg;
138
139         /* Allocate the command header table, 4 bytes aligned */
140         length = sizeof(struct cmd_hdr_tbl);
141         align = SATA_HC_CMD_HDR_TBL_ALIGN;
142         sata->cmd_hdr_tbl_offset = (void *)malloc(length + align);
143         if (!sata->cmd_hdr_tbl_offset) {
144                 printf("alloc the command header failed\n\r");
145                 return -1;
146         }
147
148         cmd_hdr = (cmd_hdr_tbl_t *)(((u32)sata->cmd_hdr_tbl_offset + align)
149                                                 & ~(align - 1));
150         sata->cmd_hdr = cmd_hdr;
151
152         /* Zero all of the command header table */
153         memset((void *)sata->cmd_hdr_tbl_offset, 0, length + align);
154
155         /* Allocate command descriptor for all command */
156         length = sizeof(struct cmd_desc) * SATA_HC_MAX_CMD;
157         align = SATA_HC_CMD_DESC_ALIGN;
158         sata->cmd_desc_offset = (void *)malloc(length + align);
159         if (!sata->cmd_desc_offset) {
160                 printf("alloc the command descriptor failed\n\r");
161                 return -1;
162         }
163         sata->cmd_desc = (cmd_desc_t *)(((u32)sata->cmd_desc_offset + align)
164                                                 & ~(align - 1));
165         /* Zero all of command descriptor */
166         memset((void *)sata->cmd_desc_offset, 0, length + align);
167
168         /* Link the command descriptor to command header */
169         for (i = 0; i < SATA_HC_MAX_CMD; i++) {
170                 cda = ((u32)sata->cmd_desc + SATA_HC_CMD_DESC_SIZE * i)
171                                          & ~(CMD_HDR_CDA_ALIGN - 1);
172                 cmd_hdr->cmd_slot[i].cda = cpu_to_le32(cda);
173         }
174
175         /* To have safe state, force the controller offline */
176         val32 = in_le32(&reg->hcontrol);
177         val32 &= ~HCONTROL_ONOFF;
178         val32 |= HCONTROL_FORCE_OFFLINE;
179         out_le32(&reg->hcontrol, val32);
180
181         /* Wait the controller offline */
182         ata_wait_register(&reg->hstatus, HSTATUS_ONOFF, 0, 1000);
183
184         /* Set the command header base address to CHBA register to tell DMA */
185         out_le32(&reg->chba, (u32)cmd_hdr & ~0x3);
186
187         /* Snoop for the command header */
188         val32 = in_le32(&reg->hcontrol);
189         val32 |= HCONTROL_HDR_SNOOP;
190         out_le32(&reg->hcontrol, val32);
191
192         /* Disable all of interrupts */
193         val32 = in_le32(&reg->hcontrol);
194         val32 &= ~HCONTROL_INT_EN_ALL;
195         out_le32(&reg->hcontrol, val32);
196
197         /* Clear all of interrupts */
198         val32 = in_le32(&reg->hstatus);
199         out_le32(&reg->hstatus, val32);
200
201         /* Set the ICC, no interrupt coalescing */
202         out_le32(&reg->icc, 0x01000000);
203
204         /* No PM attatched, the SATA device direct connect */
205         out_le32(&reg->cqpmp, 0);
206
207         /* Clear SError register */
208         val32 = in_le32(&reg->serror);
209         out_le32(&reg->serror, val32);
210
211         /* Clear CER register */
212         val32 = in_le32(&reg->cer);
213         out_le32(&reg->cer, val32);
214
215         /* Clear DER register */
216         val32 = in_le32(&reg->der);
217         out_le32(&reg->der, val32);
218
219         /* No device detection or initialization action requested */
220         out_le32(&reg->scontrol, 0x00000300);
221
222         /* Configure the transport layer, default value */
223         out_le32(&reg->transcfg, 0x08000016);
224
225         /* Configure the link layer, default value */
226         out_le32(&reg->linkcfg, 0x0000ff34);
227
228         /* Bring the controller online */
229         val32 = in_le32(&reg->hcontrol);
230         val32 |= HCONTROL_ONOFF;
231         out_le32(&reg->hcontrol, val32);
232
233         mdelay(100);
234
235         /* print sata device name */
236         if (!dev)
237                 printf("%s ", sata->name);
238         else
239                 printf("       %s ", sata->name);
240
241         /* Wait PHY RDY signal changed for 500ms */
242         ata_wait_register(&reg->hstatus, HSTATUS_PHY_RDY,
243                           HSTATUS_PHY_RDY, 500);
244
245         /* Check PHYRDY */
246         val32 = in_le32(&reg->hstatus);
247         if (val32 & HSTATUS_PHY_RDY) {
248                 sata->link = 1;
249         } else {
250                 sata->link = 0;
251                 printf("(No RDY)\n\r");
252                 return -1;
253         }
254
255         /* Wait for signature updated, which is 1st D2H */
256         ata_wait_register(&reg->hstatus, HSTATUS_SIGNATURE,
257                           HSTATUS_SIGNATURE, 10000);
258
259         if (val32 & HSTATUS_SIGNATURE) {
260                 sig = in_le32(&reg->sig);
261                 debug("Signature updated, the sig =%08x\n\r", sig);
262                 sata->ata_device_type = ata_dev_classify(sig);
263         }
264
265         /* Check the speed */
266         val32 = in_le32(&reg->sstatus);
267         if ((val32 & SSTATUS_SPD_MASK) == SSTATUS_SPD_GEN1)
268                 printf("(1.5 Gbps)\n\r");
269         else if ((val32 & SSTATUS_SPD_MASK) == SSTATUS_SPD_GEN2)
270                 printf("(3 Gbps)\n\r");
271
272         return 0;
273 }
274
275 int reset_sata(int dev)
276 {
277         return 0;
278 }
279
280 static void fsl_sata_dump_regs(fsl_sata_reg_t __iomem *reg)
281 {
282         printf("\n\rSATA:           %08x\n\r", (u32)reg);
283         printf("CQR:            %08x\n\r", in_le32(&reg->cqr));
284         printf("CAR:            %08x\n\r", in_le32(&reg->car));
285         printf("CCR:            %08x\n\r", in_le32(&reg->ccr));
286         printf("CER:            %08x\n\r", in_le32(&reg->cer));
287         printf("CQR:            %08x\n\r", in_le32(&reg->cqr));
288         printf("DER:            %08x\n\r", in_le32(&reg->der));
289         printf("CHBA:           %08x\n\r", in_le32(&reg->chba));
290         printf("HStatus:        %08x\n\r", in_le32(&reg->hstatus));
291         printf("HControl:       %08x\n\r", in_le32(&reg->hcontrol));
292         printf("CQPMP:          %08x\n\r", in_le32(&reg->cqpmp));
293         printf("SIG:            %08x\n\r", in_le32(&reg->sig));
294         printf("ICC:            %08x\n\r", in_le32(&reg->icc));
295         printf("SStatus:        %08x\n\r", in_le32(&reg->sstatus));
296         printf("SError:         %08x\n\r", in_le32(&reg->serror));
297         printf("SControl:       %08x\n\r", in_le32(&reg->scontrol));
298         printf("SNotification:  %08x\n\r", in_le32(&reg->snotification));
299         printf("TransCfg:       %08x\n\r", in_le32(&reg->transcfg));
300         printf("TransStatus:    %08x\n\r", in_le32(&reg->transstatus));
301         printf("LinkCfg:        %08x\n\r", in_le32(&reg->linkcfg));
302         printf("LinkCfg1:       %08x\n\r", in_le32(&reg->linkcfg1));
303         printf("LinkCfg2:       %08x\n\r", in_le32(&reg->linkcfg2));
304         printf("LinkStatus:     %08x\n\r", in_le32(&reg->linkstatus));
305         printf("LinkStatus1:    %08x\n\r", in_le32(&reg->linkstatus1));
306         printf("PhyCtrlCfg:     %08x\n\r", in_le32(&reg->phyctrlcfg));
307         printf("SYSPR:          %08x\n\r", in_be32(&reg->syspr));
308 }
309
310 static int fsl_ata_exec_ata_cmd(struct fsl_sata *sata, struct sata_fis_h2d *cfis,
311                                 int is_ncq, int tag, u8 *buffer, u32 len)
312 {
313         cmd_hdr_entry_t *cmd_hdr;
314         cmd_desc_t *cmd_desc;
315         sata_fis_h2d_t *h2d;
316         prd_entry_t *prde;
317         u32 ext_c_ddc;
318         u32 prde_count;
319         u32 val32;
320         u32 ttl;
321         fsl_sata_reg_t __iomem *reg = sata->reg_base;
322         int i;
323
324         /* Check xfer length */
325         if (len > SATA_HC_MAX_XFER_LEN) {
326                 printf("max transfer length is 64MB\n\r");
327                 return 0;
328         }
329
330         /* Setup the command descriptor */
331         cmd_desc = sata->cmd_desc + tag;
332
333         /* Get the pointer cfis of command descriptor */
334         h2d = (sata_fis_h2d_t *)cmd_desc->cfis;
335
336         /* Zero the cfis of command descriptor */
337         memset((void *)h2d, 0, SATA_HC_CMD_DESC_CFIS_SIZE);
338
339         /* Copy the cfis from user to command descriptor */
340         h2d->fis_type = cfis->fis_type;
341         h2d->pm_port_c = cfis->pm_port_c;
342         h2d->command = cfis->command;
343
344         h2d->features = cfis->features;
345         h2d->features_exp = cfis->features_exp;
346
347         h2d->lba_low = cfis->lba_low;
348         h2d->lba_mid = cfis->lba_mid;
349         h2d->lba_high = cfis->lba_high;
350         h2d->lba_low_exp = cfis->lba_low_exp;
351         h2d->lba_mid_exp = cfis->lba_mid_exp;
352         h2d->lba_high_exp = cfis->lba_high_exp;
353
354         if (!is_ncq) {
355                 h2d->sector_count = cfis->sector_count;
356                 h2d->sector_count_exp = cfis->sector_count_exp;
357         } else { /* NCQ */
358                 h2d->sector_count = (u8)(tag << 3);
359         }
360
361         h2d->device = cfis->device;
362         h2d->control = cfis->control;
363
364         /* Setup the PRD table */
365         prde = (prd_entry_t *)cmd_desc->prdt;
366         memset((void *)prde, 0, sizeof(struct prdt));
367
368         prde_count = 0;
369         ttl = len;
370         for (i = 0; i < SATA_HC_MAX_PRD_DIRECT; i++) {
371                 if (!len)
372                         break;
373                 prde->dba = cpu_to_le32((u32)buffer & ~0x3);
374                 debug("dba = %08x\n\r", (u32)buffer);
375
376                 if (len < PRD_ENTRY_MAX_XFER_SZ) {
377                         ext_c_ddc = PRD_ENTRY_DATA_SNOOP | len;
378                         debug("ext_c_ddc1 = %08x, len = %08x\n\r", ext_c_ddc, len);
379                         prde->ext_c_ddc = cpu_to_le32(ext_c_ddc);
380                         prde_count++;
381                         prde++;
382                         break;
383                 } else {
384                         ext_c_ddc = PRD_ENTRY_DATA_SNOOP; /* 4M bytes */
385                         debug("ext_c_ddc2 = %08x, len = %08x\n\r", ext_c_ddc, len);
386                         prde->ext_c_ddc = cpu_to_le32(ext_c_ddc);
387                         buffer += PRD_ENTRY_MAX_XFER_SZ;
388                         len -= PRD_ENTRY_MAX_XFER_SZ;
389                         prde_count++;
390                         prde++;
391                 }
392         }
393
394         /* Setup the command slot of cmd hdr */
395         cmd_hdr = (cmd_hdr_entry_t *)&sata->cmd_hdr->cmd_slot[tag];
396
397         cmd_hdr->cda = cpu_to_le32((u32)cmd_desc & ~0x3);
398
399         val32 = prde_count << CMD_HDR_PRD_ENTRY_SHIFT;
400         val32 |= sizeof(sata_fis_h2d_t);
401         cmd_hdr->prde_fis_len = cpu_to_le32(val32);
402
403         cmd_hdr->ttl = cpu_to_le32(ttl);
404
405         if (!is_ncq) {
406                 val32 = CMD_HDR_ATTR_RES | CMD_HDR_ATTR_SNOOP;
407         } else {
408                 val32 = CMD_HDR_ATTR_RES | CMD_HDR_ATTR_SNOOP | CMD_HDR_ATTR_FPDMA;
409         }
410
411         tag &= CMD_HDR_ATTR_TAG;
412         val32 |= tag;
413
414         debug("attribute = %08x\n\r", val32);
415         cmd_hdr->attribute = cpu_to_le32(val32);
416
417         /* Make sure cmd desc and cmd slot valid before command issue */
418         sync();
419
420         /* PMP*/
421         val32 = (u32)(h2d->pm_port_c & 0x0f);
422         out_le32(&reg->cqpmp, val32);
423
424         /* Wait no active */
425         if (ata_wait_register(&reg->car, (1 << tag), 0, 10000))
426                 printf("Wait no active time out\n\r");
427
428         /* Issue command */
429         if (!(in_le32(&reg->cqr) & (1 << tag))) {
430                 val32 = 1 << tag;
431                 out_le32(&reg->cqr, val32);
432         }
433
434         /* Wait command completed for 10s */
435         if (ata_wait_register(&reg->ccr, (1 << tag), (1 << tag), 10000)) {
436                 if (!is_ncq)
437                         printf("Non-NCQ command time out\n\r");
438                 else
439                         printf("NCQ command time out\n\r");
440         }
441
442         val32 = in_le32(&reg->cer);
443
444         if (val32) {
445                 u32 der;
446                 fsl_sata_dump_sfis((struct sata_fis_d2h *)cmd_desc->sfis);
447                 printf("CE at device\n\r");
448                 fsl_sata_dump_regs(reg);
449                 der = in_le32(&reg->der);
450                 out_le32(&reg->cer, val32);
451                 out_le32(&reg->der, der);
452         }
453
454         /* Clear complete flags */
455         val32 = in_le32(&reg->ccr);
456         out_le32(&reg->ccr, val32);
457
458         return len;
459 }
460
461 static int fsl_ata_exec_reset_cmd(struct fsl_sata *sata, struct sata_fis_h2d *cfis,
462                                  int tag, u8 *buffer, u32 len)
463 {
464         return 0;
465 }
466
467 static int fsl_sata_exec_cmd(struct fsl_sata *sata, struct sata_fis_h2d *cfis,
468                  enum cmd_type command_type, int tag, u8 *buffer, u32 len)
469 {
470         int rc;
471
472         if (tag > SATA_HC_MAX_CMD || tag < 0) {
473                 printf("tag is out of range, tag=%d\n\r", tag);
474                 return -1;
475         }
476
477         switch (command_type) {
478         case CMD_ATA:
479                 rc = fsl_ata_exec_ata_cmd(sata, cfis, 0, tag, buffer, len);
480                 return rc;
481         case CMD_RESET:
482                 rc = fsl_ata_exec_reset_cmd(sata, cfis, tag, buffer, len);
483                 return rc;
484         case CMD_NCQ:
485                 rc = fsl_ata_exec_ata_cmd(sata, cfis, 1, tag, buffer, len);
486                 return rc;
487         case CMD_ATAPI:
488         case CMD_VENDOR_BIST:
489         case CMD_BIST:
490                 printf("not support now\n\r");
491                 return -1;
492         default:
493                 break;
494         }
495
496         return -1;
497 }
498
499 static void fsl_sata_xfer_mode(fsl_sata_t *sata, u16 *id)
500 {
501         sata->pio = id[ATA_ID_PIO_MODES];
502         sata->mwdma = id[ATA_ID_MWDMA_MODES];
503         sata->udma = id[ATA_ID_UDMA_MODES];
504         debug("pio %04x, mwdma %04x, udma %04x\n\r", sata->pio, sata->mwdma, sata->udma);
505 }
506
507 static void fsl_sata_set_features(fsl_sata_t *sata)
508 {
509         struct sata_fis_h2d h2d, *cfis = &h2d;
510         u8 udma_cap;
511
512         memset(cfis, 0, sizeof(struct sata_fis_h2d));
513
514         cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
515         cfis->pm_port_c = 0x80; /* is command */
516         cfis->command = ATA_CMD_SET_FEATURES;
517         cfis->features = SETFEATURES_XFER;
518
519         /* First check the device capablity */
520         udma_cap = (u8)(sata->udma & 0xff);
521         debug("udma_cap %02x\n\r", udma_cap);
522
523         if (udma_cap == ATA_UDMA6)
524                 cfis->sector_count = XFER_UDMA_6;
525         if (udma_cap == ATA_UDMA5)
526                 cfis->sector_count = XFER_UDMA_5;
527         if (udma_cap == ATA_UDMA4)
528                 cfis->sector_count = XFER_UDMA_4;
529         if (udma_cap == ATA_UDMA3)
530                 cfis->sector_count = XFER_UDMA_3;
531
532         fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, NULL, 0);
533 }
534
535 static u32 fsl_sata_rw_cmd(fsl_sata_t *sata, u32 start, u32 blkcnt, u8 *buffer,
536                            int is_write)
537 {
538         struct sata_fis_h2d h2d, *cfis = &h2d;
539         u32 block;
540
541         block = start;
542
543         memset(cfis, 0, sizeof(struct sata_fis_h2d));
544
545         cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
546         cfis->pm_port_c = 0x80; /* is command */
547         cfis->command = (is_write) ? ATA_CMD_WRITE : ATA_CMD_READ;
548         cfis->device = ATA_LBA;
549
550         cfis->device |= (block >> 24) & 0xf;
551         cfis->lba_high = (block >> 16) & 0xff;
552         cfis->lba_mid = (block >> 8) & 0xff;
553         cfis->lba_low = block & 0xff;
554         cfis->sector_count = (u8)(blkcnt & 0xff);
555
556         fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, buffer, ATA_SECT_SIZE * blkcnt);
557         return blkcnt;
558 }
559
560 static void fsl_sata_flush_cache(fsl_sata_t *sata)
561 {
562         struct sata_fis_h2d h2d, *cfis = &h2d;
563
564         memset(cfis, 0, sizeof(struct sata_fis_h2d));
565
566         cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
567         cfis->pm_port_c = 0x80; /* is command */
568         cfis->command = ATA_CMD_FLUSH;
569
570         fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, NULL, 0);
571 }
572
573 static u32 fsl_sata_rw_cmd_ext(fsl_sata_t *sata, u32 start, u32 blkcnt,
574                                u8 *buffer, int is_write)
575 {
576         struct sata_fis_h2d h2d, *cfis = &h2d;
577         u64 block;
578
579         block = (u64)start;
580
581         memset(cfis, 0, sizeof(struct sata_fis_h2d));
582
583         cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
584         cfis->pm_port_c = 0x80; /* is command */
585
586         cfis->command = (is_write) ? ATA_CMD_WRITE_EXT
587                                  : ATA_CMD_READ_EXT;
588
589         cfis->lba_high_exp = (block >> 40) & 0xff;
590         cfis->lba_mid_exp = (block >> 32) & 0xff;
591         cfis->lba_low_exp = (block >> 24) & 0xff;
592         cfis->lba_high = (block >> 16) & 0xff;
593         cfis->lba_mid = (block >> 8) & 0xff;
594         cfis->lba_low = block & 0xff;
595         cfis->device = ATA_LBA;
596         cfis->sector_count_exp = (blkcnt >> 8) & 0xff;
597         cfis->sector_count = blkcnt & 0xff;
598
599         fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, buffer, ATA_SECT_SIZE * blkcnt);
600         return blkcnt;
601 }
602
603 static u32 fsl_sata_rw_ncq_cmd(fsl_sata_t *sata, u32 start, u32 blkcnt,
604                                u8 *buffer, int is_write)
605 {
606         struct sata_fis_h2d h2d, *cfis = &h2d;
607         int ncq_channel;
608         u64 block;
609
610         if (sata->lba48 != 1) {
611                 printf("execute FPDMA command on non-LBA48 hard disk\n\r");
612                 return -1;
613         }
614
615         block = (u64)start;
616
617         memset(cfis, 0, sizeof(struct sata_fis_h2d));
618
619         cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
620         cfis->pm_port_c = 0x80; /* is command */
621
622         cfis->command = (is_write) ? ATA_CMD_FPDMA_WRITE
623                                  : ATA_CMD_FPDMA_READ;
624
625         cfis->lba_high_exp = (block >> 40) & 0xff;
626         cfis->lba_mid_exp = (block >> 32) & 0xff;
627         cfis->lba_low_exp = (block >> 24) & 0xff;
628         cfis->lba_high = (block >> 16) & 0xff;
629         cfis->lba_mid = (block >> 8) & 0xff;
630         cfis->lba_low = block & 0xff;
631
632         cfis->device = ATA_LBA;
633         cfis->features_exp = (blkcnt >> 8) & 0xff;
634         cfis->features = blkcnt & 0xff;
635
636         if (sata->queue_depth >= SATA_HC_MAX_CMD)
637                 ncq_channel = SATA_HC_MAX_CMD - 1;
638         else
639                 ncq_channel = sata->queue_depth - 1;
640
641         /* Use the latest queue */
642         fsl_sata_exec_cmd(sata, cfis, CMD_NCQ, ncq_channel, buffer, ATA_SECT_SIZE * blkcnt);
643         return blkcnt;
644 }
645
646 static void fsl_sata_flush_cache_ext(fsl_sata_t *sata)
647 {
648         struct sata_fis_h2d h2d, *cfis = &h2d;
649
650         memset(cfis, 0, sizeof(struct sata_fis_h2d));
651
652         cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
653         cfis->pm_port_c = 0x80; /* is command */
654         cfis->command = ATA_CMD_FLUSH_EXT;
655
656         fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, NULL, 0);
657 }
658
659 static void fsl_sata_init_wcache(fsl_sata_t *sata, u16 *id)
660 {
661         if (ata_id_has_wcache(id) && ata_id_wcache_enabled(id))
662                 sata->wcache = 1;
663         if (ata_id_has_flush(id))
664                 sata->flush = 1;
665         if (ata_id_has_flush_ext(id))
666                 sata->flush_ext = 1;
667 }
668
669 static u32 ata_low_level_rw_lba48(fsl_sata_t *sata, u32 blknr, lbaint_t blkcnt,
670                                   const void *buffer, int is_write)
671 {
672         u32 start, blks;
673         u8 *addr;
674         int max_blks;
675
676         start = blknr;
677         blks = blkcnt;
678         addr = (u8 *)buffer;
679
680         max_blks = ATA_MAX_SECTORS_LBA48;
681         do {
682                 if (blks > max_blks) {
683                         if (sata->dma_flag != FLAGS_FPDMA)
684                                 fsl_sata_rw_cmd_ext(sata, start, max_blks, addr,
685                                                     is_write);
686                         else
687                                 fsl_sata_rw_ncq_cmd(sata, start, max_blks, addr,
688                                                     is_write);
689                         start += max_blks;
690                         blks -= max_blks;
691                         addr += ATA_SECT_SIZE * max_blks;
692                 } else {
693                         if (sata->dma_flag != FLAGS_FPDMA)
694                                 fsl_sata_rw_cmd_ext(sata, start, blks, addr,
695                                                     is_write);
696                         else
697                                 fsl_sata_rw_ncq_cmd(sata, start, blks, addr,
698                                                     is_write);
699                         start += blks;
700                         blks = 0;
701                         addr += ATA_SECT_SIZE * blks;
702                 }
703         } while (blks != 0);
704
705         return blkcnt;
706 }
707
708 static u32 ata_low_level_rw_lba28(fsl_sata_t *sata, u32 blknr, u32 blkcnt,
709                                   const void *buffer, int is_write)
710 {
711         u32 start, blks;
712         u8 *addr;
713         int max_blks;
714
715         start = blknr;
716         blks = blkcnt;
717         addr = (u8 *)buffer;
718
719         max_blks = ATA_MAX_SECTORS;
720         do {
721                 if (blks > max_blks) {
722                         fsl_sata_rw_cmd(sata, start, max_blks, addr, is_write);
723                         start += max_blks;
724                         blks -= max_blks;
725                         addr += ATA_SECT_SIZE * max_blks;
726                 } else {
727                         fsl_sata_rw_cmd(sata, start, blks, addr, is_write);
728                         start += blks;
729                         blks = 0;
730                         addr += ATA_SECT_SIZE * blks;
731                 }
732         } while (blks != 0);
733
734         return blkcnt;
735 }
736
737 /*
738  * SATA interface between low level driver and command layer
739  */
740 #if !CONFIG_IS_ENABLED(BLK)
741 ulong sata_read(int dev, ulong blknr, lbaint_t blkcnt, void *buffer)
742 {
743         fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
744 #else
745 static ulong sata_read(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
746                        void *buffer)
747 {
748         struct fsl_ata_priv *priv = dev_get_platdata(dev);
749         fsl_sata_t *sata = priv->fsl_sata;
750 #endif
751         u32 rc;
752
753         if (sata->lba48)
754                 rc = ata_low_level_rw_lba48(sata, blknr, blkcnt, buffer,
755                                             READ_CMD);
756         else
757                 rc = ata_low_level_rw_lba28(sata, blknr, blkcnt, buffer,
758                                             READ_CMD);
759         return rc;
760 }
761
762 #if !CONFIG_IS_ENABLED(BLK)
763 ulong sata_write(int dev, ulong blknr, lbaint_t blkcnt, const void *buffer)
764 {
765         fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
766 #else
767 static ulong sata_write(struct udevice *dev, lbaint_t blknr, lbaint_t blkcnt,
768                         const void *buffer)
769 {
770         struct fsl_ata_priv *priv = dev_get_platdata(dev);
771         fsl_sata_t *sata = priv->fsl_sata;
772 #endif
773         u32 rc;
774
775         if (sata->lba48) {
776                 rc = ata_low_level_rw_lba48(sata, blknr, blkcnt, buffer,
777                                             WRITE_CMD);
778                 if (sata->wcache && sata->flush_ext)
779                         fsl_sata_flush_cache_ext(sata);
780         } else {
781                 rc = ata_low_level_rw_lba28(sata, blknr, blkcnt, buffer,
782                                             WRITE_CMD);
783                 if (sata->wcache && sata->flush)
784                         fsl_sata_flush_cache(sata);
785         }
786         return rc;
787 }
788
789 static void fsl_sata_identify(fsl_sata_t *sata, u16 *id)
790 {
791         struct sata_fis_h2d h2d, *cfis = &h2d;
792
793         memset(cfis, 0, sizeof(struct sata_fis_h2d));
794
795         cfis->fis_type = SATA_FIS_TYPE_REGISTER_H2D;
796         cfis->pm_port_c = 0x80; /* is command */
797         cfis->command = ATA_CMD_ID_ATA;
798
799         fsl_sata_exec_cmd(sata, cfis, CMD_ATA, 0, (u8 *)id, ATA_ID_WORDS * 2);
800         ata_swap_buf_le16(id, ATA_ID_WORDS);
801 }
802
803 #if !CONFIG_IS_ENABLED(BLK)
804 int scan_sata(int dev)
805 {
806         fsl_sata_t *sata = (fsl_sata_t *)sata_dev_desc[dev].priv;
807 #else
808 static int scan_sata(struct udevice *dev)
809 {
810         struct blk_desc *desc = dev_get_uclass_platdata(dev);
811         struct fsl_ata_priv *priv = dev_get_platdata(dev);
812         fsl_sata_t *sata = priv->fsl_sata;
813 #endif
814
815         unsigned char serial[ATA_ID_SERNO_LEN + 1];
816         unsigned char firmware[ATA_ID_FW_REV_LEN + 1];
817         unsigned char product[ATA_ID_PROD_LEN + 1];
818         u16 *id;
819         u64 n_sectors;
820
821         /* if no detected link */
822         if (!sata->link)
823                 return -1;
824
825         id = (u16 *)malloc(ATA_ID_WORDS * 2);
826         if (!id) {
827                 printf("id malloc failed\n\r");
828                 return -1;
829         }
830
831         /* Identify device to get information */
832         fsl_sata_identify(sata, id);
833
834         /* Serial number */
835         ata_id_c_string(id, serial, ATA_ID_SERNO, sizeof(serial));
836
837         /* Firmware version */
838         ata_id_c_string(id, firmware, ATA_ID_FW_REV, sizeof(firmware));
839
840         /* Product model */
841         ata_id_c_string(id, product, ATA_ID_PROD, sizeof(product));
842
843         /* Totoal sectors */
844         n_sectors = ata_id_n_sectors(id);
845
846 #ifdef CONFIG_LBA48
847         /* Check if support LBA48 */
848         if (ata_id_has_lba48(id)) {
849                 sata->lba48 = 1;
850                 debug("Device support LBA48\n\r");
851         } else
852                 debug("Device supports LBA28\n\r");
853 #endif
854
855 #if !CONFIG_IS_ENABLED(BLK)
856         memcpy(sata_dev_desc[dev].product, serial, sizeof(serial));
857         memcpy(sata_dev_desc[dev].revision, firmware, sizeof(firmware));
858         memcpy(sata_dev_desc[dev].vendor, product, sizeof(product));
859         sata_dev_desc[dev].lba = (u32)n_sectors;
860 #ifdef CONFIG_LBA48
861         sata_dev_desc[dev].lba48 = sata->lba48;
862 #endif
863 #else
864         memcpy(desc->product, serial, sizeof(serial));
865         memcpy(desc->revision, firmware, sizeof(firmware));
866         memcpy(desc->vendor, product, sizeof(product));
867         desc->lba = n_sectors;
868 #ifdef CONFIG_LBA48
869         desc->lba48 = sata->lba48;
870 #endif
871 #endif
872
873         /* Get the NCQ queue depth from device */
874         sata->queue_depth = ata_id_queue_depth(id);
875
876         /* Get the xfer mode from device */
877         fsl_sata_xfer_mode(sata, id);
878
879         /* Get the write cache status from device */
880         fsl_sata_init_wcache(sata, id);
881
882         /* Set the xfer mode to highest speed */
883         fsl_sata_set_features(sata);
884
885 #ifdef DEBUG
886         ata_dump_id(id);
887 #endif
888         free((void *)id);
889         return 0;
890 }
891
892 #if CONFIG_IS_ENABLED(BLK)
893 static const struct blk_ops sata_fsl_blk_ops = {
894         .read   = sata_read,
895         .write  = sata_write,
896 };
897
898 U_BOOT_DRIVER(sata_fsl_driver) = {
899         .name = "sata_fsl_blk",
900         .id = UCLASS_BLK,
901         .ops = &sata_fsl_blk_ops,
902         .platdata_auto_alloc_size = sizeof(struct fsl_ata_priv),
903 };
904
905 static int fsl_ata_ofdata_to_platdata(struct udevice *dev)
906 {
907         struct fsl_ata_priv *priv = dev_get_priv(dev);
908
909         priv->number = dev_read_u32_default(dev, "sata-number", -1);
910         priv->flag = dev_read_u32_default(dev, "sata-fpdma", -1);
911         priv->offset = dev_read_u32_default(dev, "sata-offset", -1);
912
913         priv->base = dev_read_addr(dev);
914         if (priv->base == FDT_ADDR_T_NONE)
915                 return -EINVAL;
916
917         return 0;
918 }
919
920 static int fsl_ata_probe(struct udevice *dev)
921 {
922         struct fsl_ata_priv *blk_priv, *priv;
923         struct udevice *blk;
924         char sata_name[10];
925         int nr_ports;
926         int ret;
927         int i;
928
929         priv = dev_get_priv(dev);
930         nr_ports = priv->number;
931         nr_ports = min(nr_ports, CONFIG_SYS_SATA_MAX_DEVICE);
932
933         for (i = 0; i < nr_ports; i++) {
934                 snprintf(sata_name, sizeof(sata_name), "fsl_sata%d", i);
935                 ret = blk_create_devicef(dev, "sata_fsl_blk", sata_name,
936                                          IF_TYPE_SATA, -1, 512, 0, &blk);
937                 if (ret) {
938                         debug("Can't create device\n");
939                         return ret;
940                 }
941
942                 /* Init SATA port */
943                 ret = init_sata(priv, i);
944                 if (ret) {
945                         debug("%s: Failed to init sata\n", __func__);
946                         return ret;
947                 }
948
949                 blk_priv = dev_get_platdata(blk);
950                 blk_priv->fsl_sata = priv->fsl_sata;
951                 /* Scan SATA port */
952                 ret = scan_sata(blk);
953                 if (ret) {
954                         debug("%s: Failed to scan bus\n", __func__);
955                         return ret;
956                 }
957         }
958
959         return 0;
960 }
961
962 static int sata_fsl_scan(struct udevice *dev)
963 {
964         /* Nothing to do here */
965
966         return 0;
967 }
968
969 struct ahci_ops sata_fsl_ahci_ops = {
970         .scan = sata_fsl_scan,
971 };
972
973 static const struct udevice_id fsl_ata_ids[] = {
974         { .compatible = "fsl,pq-sata-v2" },
975         { }
976 };
977
978 U_BOOT_DRIVER(fsl_ahci) = {
979         .name   = "fsl_ahci",
980         .id = UCLASS_AHCI,
981         .of_match = fsl_ata_ids,
982         .ops = &sata_fsl_ahci_ops,
983         .ofdata_to_platdata = fsl_ata_ofdata_to_platdata,
984         .probe  = fsl_ata_probe,
985         .priv_auto_alloc_size = sizeof(struct fsl_ata_priv),
986 };
987 #endif