1 // SPDX-License-Identifier: GPL-2.0+
3 * (C) Copyright 2017, Fuzhou Rockchip Electronics Co., Ltd
5 * Rockchip SARADC driver for U-Boot
15 #define SARADC_CTRL_CHN_MASK GENMASK(2, 0)
16 #define SARADC_CTRL_POWER_CTRL BIT(3)
17 #define SARADC_CTRL_IRQ_ENABLE BIT(5)
18 #define SARADC_CTRL_IRQ_STATUS BIT(6)
20 #define SARADC_TIMEOUT (100 * 1000)
22 struct rockchip_saradc_regs {
26 unsigned int dly_pu_soc;
29 struct rockchip_saradc_data {
32 unsigned long clk_rate;
35 struct rockchip_saradc_priv {
36 struct rockchip_saradc_regs *regs;
38 const struct rockchip_saradc_data *data;
41 int rockchip_saradc_channel_data(struct udevice *dev, int channel,
44 struct rockchip_saradc_priv *priv = dev_get_priv(dev);
45 struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
47 if (channel != priv->active_channel) {
48 pr_err("Requested channel is not active!");
52 if ((readl(&priv->regs->ctrl) & SARADC_CTRL_IRQ_STATUS) !=
53 SARADC_CTRL_IRQ_STATUS)
57 *data = readl(&priv->regs->data);
58 *data &= uc_pdata->data_mask;
61 writel(0, &priv->regs->ctrl);
66 int rockchip_saradc_start_channel(struct udevice *dev, int channel)
68 struct rockchip_saradc_priv *priv = dev_get_priv(dev);
70 if (channel < 0 || channel >= priv->data->num_channels) {
71 pr_err("Requested channel is invalid!");
75 /* 8 clock periods as delay between power up and start cmd */
76 writel(8, &priv->regs->dly_pu_soc);
78 /* Select the channel to be used and trigger conversion */
79 writel(SARADC_CTRL_POWER_CTRL | (channel & SARADC_CTRL_CHN_MASK) |
80 SARADC_CTRL_IRQ_ENABLE, &priv->regs->ctrl);
82 priv->active_channel = channel;
87 int rockchip_saradc_stop(struct udevice *dev)
89 struct rockchip_saradc_priv *priv = dev_get_priv(dev);
92 writel(0, &priv->regs->ctrl);
94 priv->active_channel = -1;
99 int rockchip_saradc_probe(struct udevice *dev)
101 struct rockchip_saradc_priv *priv = dev_get_priv(dev);
105 ret = clk_get_by_index(dev, 0, &clk);
109 ret = clk_set_rate(&clk, priv->data->clk_rate);
110 if (IS_ERR_VALUE(ret))
113 priv->active_channel = -1;
118 int rockchip_saradc_ofdata_to_platdata(struct udevice *dev)
120 struct adc_uclass_platdata *uc_pdata = dev_get_uclass_platdata(dev);
121 struct rockchip_saradc_priv *priv = dev_get_priv(dev);
122 struct rockchip_saradc_data *data;
124 data = (struct rockchip_saradc_data *)dev_get_driver_data(dev);
125 priv->regs = (struct rockchip_saradc_regs *)dev_read_addr(dev);
126 if (priv->regs == (struct rockchip_saradc_regs *)FDT_ADDR_T_NONE) {
127 pr_err("Dev: %s - can't get address!", dev->name);
132 uc_pdata->data_mask = (1 << priv->data->num_bits) - 1;;
133 uc_pdata->data_format = ADC_DATA_FORMAT_BIN;
134 uc_pdata->data_timeout_us = SARADC_TIMEOUT / 5;
135 uc_pdata->channel_mask = (1 << priv->data->num_channels) - 1;
140 static const struct adc_ops rockchip_saradc_ops = {
141 .start_channel = rockchip_saradc_start_channel,
142 .channel_data = rockchip_saradc_channel_data,
143 .stop = rockchip_saradc_stop,
146 static const struct rockchip_saradc_data saradc_data = {
152 static const struct rockchip_saradc_data rk3066_tsadc_data = {
158 static const struct rockchip_saradc_data rk3399_saradc_data = {
164 static const struct udevice_id rockchip_saradc_ids[] = {
165 { .compatible = "rockchip,saradc",
166 .data = (ulong)&saradc_data },
167 { .compatible = "rockchip,rk3066-tsadc",
168 .data = (ulong)&rk3066_tsadc_data },
169 { .compatible = "rockchip,rk3399-saradc",
170 .data = (ulong)&rk3399_saradc_data },
174 U_BOOT_DRIVER(rockchip_saradc) = {
175 .name = "rockchip_saradc",
177 .of_match = rockchip_saradc_ids,
178 .ops = &rockchip_saradc_ops,
179 .probe = rockchip_saradc_probe,
180 .ofdata_to_platdata = rockchip_saradc_ofdata_to_platdata,
181 .priv_auto_alloc_size = sizeof(struct rockchip_saradc_priv),