2 # Copyright (C) 2015 Google. Inc
3 # Written by Simon Glass <sjg@chromium.org>
5 # SPDX-License-Identifier: GPL-2.0+
11 There are several repositories available with versions of U-Boot that support
12 many Rockchip devices [1] [2].
14 The current mainline support is experimental only and is not useful for
15 anything. It should provide a base on which to build.
17 So far only support for the RK3288 is provided.
25 - Firefly RK3288 baord
26 - Power connection to 5V using the supplied micro-USB power cable
27 - Separate USB serial cable attached to your computer and the Firefly
28 (connect to the micro-USB connector below the logo)
30 - openssl (sudo apt-get install openssl)
31 - Serial UART connection [4]
32 - Suitable ARM cross compiler, e.g.:
33 sudo apt-get install gcc-4.7-arm-linux-gnueabi
39 At present three RK3288 boards are supported:
41 - Firefly RK3288 - use firefly-rk3288 configuration
42 - Radxa Rock 2 - use rock2 configuration
43 - Haier Chromebook - use chromebook_jerry configuration
45 one RK3036 board is support:
47 - EVB RK3036 - use evb-rk3036_defconfig configuration
51 CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all
53 (or you can use another cross compiler if you prefer)
56 Writing to the board with USB
57 =============================
59 For USB to work you must get your board into ROM boot mode, either by erasing
60 your MMC or (perhaps) holding the recovery button when you boot the board.
61 To erase your MMC, you can boot into Linux and type (as root)
63 dd if=/dev/zero of=/dev/mmcblk0 bs=1M
65 Connect your board's OTG port to your computer.
67 To create a suitable image and write it to the board:
69 ./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \
70 ./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
71 cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l
73 If all goes well you should something like:
75 U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49)
76 Card did not respond to voltage select!
77 spl: mmc init failed with error: -17
78 ### ERROR ### Please RESET the board ###
80 You will need to reset the board before each time you try. Yes, that's all
81 it does so far. If support for the Rockchip USB protocol or DFU were added
82 in SPL then we could in principle load U-Boot and boot to a prompt from USB
83 as several other platforms do. However it does not seem to be possible to
84 use the existing boot ROM code from SPL.
87 Booting from an SD card
88 =======================
90 To write an image that boots from an SD card (assumed to be /dev/sdc):
92 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
93 firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
94 sudo dd if=out of=/dev/sdc seek=64 && \
95 sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=256
97 This puts the Rockchip header and SPL image first and then places the U-Boot
98 image at block 256 (i.e. 128KB from the start of the SD card). This
99 corresponds with this setting in U-Boot:
101 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256
103 Put this SD (or micro-SD) card into your board and reset it. You should see
106 U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 11:04:40)
109 U-Boot 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 11:04:40)
113 Using default environment
120 For evb_rk3036 board:
121 ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d evb-rk3036/spl/u-boot-spl.bin out && \
122 cat evb-rk3036/u-boot-dtb.bin >> out && \
123 sudo dd if=out of=/dev/sdc seek=64
125 Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the
126 debug uart must be disabled
131 To write an image that boots from SPI flash (e.g. for the Haier Chromebook):
133 ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \
134 -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \
135 dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \
136 cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \
137 dd if=out.bin of=out.bin.pad bs=4M conv=sync
139 This converts the SPL image to the required SPI format by adding the Rockchip
140 header and skipping every 2KB block. Then the U-Boot image is written at
141 offset 128KB and the whole image is padded to 4MB which is the SPI flash size.
142 The position of U-Boot is controlled with this setting in U-Boot:
144 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
146 If you have a Dediprog em100pro connected then you can write the image with:
148 sudo em100 -s -c GD25LQ32 -d out.bin.pad -r
150 When booting you should see something like:
152 U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32)
155 U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600)
160 Using default environment
171 Immediate priorities are:
173 - GPIO (driver exists but is lightly tested)
174 - I2C (driver exists but is non-functional)
177 - PMIC and regulators (only ACT8846 is supported at present)
179 - Run CPU at full speed
182 - Support for other Rockchip parts
183 - Boot U-Boot proper over USB OTG (at present only SPL works)
189 There are plenty of patches in the links below to help with this work.
191 [1] https://github.com/rkchrome/uboot.git
192 [2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288
193 [3] https://github.com/linux-rockchip/rkflashtool.git
194 [4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en
199 rkimage.c produces an SPL image suitable for sending directly to the boot ROM
200 over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes)
201 followed by u-boot-spl-dtb.bin.
203 The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM
204 starts at 0xff700000 and extends to 0xff718000 where we put the stack.
209 rksd.c produces an image consisting of 32KB of empty space, a header and
210 u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although
211 most of the fields are unused by U-Boot. We just need to specify the
212 signature, a flag and the block offset and size of the SPL image.
214 The header occupies a single block but we pad it out to 4 blocks. The header
215 is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL
216 image can be encoded too but we don't do that.
218 The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB,
219 or 0x40 blocks. This is a severe and annoying limitation. There may be a way
220 around this limitation, since there is plenty of SRAM, but at present the
221 board refuses to boot if this limit is exceeded.
223 The image produced is padded up to a block boundary (512 bytes). It should be
224 written to the start of an SD card using dd.
226 Since this image is set to load U-Boot from the SD card at block offset,
227 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write
228 u-boot-dtb.img to the SD card at that offset. See above for instructions.
233 rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The
234 resulting image is then spread out so that only the first 2KB of each 4KB
235 sector is used. The header is the same as with rksd and the maximum size is
236 also 32KB (before spreading). The image should be written to the start of
239 See above for instructions on how to write a SPI image.
244 You can use this script to create #defines for SoC register access. See the
248 Device tree and driver model
249 ----------------------------
251 Where possible driver model is used to provide a structure to the
252 functionality. Device tree is used for configuration. However these have an
253 overhead and in SPL with a 32KB size limit some shortcuts have been taken.
254 In general all Rockchip drivers should use these features, with SPL-specific
255 modifications where required.
259 Simon Glass <sjg@chromium.org>