2 # Copyright (C) 2015 Google. Inc
3 # Written by Simon Glass <sjg@chromium.org>
5 # SPDX-License-Identifier: GPL-2.0+
11 There are several repositories available with versions of U-Boot that support
12 many Rockchip devices [1] [2].
14 The current mainline support is experimental only and is not useful for
15 anything. It should provide a base on which to build.
17 So far only support for the RK3288 and RK3036 is provided.
25 - Firefly RK3288 board or something else with a supported RockChip SoC
26 - Power connection to 5V using the supplied micro-USB power cable
27 - Separate USB serial cable attached to your computer and the Firefly
28 (connect to the micro-USB connector below the logo)
30 - openssl (sudo apt-get install openssl)
31 - Serial UART connection [4]
32 - Suitable ARM cross compiler, e.g.:
33 sudo apt-get install gcc-4.7-arm-linux-gnueabi
39 At present four RK3288 boards are supported:
41 - Firefly RK3288 - use firefly-rk3288 configuration
42 - Radxa Rock 2 - use rock2 configuration
43 - Hisense Chromebook - use chromebook_jerry configuration
44 - EVB RK3288 - use evb-rk3288 configuration
46 Two RK3036 board are supported:
48 - EVB RK3036 - use evb-rk3036 configuration
49 - Kylin - use kylin_rk3036 configuration
53 CROSS_COMPILE=arm-linux-gnueabi- make O=firefly firefly-rk3288_defconfig all
55 (or you can use another cross compiler if you prefer)
58 Writing to the board with USB
59 =============================
61 For USB to work you must get your board into ROM boot mode, either by erasing
62 your MMC or (perhaps) holding the recovery button when you boot the board.
63 To erase your MMC, you can boot into Linux and type (as root)
65 dd if=/dev/zero of=/dev/mmcblk0 bs=1M
67 Connect your board's OTG port to your computer.
69 To create a suitable image and write it to the board:
71 ./firefly-rk3288/tools/mkimage -n rk3288 -T rkimage -d \
72 ./firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
73 cat out | openssl rc4 -K 7c4e0304550509072d2c7b38170d1711 | rkflashtool l
75 If all goes well you should something like:
77 U-Boot SPL 2015.07-rc1-00383-ge345740-dirty (Jun 03 2015 - 10:06:49)
78 Card did not respond to voltage select!
79 spl: mmc init failed with error: -17
80 ### ERROR ### Please RESET the board ###
82 You will need to reset the board before each time you try. Yes, that's all
83 it does so far. If support for the Rockchip USB protocol or DFU were added
84 in SPL then we could in principle load U-Boot and boot to a prompt from USB
85 as several other platforms do. However it does not seem to be possible to
86 use the existing boot ROM code from SPL.
89 Booting from an SD card
90 =======================
92 To write an image that boots from an SD card (assumed to be /dev/sdc):
94 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
95 firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
96 sudo dd if=out of=/dev/sdc seek=64 && \
97 sudo dd if=firefly-rk3288/u-boot-dtb.img of=/dev/sdc seek=256
99 This puts the Rockchip header and SPL image first and then places the U-Boot
100 image at block 256 (i.e. 128KB from the start of the SD card). This
101 corresponds with this setting in U-Boot:
103 #define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR 256
105 Put this SD (or micro-SD) card into your board and reset it. You should see
108 U-Boot 2016.01-rc2-00309-ge5bad3b-dirty (Jan 02 2016 - 23:41:59 -0700)
110 Model: Radxa Rock 2 Square
112 MMC: dwmmc@ff0f0000: 0, dwmmc@ff0c0000: 1
113 *** Warning - bad CRC, using default environment
116 Out: vop@ff940000.vidconsole
118 Net: Net Initialization Skipped
120 Hit any key to stop autoboot: 0
123 The rockchip bootrom can load and boot an initial spl, then continue to
124 load a second-level bootloader(ie. U-BOOT) as soon as it returns to bootrom.
125 Therefore RK3288 has another loading sequence like RK3036. The option of
126 U-Boot is controlled with this setting in U-Boot:
128 #define CONFIG_ROCKCHIP_SPL_BACK_TO_BROM
130 You can create the image via the following operations:
132 ./firefly-rk3288/tools/mkimage -n rk3288 -T rksd -d \
133 firefly-rk3288/spl/u-boot-spl-dtb.bin out && \
134 cat firefly-rk3288/u-boot-dtb.bin >> out && \
135 sudo dd if=out of=/dev/sdc seek=64
137 If you have an HDMI cable attached you should see a video console.
139 For evb_rk3036 board:
140 ./evb-rk3036/tools/mkimage -n rk3036 -T rksd -d evb-rk3036/spl/u-boot-spl.bin out && \
141 cat evb-rk3036/u-boot-dtb.bin >> out && \
142 sudo dd if=out of=/dev/sdc seek=64
144 Note: rk3036 SDMMC and debug uart use the same iomux, so if you boot from SD, the
145 debug uart must be disabled
150 To write an image that boots from SPI flash (e.g. for the Haier Chromebook):
152 ./chromebook_jerry/tools/mkimage -n rk3288 -T rkspi \
153 -d chromebook_jerry/spl/u-boot-spl-dtb.bin spl.bin && \
154 dd if=spl.bin of=spl-out.bin bs=128K conv=sync && \
155 cat spl-out.bin chromebook_jerry/u-boot-dtb.img >out.bin && \
156 dd if=out.bin of=out.bin.pad bs=4M conv=sync
158 This converts the SPL image to the required SPI format by adding the Rockchip
159 header and skipping every 2KB block. Then the U-Boot image is written at
160 offset 128KB and the whole image is padded to 4MB which is the SPI flash size.
161 The position of U-Boot is controlled with this setting in U-Boot:
163 #define CONFIG_SYS_SPI_U_BOOT_OFFS (128 << 10)
165 If you have a Dediprog em100pro connected then you can write the image with:
167 sudo em100 -s -c GD25LQ32 -d out.bin.pad -r
169 When booting you should see something like:
171 U-Boot SPL 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32)
174 U-Boot 2015.07-rc2-00215-g9a58220-dirty (Jun 23 2015 - 12:11:32 -0600)
179 Using default environment
190 Immediate priorities are:
194 - Run CPU at full speed (code exists but we only see ~60 DMIPS maximum)
197 - Support for other Rockchip parts
198 - Boot U-Boot proper over USB OTG (at present only SPL works)
204 There are plenty of patches in the links below to help with this work.
206 [1] https://github.com/rkchrome/uboot.git
207 [2] https://github.com/linux-rockchip/u-boot-rockchip.git branch u-boot-rk3288
208 [3] https://github.com/linux-rockchip/rkflashtool.git
209 [4] http://wiki.t-firefly.com/index.php/Firefly-RK3288/Serial_debug/en
214 rkimage.c produces an SPL image suitable for sending directly to the boot ROM
215 over USB OTG. This is a very simple format - just the string RK32 (as 4 bytes)
216 followed by u-boot-spl-dtb.bin.
218 The boot ROM loads image to 0xff704000 which is in the internal SRAM. The SRAM
219 starts at 0xff700000 and extends to 0xff718000 where we put the stack.
224 rksd.c produces an image consisting of 32KB of empty space, a header and
225 u-boot-spl-dtb.bin. The header is defined by 'struct header0_info' although
226 most of the fields are unused by U-Boot. We just need to specify the
227 signature, a flag and the block offset and size of the SPL image.
229 The header occupies a single block but we pad it out to 4 blocks. The header
230 is encoding using RC4 with the key 7c4e0304550509072d2c7b38170d1711. The SPL
231 image can be encoded too but we don't do that.
233 The maximum size of u-boot-spl-dtb.bin which the boot ROM will read is 32KB,
234 or 0x40 blocks. This is a severe and annoying limitation. There may be a way
235 around this limitation, since there is plenty of SRAM, but at present the
236 board refuses to boot if this limit is exceeded.
238 The image produced is padded up to a block boundary (512 bytes). It should be
239 written to the start of an SD card using dd.
241 Since this image is set to load U-Boot from the SD card at block offset,
242 CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR, dd should be used to write
243 u-boot-dtb.img to the SD card at that offset. See above for instructions.
248 rkspi.c produces an image consisting of a header and u-boot-spl-dtb.bin. The
249 resulting image is then spread out so that only the first 2KB of each 4KB
250 sector is used. The header is the same as with rksd and the maximum size is
251 also 32KB (before spreading). The image should be written to the start of
254 See above for instructions on how to write a SPI image.
259 You can use this script to create #defines for SoC register access. See the
263 Device tree and driver model
264 ----------------------------
266 Where possible driver model is used to provide a structure to the
267 functionality. Device tree is used for configuration. However these have an
268 overhead and in SPL with a 32KB size limit some shortcuts have been taken.
269 In general all Rockchip drivers should use these features, with SPL-specific
270 modifications where required.
274 Simon Glass <sjg@chromium.org>