5 if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
7 $win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
9 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
10 ( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
11 ( $xlate="${dir}perlasm/x86_64-xlate.pl" and -f $xlate) or
12 die "can't locate x86_64-xlate.pl";
14 open OUT,"| \"$^X\" $xlate $flavour $output";
17 ($arg1,$arg2,$arg3,$arg4)=$win64?("%rcx","%rdx","%r8", "%r9") : # Win64 order
18 ("%rdi","%rsi","%rdx","%rcx"); # Unix order
21 .extern OPENSSL_cpuid_setup
22 .hidden OPENSSL_cpuid_setup
24 call OPENSSL_cpuid_setup
26 .hidden OPENSSL_ia32cap_P
27 .comm OPENSSL_ia32cap_P,16,4
31 .globl OPENSSL_atomic_add
32 .type OPENSSL_atomic_add,\@abi-omnipotent
36 .Lspin: leaq ($arg2,%rax),%r8
41 .byte 0x48,0x98 # cltq/cdqe
43 .size OPENSSL_atomic_add,.-OPENSSL_atomic_add
46 .type OPENSSL_rdtsc,\@abi-omnipotent
53 .size OPENSSL_rdtsc,.-OPENSSL_rdtsc
55 .globl OPENSSL_ia32_cpuid
56 .type OPENSSL_ia32_cpuid,\@function,1
59 mov %rbx,%r8 # save %rbx
62 mov %eax,8(%rdi) # clear extended feature flags
64 mov %eax,%r11d # max value for standard query level
67 cmp \$0x756e6547,%ebx # "Genu"
70 cmp \$0x49656e69,%edx # "ineI"
73 cmp \$0x6c65746e,%ecx # "ntel"
75 or %eax,%r9d # 0 indicates Intel CPU
78 cmp \$0x68747541,%ebx # "Auth"
81 cmp \$0x69746E65,%edx # "enti"
84 cmp \$0x444D4163,%ecx # "cAMD"
86 or %eax,%r10d # 0 indicates AMD CPU
98 and \$0x00000801,%r9d # isolate AMD XOP bit, 1<<11
100 cmp \$0x80000008,%r10d
103 mov \$0x80000008,%eax
105 movzb %cl,%r10 # number of cores - 1
106 inc %r10 # number of cores
110 bt \$28,%edx # test hyper-threading bit
112 shr \$16,%ebx # number of logical processors
115 and \$0xefffffff,%edx # ~(1<<28)
124 mov \$0,%ecx # query L1D
128 and \$0xfff,%r10d # number of cores -1 per L1D
133 and \$0xbfefffff,%edx # force reserved bits to 0
136 or \$0x40000000,%edx # set reserved bit#30 on Intel CPUs
138 cmp \$15,%ah # examine Family ID
140 or \$0x00100000,%edx # set reserved bit#20 to engage RC4_CHAR
144 and \$0x0fff0ff0,%eax
145 cmp \$0x00050670,%eax # Knights Landing
147 cmp \$0x00080650,%eax # Knights Mill (according to sde)
150 and \$0xfbffffff,%ecx # clear XSAVE flag to mimic Silvermont
153 bt \$28,%edx # test hyper-threading bit
155 and \$0xefffffff,%edx # ~(1<<28)
159 or \$0x10000000,%edx # 1<<28
161 cmp \$1,%bl # see if cache is shared
163 and \$0xefffffff,%edx # ~(1<<28)
165 and \$0x00000800,%r9d # isolate AMD XOP flag
166 and \$0xfffff7ff,%ecx
167 or %ecx,%r9d # merge AMD XOP flag
169 mov %edx,%r10d # %r9d:%r10d is copy of %ecx:%edx
172 jb .Lno_extended_info
176 bt \$26,%r9d # check XSAVE bit, cleared on Knights
178 and \$0xfff7ffff,%ebx # clear ADCX/ADOX flag
180 mov %ebx,8(%rdi) # save extended feature flags
183 bt \$27,%r9d # check OSXSAVE bit
186 .byte 0x0f,0x01,0xd0 # xgetbv
187 and \$6,%eax # isolate XMM and YMM state support
191 mov \$0xefffe7ff,%eax # ~(1<<28|1<<12|1<<11)
192 and %eax,%r9d # clear AVX, FMA and AMD XOP bits
193 andl \$0xffffffdf,8(%rdi) # clear AVX2, ~(1<<5)
197 mov %r8,%rbx # restore %rbx
200 .size OPENSSL_ia32_cpuid,.-OPENSSL_ia32_cpuid
202 .globl OPENSSL_cleanse
203 .type OPENSSL_cleanse,\@abi-omnipotent
235 .size OPENSSL_cleanse,.-OPENSSL_cleanse
238 print<<___ if (!$win64);
239 .globl OPENSSL_wipe_cpu
240 .type OPENSSL_wipe_cpu,\@abi-omnipotent
269 .size OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu
271 print<<___ if ($win64);
272 .globl OPENSSL_wipe_cpu
273 .type OPENSSL_wipe_cpu,\@abi-omnipotent
290 .size OPENSSL_wipe_cpu,.-OPENSSL_wipe_cpu
294 .globl OPENSSL_ia32_rdrand
295 .type OPENSSL_ia32_rdrand,\@abi-omnipotent
307 .size OPENSSL_ia32_rdrand,.-OPENSSL_ia32_rdrand
309 .globl OPENSSL_ia32_rdseed
310 .type OPENSSL_ia32_rdseed,\@abi-omnipotent
322 .size OPENSSL_ia32_rdseed,.-OPENSSL_ia32_rdseed
325 close STDOUT; # flush