2 # Copyright 2004-2016 The OpenSSL Project Authors. All Rights Reserved.
4 # Licensed under the Apache License 2.0 (the "License"). You may not use
5 # this file except in compliance with the License. You can obtain a copy
6 # in the file LICENSE in the source distribution or at
7 # https://www.openssl.org/source/license.html
10 # ====================================================================
11 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
12 # project. The module is, however, dual licensed under OpenSSL and
13 # CRYPTOGAMS licenses depending on where you obtain it. For further
14 # details see http://www.openssl.org/~appro/cryptogams/.
15 # ====================================================================
17 # SHA256/512_Transform for Itanium.
19 # sha512_block runs in 1003 cycles on Itanium 2, which is almost 50%
20 # faster than gcc and >60%(!) faster than code generated by HP-UX
21 # compiler (yes, HP-UX is generating slower code, because unlike gcc,
22 # it failed to deploy "shift right pair," 'shrp' instruction, which
23 # substitutes for 64-bit rotate).
25 # 924 cycles long sha256_block outperforms gcc by over factor of 2(!)
26 # and HP-UX compiler - by >40% (yes, gcc won sha512_block, but lost
27 # this one big time). Note that "formally" 924 is about 100 cycles
28 # too much. I mean it's 64 32-bit rounds vs. 80 virtually identical
29 # 64-bit ones and 1003*64/80 gives 802. Extra cycles, 2 per round,
30 # are spent on extra work to provide for 32-bit rotations. 32-bit
31 # rotations are still handled by 'shrp' instruction and for this
32 # reason lower 32 bits are deposited to upper half of 64-bit register
33 # prior 'shrp' issue. And in order to minimize the amount of such
34 # operations, X[16] values are *maintained* with copies of lower
35 # halves in upper halves, which is why you'll spot such instructions
36 # as custom 'mux2', "parallel 32-bit add," 'padd4' and "parallel
37 # 32-bit unsigned right shift," 'pshr4.u' instructions here.
39 # Rules of engagement.
41 # There is only one integer shifter meaning that if I have two rotate,
42 # deposit or extract instructions in adjacent bundles, they shall
43 # split [at run-time if they have to]. But note that variable and
44 # parallel shifts are performed by multi-media ALU and *are* pairable
45 # with rotates [and alike]. On the backside MMALU is rather slow: it
46 # takes 2 extra cycles before the result of integer operation is
47 # available *to* MMALU and 2(*) extra cycles before the result of MM
48 # operation is available "back" *to* integer ALU, not to mention that
49 # MMALU itself has 2 cycles latency. However! I explicitly scheduled
50 # these MM instructions to avoid MM stalls, so that all these extra
51 # latencies get "hidden" in instruction-level parallelism.
53 # (*) 2 cycles on Itanium 1 and 1 cycle on Itanium 2. But I schedule
54 # for 2 in order to provide for best *overall* performance,
55 # because on Itanium 1 stall on MM result is accompanied by
56 # pipeline flush, which takes 6 cycles:-(
60 # Improve performance by 15-20%. Note about "rules of engagement"
61 # above. Contemporary cores are equipped with additional shifter,
62 # so that they should perform even better than below, presumably
65 ######################################################################
66 # Current performance in cycles per processed byte for Itanium 2
67 # pre-9000 series [little-endian] system:
73 # (*) SHA1 result is presented purely for reference purposes.
75 # To generate code, pass the file name with either 256 or 512 in its
76 # name and compiler flags.
78 # $output is the last argument if it looks like a file (it has an extension)
79 $output = $#ARGV >= 0 && $ARGV[$#ARGV] =~ m|\.\w+$| ? pop : undef;
81 if ($output =~ /512.*\.[s|asm]/) {
89 $func="sha512_block_data_order";
95 } elsif ($output =~ /256.*\.[s|asm]/) {
103 $func="sha256_block_data_order";
109 } else { die "nonsense $output"; }
111 $output and (open STDOUT,">$output" or die "can't open $output: $!");
115 for (@ARGV) { $ADDP="add" if (/[\+DD|\-mlp]64/); }
116 } else { $ADDP="add"; }
117 for (@ARGV) { $big_endian=1 if (/\-DB_ENDIAN/);
118 $big_endian=0 if (/\-DL_ENDIAN/); }
119 if (!defined($big_endian))
120 { $big_endian=(unpack('L',pack('N',1))==1); }
123 .ident \"$output, version 2.0\"
124 .ident \"IA-64 ISA artwork by Andy Polyakov <appro\@openssl.org>\"
132 A_=r16; B_=r17; C_=r18; D_=r19;
133 E_=r20; F_=r21; G_=r22; H_=r23;
135 s0=r26; s1=r27; t0=r28; t1=r29;
138 input=r56; // 2nd arg
140 sgm0=r58; sgm1=r59; // small constants
142 // void $func (SHA_CTX *ctx, const void *in,size_t num[,int host])
150 { .mmi; alloc pfssave=ar.pfs,3,25,0,24
151 $ADDP ctx=0,r32 // 1st arg
154 { .mmi; $ADDP input=0,r33 // 2nd arg
155 mov num=r34 // 3rd arg
160 { .mib; add r8=0*$SZ,ctx
162 { .mib; add r10=2*$SZ,ctx
163 add r11=3*$SZ,ctx };;
167 { .mmi; $LDW A_=[r8],4*$SZ
170 { .mmi; $LDW C_=[r10],4*$SZ
172 mov sgm0=$sigma0[2] };;
175 add Ktbl=($TABLE#-.Lpic_point),Ktbl }
176 { .mmi; $LDW G_=[r10]
178 cmp.ne p0,p16=0,r0 };;
180 $code.=<<___ if ($BITS==64);
181 { .mii; and r8=7,input
184 { .mmi; cmp.eq p10,p0=2,r8
187 { .mmi; cmp.eq p13,p0=5,r8
189 cmp.eq p15,p0=7,r8 };;
194 A=R[0]; B=R[1]; C=R[2]; D=R[3]; E=R[4]; F=R[5]; G=R[6]; H=R[7]
195 { .mmi; ld1 X[15]=[input],$SZ // eliminated in sha512
206 mov sgm1=$sigma1[2] }
209 brp.loop.imp .L_first16,.L_first16_end-16 };;
211 $t0="A", $t1="E", $code.=<<___ if ($BITS==64);
212 // in sha512 case I load whole X[16] at once and take care of alignment...
213 { .mmi; add r8=1*$SZ,input
215 add r10=3*$SZ,input };;
216 { .mmb; $LDW X[15]=[input],4*$SZ
217 $LDW X[14]=[r8],4*$SZ
218 (p9) br.cond.dpnt.many .L1byte };;
219 { .mmb; $LDW X[13]=[r9],4*$SZ
220 $LDW X[12]=[r10],4*$SZ
221 (p10) br.cond.dpnt.many .L2byte };;
222 { .mmb; $LDW X[11]=[input],4*$SZ
223 $LDW X[10]=[r8],4*$SZ
224 (p11) br.cond.dpnt.many .L3byte };;
225 { .mmb; $LDW X[ 9]=[r9],4*$SZ
226 $LDW X[ 8]=[r10],4*$SZ
227 (p12) br.cond.dpnt.many .L4byte };;
228 { .mmb; $LDW X[ 7]=[input],4*$SZ
229 $LDW X[ 6]=[r8],4*$SZ
230 (p13) br.cond.dpnt.many .L5byte };;
231 { .mmb; $LDW X[ 5]=[r9],4*$SZ
232 $LDW X[ 4]=[r10],4*$SZ
233 (p14) br.cond.dpnt.many .L6byte };;
234 { .mmb; $LDW X[ 3]=[input],4*$SZ
235 $LDW X[ 2]=[r8],4*$SZ
236 (p15) br.cond.dpnt.many .L7byte };;
237 { .mmb; $LDW X[ 1]=[r9],4*$SZ
238 $LDW X[ 0]=[r10],4*$SZ }
240 mux1 X[15]=X[15],\@rev // eliminated on big-endian
241 br.many .L_first16 };;
243 { .mmi; $LDW X[13]=[r9],4*$SZ
244 $LDW X[12]=[r10],4*$SZ
245 shrp X[15]=X[15],X[14],56 };;
246 { .mmi; $LDW X[11]=[input],4*$SZ
247 $LDW X[10]=[r8],4*$SZ
248 shrp X[14]=X[14],X[13],56 }
249 { .mmi; $LDW X[ 9]=[r9],4*$SZ
250 $LDW X[ 8]=[r10],4*$SZ
251 shrp X[13]=X[13],X[12],56 };;
252 { .mmi; $LDW X[ 7]=[input],4*$SZ
253 $LDW X[ 6]=[r8],4*$SZ
254 shrp X[12]=X[12],X[11],56 }
255 { .mmi; $LDW X[ 5]=[r9],4*$SZ
256 $LDW X[ 4]=[r10],4*$SZ
257 shrp X[11]=X[11],X[10],56 };;
258 { .mmi; $LDW X[ 3]=[input],4*$SZ
259 $LDW X[ 2]=[r8],4*$SZ
260 shrp X[10]=X[10],X[ 9],56 }
261 { .mmi; $LDW X[ 1]=[r9],4*$SZ
262 $LDW X[ 0]=[r10],4*$SZ
263 shrp X[ 9]=X[ 9],X[ 8],56 };;
264 { .mii; $LDW T1=[input]
265 shrp X[ 8]=X[ 8],X[ 7],56
266 shrp X[ 7]=X[ 7],X[ 6],56 }
267 { .mii; shrp X[ 6]=X[ 6],X[ 5],56
268 shrp X[ 5]=X[ 5],X[ 4],56 };;
269 { .mii; shrp X[ 4]=X[ 4],X[ 3],56
270 shrp X[ 3]=X[ 3],X[ 2],56 }
271 { .mii; shrp X[ 2]=X[ 2],X[ 1],56
272 shrp X[ 1]=X[ 1],X[ 0],56 }
273 { .mib; shrp X[ 0]=X[ 0],T1,56 }
275 mux1 X[15]=X[15],\@rev // eliminated on big-endian
276 br.many .L_first16 };;
278 { .mmi; $LDW X[11]=[input],4*$SZ
279 $LDW X[10]=[r8],4*$SZ
280 shrp X[15]=X[15],X[14],48 }
281 { .mmi; $LDW X[ 9]=[r9],4*$SZ
282 $LDW X[ 8]=[r10],4*$SZ
283 shrp X[14]=X[14],X[13],48 };;
284 { .mmi; $LDW X[ 7]=[input],4*$SZ
285 $LDW X[ 6]=[r8],4*$SZ
286 shrp X[13]=X[13],X[12],48 }
287 { .mmi; $LDW X[ 5]=[r9],4*$SZ
288 $LDW X[ 4]=[r10],4*$SZ
289 shrp X[12]=X[12],X[11],48 };;
290 { .mmi; $LDW X[ 3]=[input],4*$SZ
291 $LDW X[ 2]=[r8],4*$SZ
292 shrp X[11]=X[11],X[10],48 }
293 { .mmi; $LDW X[ 1]=[r9],4*$SZ
294 $LDW X[ 0]=[r10],4*$SZ
295 shrp X[10]=X[10],X[ 9],48 };;
296 { .mii; $LDW T1=[input]
297 shrp X[ 9]=X[ 9],X[ 8],48
298 shrp X[ 8]=X[ 8],X[ 7],48 }
299 { .mii; shrp X[ 7]=X[ 7],X[ 6],48
300 shrp X[ 6]=X[ 6],X[ 5],48 };;
301 { .mii; shrp X[ 5]=X[ 5],X[ 4],48
302 shrp X[ 4]=X[ 4],X[ 3],48 }
303 { .mii; shrp X[ 3]=X[ 3],X[ 2],48
304 shrp X[ 2]=X[ 2],X[ 1],48 }
305 { .mii; shrp X[ 1]=X[ 1],X[ 0],48
306 shrp X[ 0]=X[ 0],T1,48 }
308 mux1 X[15]=X[15],\@rev // eliminated on big-endian
309 br.many .L_first16 };;
311 { .mmi; $LDW X[ 9]=[r9],4*$SZ
312 $LDW X[ 8]=[r10],4*$SZ
313 shrp X[15]=X[15],X[14],40 };;
314 { .mmi; $LDW X[ 7]=[input],4*$SZ
315 $LDW X[ 6]=[r8],4*$SZ
316 shrp X[14]=X[14],X[13],40 }
317 { .mmi; $LDW X[ 5]=[r9],4*$SZ
318 $LDW X[ 4]=[r10],4*$SZ
319 shrp X[13]=X[13],X[12],40 };;
320 { .mmi; $LDW X[ 3]=[input],4*$SZ
321 $LDW X[ 2]=[r8],4*$SZ
322 shrp X[12]=X[12],X[11],40 }
323 { .mmi; $LDW X[ 1]=[r9],4*$SZ
324 $LDW X[ 0]=[r10],4*$SZ
325 shrp X[11]=X[11],X[10],40 };;
326 { .mii; $LDW T1=[input]
327 shrp X[10]=X[10],X[ 9],40
328 shrp X[ 9]=X[ 9],X[ 8],40 }
329 { .mii; shrp X[ 8]=X[ 8],X[ 7],40
330 shrp X[ 7]=X[ 7],X[ 6],40 };;
331 { .mii; shrp X[ 6]=X[ 6],X[ 5],40
332 shrp X[ 5]=X[ 5],X[ 4],40 }
333 { .mii; shrp X[ 4]=X[ 4],X[ 3],40
334 shrp X[ 3]=X[ 3],X[ 2],40 }
335 { .mii; shrp X[ 2]=X[ 2],X[ 1],40
336 shrp X[ 1]=X[ 1],X[ 0],40 }
337 { .mib; shrp X[ 0]=X[ 0],T1,40 }
339 mux1 X[15]=X[15],\@rev // eliminated on big-endian
340 br.many .L_first16 };;
342 { .mmi; $LDW X[ 7]=[input],4*$SZ
343 $LDW X[ 6]=[r8],4*$SZ
344 shrp X[15]=X[15],X[14],32 }
345 { .mmi; $LDW X[ 5]=[r9],4*$SZ
346 $LDW X[ 4]=[r10],4*$SZ
347 shrp X[14]=X[14],X[13],32 };;
348 { .mmi; $LDW X[ 3]=[input],4*$SZ
349 $LDW X[ 2]=[r8],4*$SZ
350 shrp X[13]=X[13],X[12],32 }
351 { .mmi; $LDW X[ 1]=[r9],4*$SZ
352 $LDW X[ 0]=[r10],4*$SZ
353 shrp X[12]=X[12],X[11],32 };;
354 { .mii; $LDW T1=[input]
355 shrp X[11]=X[11],X[10],32
356 shrp X[10]=X[10],X[ 9],32 }
357 { .mii; shrp X[ 9]=X[ 9],X[ 8],32
358 shrp X[ 8]=X[ 8],X[ 7],32 };;
359 { .mii; shrp X[ 7]=X[ 7],X[ 6],32
360 shrp X[ 6]=X[ 6],X[ 5],32 }
361 { .mii; shrp X[ 5]=X[ 5],X[ 4],32
362 shrp X[ 4]=X[ 4],X[ 3],32 }
363 { .mii; shrp X[ 3]=X[ 3],X[ 2],32
364 shrp X[ 2]=X[ 2],X[ 1],32 }
365 { .mii; shrp X[ 1]=X[ 1],X[ 0],32
366 shrp X[ 0]=X[ 0],T1,32 }
368 mux1 X[15]=X[15],\@rev // eliminated on big-endian
369 br.many .L_first16 };;
371 { .mmi; $LDW X[ 5]=[r9],4*$SZ
372 $LDW X[ 4]=[r10],4*$SZ
373 shrp X[15]=X[15],X[14],24 };;
374 { .mmi; $LDW X[ 3]=[input],4*$SZ
375 $LDW X[ 2]=[r8],4*$SZ
376 shrp X[14]=X[14],X[13],24 }
377 { .mmi; $LDW X[ 1]=[r9],4*$SZ
378 $LDW X[ 0]=[r10],4*$SZ
379 shrp X[13]=X[13],X[12],24 };;
380 { .mii; $LDW T1=[input]
381 shrp X[12]=X[12],X[11],24
382 shrp X[11]=X[11],X[10],24 }
383 { .mii; shrp X[10]=X[10],X[ 9],24
384 shrp X[ 9]=X[ 9],X[ 8],24 };;
385 { .mii; shrp X[ 8]=X[ 8],X[ 7],24
386 shrp X[ 7]=X[ 7],X[ 6],24 }
387 { .mii; shrp X[ 6]=X[ 6],X[ 5],24
388 shrp X[ 5]=X[ 5],X[ 4],24 }
389 { .mii; shrp X[ 4]=X[ 4],X[ 3],24
390 shrp X[ 3]=X[ 3],X[ 2],24 }
391 { .mii; shrp X[ 2]=X[ 2],X[ 1],24
392 shrp X[ 1]=X[ 1],X[ 0],24 }
393 { .mib; shrp X[ 0]=X[ 0],T1,24 }
395 mux1 X[15]=X[15],\@rev // eliminated on big-endian
396 br.many .L_first16 };;
398 { .mmi; $LDW X[ 3]=[input],4*$SZ
399 $LDW X[ 2]=[r8],4*$SZ
400 shrp X[15]=X[15],X[14],16 }
401 { .mmi; $LDW X[ 1]=[r9],4*$SZ
402 $LDW X[ 0]=[r10],4*$SZ
403 shrp X[14]=X[14],X[13],16 };;
404 { .mii; $LDW T1=[input]
405 shrp X[13]=X[13],X[12],16
406 shrp X[12]=X[12],X[11],16 }
407 { .mii; shrp X[11]=X[11],X[10],16
408 shrp X[10]=X[10],X[ 9],16 };;
409 { .mii; shrp X[ 9]=X[ 9],X[ 8],16
410 shrp X[ 8]=X[ 8],X[ 7],16 }
411 { .mii; shrp X[ 7]=X[ 7],X[ 6],16
412 shrp X[ 6]=X[ 6],X[ 5],16 }
413 { .mii; shrp X[ 5]=X[ 5],X[ 4],16
414 shrp X[ 4]=X[ 4],X[ 3],16 }
415 { .mii; shrp X[ 3]=X[ 3],X[ 2],16
416 shrp X[ 2]=X[ 2],X[ 1],16 }
417 { .mii; shrp X[ 1]=X[ 1],X[ 0],16
418 shrp X[ 0]=X[ 0],T1,16 }
420 mux1 X[15]=X[15],\@rev // eliminated on big-endian
421 br.many .L_first16 };;
423 { .mmi; $LDW X[ 1]=[r9],4*$SZ
424 $LDW X[ 0]=[r10],4*$SZ
425 shrp X[15]=X[15],X[14],8 };;
426 { .mii; $LDW T1=[input]
427 shrp X[14]=X[14],X[13],8
428 shrp X[13]=X[13],X[12],8 }
429 { .mii; shrp X[12]=X[12],X[11],8
430 shrp X[11]=X[11],X[10],8 };;
431 { .mii; shrp X[10]=X[10],X[ 9],8
432 shrp X[ 9]=X[ 9],X[ 8],8 }
433 { .mii; shrp X[ 8]=X[ 8],X[ 7],8
434 shrp X[ 7]=X[ 7],X[ 6],8 }
435 { .mii; shrp X[ 6]=X[ 6],X[ 5],8
436 shrp X[ 5]=X[ 5],X[ 4],8 }
437 { .mii; shrp X[ 4]=X[ 4],X[ 3],8
438 shrp X[ 3]=X[ 3],X[ 2],8 }
439 { .mii; shrp X[ 2]=X[ 2],X[ 1],8
440 shrp X[ 1]=X[ 1],X[ 0],8 }
441 { .mib; shrp X[ 0]=X[ 0],T1,8 }
443 mux1 X[15]=X[15],\@rev };; // eliminated on big-endian
447 { .mmi; $LDW K=[Ktbl],$SZ
448 add A=A,r8 // H+=Sigma(0) from the past
449 _rotr r10=$t1,$Sigma1[0] } // ROTR(e,14)
452 (p16) mux1 X[14]=X[14],\@rev };; // eliminated on big-endian
455 _rotr r11=$t1,$Sigma1[1] } // ROTR(e,41)
456 { .mmi; xor T1=T1,r8 // T1=((e & f) ^ (~e & g))
459 $t0="t0", $t1="t1", $code.=<<___ if ($BITS==32);
462 { .mmi; add A=A,r8 // H+=Sigma(0) from the past
464 add r11=3-$SZ,input };;
468 { .mmi; ld1 r11=[r11]
472 dep X[15]=X[15],r9,8,8
473 mux2 $t0=A,0x44 };; // copy lower half to upper
476 dep r11=r10,r11,8,8 };;
479 dep X[15]=X[15],r11,16,16 };;
480 { .mmi; (p16) ld1 X[15-1]=[input],$SZ // prefetch
481 xor T1=T1,r8 // T1=((e & f) ^ (~e & g))
482 _rotr r10=$t1,$Sigma1[0] } // ROTR(e,14)
484 _rotr r11=$t1,$Sigma1[1] };; // ROTR(e,18)
487 { .mmi; add T1=T1,H // T1=Ch(e,f,g)+h
489 _rotr r11=$t1,$Sigma1[2] } // ROTR(e,41)
492 { .mmi; add T1=T1,K // T1+=K[i]+X[i]
493 xor T2=T2,r8 // T2=((a & b) ^ (a & c) ^ (b & c))
494 _rotr r8=$t0,$Sigma0[0] } // ROTR(a,28)
495 { .mmi; xor r11=r11,r10 // Sigma1(e)
496 _rotr r9=$t0,$Sigma0[1] };; // ROTR(a,34)
497 { .mmi; add T1=T1,r11 // T+=Sigma1(e)
499 _rotr r9=$t0,$Sigma0[2] };; // ROTR(a,39)
500 { .mmi; xor r8=r8,r9 // Sigma0(a)
502 mux2 H=X[15],0x44 } // mov H=X[15] in sha512
503 { .mib; (p16) add r9=1-$SZ,input // not used in sha512
504 add X[15]=T1,T2 // H=T1+Maj(a,b,c)
505 br.ctop.sptk .L_first16 };;
508 { .mib; mov ar.lc=$rounds-17
509 brp.loop.imp .L_rest,.L_rest_end-16 }
515 { .mmi; $LDW K=[Ktbl],$SZ
516 add A=A,r8 // H+=Sigma0(a) from the past
517 _rotr r8=X[15-1],$sigma0[0] } // ROTR(s0,1)
518 { .mmi; add X[15]=X[15],X[15-9] // X[i&0xF]+=X[(i+9)&0xF]
519 $SHRU s0=X[15-1],sgm0 };; // s0=X[(i+1)&0xF]>>7
521 _rotr r9=X[15-1],$sigma0[1] } // ROTR(s0,8)
522 { .mib; andcm r10=G,E
523 $SHRU s1=X[15-14],sgm1 };; // s1=X[(i+14)&0xF]>>6
524 // Pair of mmi; splits on Itanium 1 and prevents pipeline flush
525 // upon $SHRU output usage
526 { .mmi; xor T1=T1,r10 // T1=((e & f) ^ (~e & g))
528 _rotr r10=X[15-14],$sigma1[0] }// ROTR(s1,19)
531 _rotr r11=X[15-14],$sigma1[1] };;// ROTR(s1,61)
533 $t0="t0", $t1="t1", $code.=<<___ if ($BITS==32);
534 { .mib; xor s0=s0,r9 // s0=sigma0(X[(i+1)&0xF])
536 { .mib; xor r10=r11,r10
538 { .mii; xor s1=s1,r10 // s1=sigma1(X[(i+14)&0xF])
539 shrp r9=E,$t1,32+$Sigma1[0] // ROTR(e,14)
540 mux2 $t0=A,0x44 };; // copy lower half to upper
541 // Pair of mmi; splits on Itanium 1 and prevents pipeline flush
542 // upon mux2 output usage
544 shrp r8=E,$t1,32+$Sigma1[1]} // ROTR(e,18)
546 add T1=T1,H // T1=Ch(e,f,g)+h
549 $t0="A", $t1="E", $code.=<<___ if ($BITS==64);
550 { .mib; xor s0=s0,r9 // s0=sigma0(X[(i+1)&0xF])
551 _rotr r9=$t1,$Sigma1[0] } // ROTR(e,14)
552 { .mib; xor r10=r11,r10
554 { .mib; xor s1=s1,r10 // s1=sigma1(X[(i+14)&0xF])
555 _rotr r8=$t1,$Sigma1[1] } // ROTR(e,18)
557 add T1=T1,H };; // T1+=H
561 _rotr r8=$t1,$Sigma1[2] } // ROTR(e,41)
562 { .mib; xor T2=T2,r10 // T2=((a & b) ^ (a & c) ^ (b & c))
563 add X[15]=X[15],s0 };; // X[i]+=sigma0(X[i+1])
564 { .mmi; xor r9=r9,r8 // Sigma1(e)
565 add X[15]=X[15],s1 // X[i]+=sigma0(X[i+14])
566 _rotr r8=$t0,$Sigma0[0] };; // ROTR(a,28)
567 { .mmi; add K=K,X[15]
568 add T1=T1,r9 // T1+=Sigma1(e)
569 _rotr r9=$t0,$Sigma0[1] };; // ROTR(a,34)
570 { .mmi; add T1=T1,K // T1+=K[i]+X[i]
572 _rotr r9=$t0,$Sigma0[2] };; // ROTR(a,39)
574 mux2 H=X[15],0x44 } // mov H=X[15] in sha512
575 { .mib; xor r8=r8,r9 // Sigma0(a)
576 add X[15]=T1,T2 // H=T1+Maj(a,b,c)
577 br.ctop.sptk .L_rest };;
580 { .mmi; add A=A,r8 };; // H+=Sigma0(a) from the past
586 cmp.ltu p16,p0=1,num };;
590 { .mmb; add Ktbl=-$SZ*$rounds,Ktbl
592 (p16) br.dptk.many .L_outer };;
594 { .mib; add r8=0*$SZ,ctx
596 { .mib; add r10=2*$SZ,ctx
597 add r11=3*$SZ,ctx };;
598 { .mmi; $STW [r8]=A_,4*$SZ
601 { .mmi; $STW [r10]=C_,4*$SZ
603 mov pr=prsave,0x1ffff };;
606 { .mmb; $STW [r10]=G_
608 br.ret.sptk.many b0 };;
612 foreach(split($/,$code)) {
613 s/\`([^\`]*)\`/eval $1/gem;
614 s/_rotr(\s+)([^=]+)=([^,]+),([0-9]+)/shrp$1$2=$3,$3,$4/gm;
616 s/mux2(\s+)([^=]+)=([^,]+),\S+/mov$1 $2=$3/gm;
617 s/mux1(\s+)\S+/nop.i$1 0x0/gm if ($big_endian);
618 s/(shrp\s+X\[[^=]+)=([^,]+),([^,]+),([1-9]+)/$1=$3,$2,64-$4/gm
620 s/ld1(\s+)X\[\S+/nop.m$1 0x0/gm;
626 print<<___ if ($BITS==32);
629 K256: data4 0x428a2f98,0x71374491,0xb5c0fbcf,0xe9b5dba5
630 data4 0x3956c25b,0x59f111f1,0x923f82a4,0xab1c5ed5
631 data4 0xd807aa98,0x12835b01,0x243185be,0x550c7dc3
632 data4 0x72be5d74,0x80deb1fe,0x9bdc06a7,0xc19bf174
633 data4 0xe49b69c1,0xefbe4786,0x0fc19dc6,0x240ca1cc
634 data4 0x2de92c6f,0x4a7484aa,0x5cb0a9dc,0x76f988da
635 data4 0x983e5152,0xa831c66d,0xb00327c8,0xbf597fc7
636 data4 0xc6e00bf3,0xd5a79147,0x06ca6351,0x14292967
637 data4 0x27b70a85,0x2e1b2138,0x4d2c6dfc,0x53380d13
638 data4 0x650a7354,0x766a0abb,0x81c2c92e,0x92722c85
639 data4 0xa2bfe8a1,0xa81a664b,0xc24b8b70,0xc76c51a3
640 data4 0xd192e819,0xd6990624,0xf40e3585,0x106aa070
641 data4 0x19a4c116,0x1e376c08,0x2748774c,0x34b0bcb5
642 data4 0x391c0cb3,0x4ed8aa4a,0x5b9cca4f,0x682e6ff3
643 data4 0x748f82ee,0x78a5636f,0x84c87814,0x8cc70208
644 data4 0x90befffa,0xa4506ceb,0xbef9a3f7,0xc67178f2
645 .size K256#,$SZ*$rounds
646 stringz "SHA256 block transform for IA64, CRYPTOGAMS by <appro\@openssl.org>"
648 print<<___ if ($BITS==64);
651 K512: data8 0x428a2f98d728ae22,0x7137449123ef65cd
652 data8 0xb5c0fbcfec4d3b2f,0xe9b5dba58189dbbc
653 data8 0x3956c25bf348b538,0x59f111f1b605d019
654 data8 0x923f82a4af194f9b,0xab1c5ed5da6d8118
655 data8 0xd807aa98a3030242,0x12835b0145706fbe
656 data8 0x243185be4ee4b28c,0x550c7dc3d5ffb4e2
657 data8 0x72be5d74f27b896f,0x80deb1fe3b1696b1
658 data8 0x9bdc06a725c71235,0xc19bf174cf692694
659 data8 0xe49b69c19ef14ad2,0xefbe4786384f25e3
660 data8 0x0fc19dc68b8cd5b5,0x240ca1cc77ac9c65
661 data8 0x2de92c6f592b0275,0x4a7484aa6ea6e483
662 data8 0x5cb0a9dcbd41fbd4,0x76f988da831153b5
663 data8 0x983e5152ee66dfab,0xa831c66d2db43210
664 data8 0xb00327c898fb213f,0xbf597fc7beef0ee4
665 data8 0xc6e00bf33da88fc2,0xd5a79147930aa725
666 data8 0x06ca6351e003826f,0x142929670a0e6e70
667 data8 0x27b70a8546d22ffc,0x2e1b21385c26c926
668 data8 0x4d2c6dfc5ac42aed,0x53380d139d95b3df
669 data8 0x650a73548baf63de,0x766a0abb3c77b2a8
670 data8 0x81c2c92e47edaee6,0x92722c851482353b
671 data8 0xa2bfe8a14cf10364,0xa81a664bbc423001
672 data8 0xc24b8b70d0f89791,0xc76c51a30654be30
673 data8 0xd192e819d6ef5218,0xd69906245565a910
674 data8 0xf40e35855771202a,0x106aa07032bbd1b8
675 data8 0x19a4c116b8d2d0c8,0x1e376c085141ab53
676 data8 0x2748774cdf8eeb99,0x34b0bcb5e19b48a8
677 data8 0x391c0cb3c5c95a63,0x4ed8aa4ae3418acb
678 data8 0x5b9cca4f7763e373,0x682e6ff3d6b2b8a3
679 data8 0x748f82ee5defb2fc,0x78a5636f43172f60
680 data8 0x84c87814a1f0ab72,0x8cc702081a6439ec
681 data8 0x90befffa23631e28,0xa4506cebde82bde9
682 data8 0xbef9a3f7b2c67915,0xc67178f2e372532b
683 data8 0xca273eceea26619c,0xd186b8c721c0c207
684 data8 0xeada7dd6cde0eb1e,0xf57d4f7fee6ed178
685 data8 0x06f067aa72176fba,0x0a637dc5a2c898a6
686 data8 0x113f9804bef90dae,0x1b710b35131c471b
687 data8 0x28db77f523047d84,0x32caab7b40c72493
688 data8 0x3c9ebe0a15c9bebc,0x431d67c49c100d4c
689 data8 0x4cc5d4becb3e42b6,0x597f299cfc657e2a
690 data8 0x5fcb6fab3ad6faec,0x6c44198c4a475817
691 .size K512#,$SZ*$rounds
692 stringz "SHA512 block transform for IA64, CRYPTOGAMS by <appro\@openssl.org>"