3 # ====================================================================
4 # Written by Andy Polyakov <appro@fy.chalmers.se> for the OpenSSL
5 # project. The module is, however, dual licensed under OpenSSL and
6 # CRYPTOGAMS licenses depending on where you obtain it. For further
7 # details see http://www.openssl.org/~appro/cryptogams/.
8 # ====================================================================
10 # sha1_block procedure for x86_64.
12 # It was brought to my attention that on EM64T compiler-generated code
13 # was far behind 32-bit assembler implementation. This is unlike on
14 # Opteron where compiler-generated code was only 15% behind 32-bit
15 # assembler, which originally made it hard to motivate the effort.
16 # There was suggestion to mechanically translate 32-bit code, but I
17 # dismissed it, reasoning that x86_64 offers enough register bank
18 # capacity to fully utilize SHA-1 parallelism. Therefore this fresh
19 # implementation:-) However! While 64-bit code does perform better
20 # on Opteron, I failed to beat 32-bit assembler on EM64T core. Well,
21 # x86_64 does offer larger *addressable* bank, but out-of-order core
22 # reaches for even more registers through dynamic aliasing, and EM64T
23 # core must have managed to run-time optimize even 32-bit code just as
24 # good as 64-bit one. Performance improvement is summarized in the
27 # gcc 3.4 32-bit asm cycles/byte
28 # Opteron +45% +20% 6.8
29 # Xeon P4 +65% +0% 9.9
34 # The code was revised to minimize code size and to maximize
35 # "distance" between instructions producing input to 'lea'
36 # instruction and the 'lea' instruction itself, which is essential
37 # for Intel Atom core.
41 # Add SSSE3, Supplemental[!] SSE3, implementation. The idea behind it
42 # is to offload message schedule denoted by Wt in NIST specification,
43 # or Xupdate in OpenSSL source, to SIMD unit. See sha1-586.pl module
44 # for background and implementation details. The only difference from
45 # 32-bit code is that 64-bit code doesn't have to spill @X[] elements
46 # to free temporary registers.
50 # Add AVX code path. See sha1-586.pl for further information.
52 ######################################################################
53 # Current performance is summarized in following table. Numbers are
54 # CPU clock cycles spent to process single byte (less is better).
59 # Core2 6.7 6.1/+10% -
60 # Atom 11.0 9.7/+13% -
61 # Westmere 7.1 5.6/+27% -
62 # Sandy Bridge 7.9 6.3/+25% 5.2/+51%
66 if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
68 $win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
70 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
71 ( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
72 ( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
73 die "can't locate x86_64-xlate.pl";
75 $avx=1 if (`$ENV{CC} -Wa,-v -c -o /dev/null -x assembler /dev/null 2>&1`
76 =~ /GNU assembler version ([2-9]\.[0-9]+)/ &&
78 $avx=1 if (!$avx && $win64 && ($flavour =~ /nasm/ || $ENV{ASM} =~ /nasm/) &&
79 `nasm -v 2>&1` =~ /NASM version ([2-9]\.[0-9]+)/ &&
81 $avx=1 if (!$avx && $win64 && ($flavour =~ /masm/ || $ENV{ASM} =~ /ml64/) &&
82 `ml64 2>&1` =~ /Version ([0-9]+)\./ &&
85 open STDOUT,"| $^X $xlate $flavour $output";
87 $ctx="%rdi"; # 1st arg
88 $inp="%rsi"; # 2nd arg
89 $num="%rdx"; # 3rd arg
91 # reassign arguments in order to produce more compact code
109 my ($i,$a,$b,$c,$d,$e)=@_;
111 $code.=<<___ if ($i==0);
112 mov `4*$i`($inp),$xi[0]
114 mov $xi[0],`4*$i`(%rsp)
116 $code.=<<___ if ($i<15);
118 mov `4*$j`($inp),$xi[1]
123 lea 0x5a827999($xi[0],$e),$e
125 mov $xi[1],`4*$j`(%rsp)
131 $code.=<<___ if ($i>=15);
132 mov `4*($j%16)`(%rsp),$xi[1]
135 xor `4*(($j+2)%16)`(%rsp),$xi[1]
138 xor `4*(($j+8)%16)`(%rsp),$xi[1]
140 lea 0x5a827999($xi[0],$e),$e
141 xor `4*(($j+13)%16)`(%rsp),$xi[1]
146 mov $xi[1],`4*($j%16)`(%rsp)
149 unshift(@xi,pop(@xi));
153 my ($i,$a,$b,$c,$d,$e)=@_;
155 my $K=($i<40)?0x6ed9eba1:0xca62c1d6;
156 $code.=<<___ if ($i<79);
157 mov `4*($j%16)`(%rsp),$xi[1]
160 xor `4*(($j+2)%16)`(%rsp),$xi[1]
164 xor `4*(($j+8)%16)`(%rsp),$xi[1]
167 xor `4*(($j+13)%16)`(%rsp),$xi[1]
172 $code.=<<___ if ($i<76);
173 mov $xi[1],`4*($j%16)`(%rsp)
175 $code.=<<___ if ($i==79);
186 unshift(@xi,pop(@xi));
190 my ($i,$a,$b,$c,$d,$e)=@_;
193 mov `4*($j%16)`(%rsp),$xi[1]
196 xor `4*(($j+2)%16)`(%rsp),$xi[1]
199 xor `4*(($j+8)%16)`(%rsp),$xi[1]
201 lea 0x8f1bbcdc($xi[0],$e),$e
203 xor `4*(($j+13)%16)`(%rsp),$xi[1]
209 mov $xi[1],`4*($j%16)`(%rsp)
212 unshift(@xi,pop(@xi));
217 .extern OPENSSL_ia32cap_P
219 .globl sha1_block_data_order
220 .type sha1_block_data_order,\@function,3
222 sha1_block_data_order:
223 mov OPENSSL_ia32cap_P+0(%rip),%r9d
224 mov OPENSSL_ia32cap_P+4(%rip),%r8d
225 test \$`1<<9`,%r8d # check SSSE3 bit
228 $code.=<<___ if ($avx);
229 and \$`1<<28`,%r8d # mask AVX bit
230 and \$`1<<30`,%r9d # mask "Intel CPU" bit
232 cmp \$`1<<28|1<<30`,%r8d
245 mov %rdi,$ctx # reassigned argument
247 mov %rsi,$inp # reassigned argument
249 mov %rdx,$num # reassigned argument
250 mov %r11,`16*4`(%rsp)
263 for($i=0;$i<20;$i++) { &BODY_00_19($i,@V); unshift(@V,pop(@V)); }
264 for(;$i<40;$i++) { &BODY_20_39($i,@V); unshift(@V,pop(@V)); }
265 for(;$i<60;$i++) { &BODY_40_59($i,@V); unshift(@V,pop(@V)); }
266 for(;$i<80;$i++) { &BODY_20_39($i,@V); unshift(@V,pop(@V)); }
280 lea `16*4`($inp),$inp
283 mov `16*4`(%rsp),%rsi
291 .size sha1_block_data_order,.-sha1_block_data_order
295 my @X=map("%xmm$_",(4..7,0..3));
296 my @Tx=map("%xmm$_",(8..10));
297 my @V=($A,$B,$C,$D,$E)=("%eax","%ebx","%ecx","%edx","%ebp"); # size optimization
298 my @T=("%esi","%edi");
302 my $_rol=sub { &rol(@_) };
303 my $_ror=sub { &ror(@_) };
306 .type sha1_block_data_order_ssse3,\@function,3
308 sha1_block_data_order_ssse3:
313 lea `-64-($win64?5*16:0)`(%rsp),%rsp
315 $code.=<<___ if ($win64);
316 movaps %xmm6,64+0(%rsp)
317 movaps %xmm7,64+16(%rsp)
318 movaps %xmm8,64+32(%rsp)
319 movaps %xmm9,64+48(%rsp)
320 movaps %xmm10,64+64(%rsp)
324 mov %rdi,$ctx # reassigned argument
325 mov %rsi,$inp # reassigned argument
326 mov %rdx,$num # reassigned argument
330 lea K_XX_XX(%rip),$K_XX_XX
332 mov 0($ctx),$A # load context
336 mov $B,@T[0] # magic seed
339 movdqa 64($K_XX_XX),@X[2] # pbswap mask
340 movdqa 0($K_XX_XX),@Tx[1] # K_00_19
341 movdqu 0($inp),@X[-4&7] # load input to %xmm[0-3]
342 movdqu 16($inp),@X[-3&7]
343 movdqu 32($inp),@X[-2&7]
344 movdqu 48($inp),@X[-1&7]
345 pshufb @X[2],@X[-4&7] # byte swap
347 pshufb @X[2],@X[-3&7]
348 pshufb @X[2],@X[-2&7]
349 pshufb @X[2],@X[-1&7]
350 paddd @Tx[1],@X[-4&7] # add K_00_19
351 paddd @Tx[1],@X[-3&7]
352 paddd @Tx[1],@X[-2&7]
353 movdqa @X[-4&7],0(%rsp) # X[]+K xfer to IALU
354 psubd @Tx[1],@X[-4&7] # restore X[]
355 movdqa @X[-3&7],16(%rsp)
356 psubd @Tx[1],@X[-3&7]
357 movdqa @X[-2&7],32(%rsp)
358 psubd @Tx[1],@X[-2&7]
362 sub AUTOLOAD() # thunk [simplified] 32-bit style perlasm
363 { my $opcode = $AUTOLOAD; $opcode =~ s/.*:://;
365 $arg = "\$$arg" if ($arg*1 eq $arg);
366 $code .= "\t$opcode\t".join(',',$arg,reverse @_)."\n";
369 sub Xupdate_ssse3_16_31() # recall that $Xi starts wtih 4
372 my @insns = (&$body,&$body,&$body,&$body); # 40 instructions
375 &movdqa (@X[0],@X[-3&7]);
378 &movdqa (@Tx[0],@X[-1&7]);
379 &palignr(@X[0],@X[-4&7],8); # compose "X[-14]" in "X[0]"
383 &paddd (@Tx[1],@X[-1&7]);
386 &psrldq (@Tx[0],4); # "X[-3]", 3 dwords
389 &pxor (@X[0],@X[-4&7]); # "X[0]"^="X[-16]"
393 &pxor (@Tx[0],@X[-2&7]); # "X[-3]"^"X[-8]"
399 &pxor (@X[0],@Tx[0]); # "X[0]"^="X[-3]"^"X[-8]"
402 &movdqa (eval(16*(($Xi-1)&3))."(%rsp)",@Tx[1]); # X[]+K xfer to IALU
406 &movdqa (@Tx[2],@X[0]);
407 &movdqa (@Tx[0],@X[0]);
413 &pslldq (@Tx[2],12); # "X[0]"<<96, extract one dword
414 &paddd (@X[0],@X[0]);
423 &movdqa (@Tx[1],@Tx[2]);
428 &por (@X[0],@Tx[0]); # "X[0]"<<<=1
435 &pxor (@X[0],@Tx[2]);
438 &movdqa (@Tx[2],eval(16*(($Xi)/5))."($K_XX_XX)"); # K_XX_XX
442 &pxor (@X[0],@Tx[1]); # "X[0]"^=("X[0]">>96)<<<2
444 foreach (@insns) { eval; } # remaining instructions [if any]
446 $Xi++; push(@X,shift(@X)); # "rotate" X[]
447 push(@Tx,shift(@Tx));
450 sub Xupdate_ssse3_32_79()
453 my @insns = (&$body,&$body,&$body,&$body); # 32 to 48 instructions
456 &movdqa (@Tx[0],@X[-1&7]) if ($Xi==8);
457 eval(shift(@insns)); # body_20_39
458 &pxor (@X[0],@X[-4&7]); # "X[0]"="X[-32]"^"X[-16]"
459 &palignr(@Tx[0],@X[-2&7],8); # compose "X[-6]"
462 eval(shift(@insns)); # rol
464 &pxor (@X[0],@X[-7&7]); # "X[0]"^="X[-28]"
466 eval(shift(@insns)) if (@insns[0] !~ /&ro[rl]/);
468 &movdqa (@Tx[2],@Tx[1]);# "perpetuate" K_XX_XX...
469 } else { # ... or load next one
470 &movdqa (@Tx[2],eval(16*($Xi/5))."($K_XX_XX)");
472 &paddd (@Tx[1],@X[-1&7]);
473 eval(shift(@insns)); # ror
476 &pxor (@X[0],@Tx[0]); # "X[0]"^="X[-6]"
477 eval(shift(@insns)); # body_20_39
480 eval(shift(@insns)); # rol
482 &movdqa (@Tx[0],@X[0]);
483 &movdqa (eval(16*(($Xi-1)&3))."(%rsp)",@Tx[1]); # X[]+K xfer to IALU
486 eval(shift(@insns)); # ror
490 eval(shift(@insns)); # body_20_39
494 eval(shift(@insns)); # rol
497 eval(shift(@insns)); # ror
500 &por (@X[0],@Tx[0]); # "X[0]"<<<=2
501 eval(shift(@insns)); # body_20_39
503 &movdqa (@Tx[1],@X[0]) if ($Xi<19);
505 eval(shift(@insns)); # rol
508 eval(shift(@insns)); # rol
511 foreach (@insns) { eval; } # remaining instructions
513 $Xi++; push(@X,shift(@X)); # "rotate" X[]
514 push(@Tx,shift(@Tx));
517 sub Xuplast_ssse3_80()
520 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions
524 &paddd (@Tx[1],@X[-1&7]);
530 &movdqa (eval(16*(($Xi-1)&3))."(%rsp)",@Tx[1]); # X[]+K xfer IALU
532 foreach (@insns) { eval; } # remaining instructions
535 &je (".Ldone_ssse3");
537 unshift(@Tx,pop(@Tx));
539 &movdqa (@X[2],"64($K_XX_XX)"); # pbswap mask
540 &movdqa (@Tx[1],"0($K_XX_XX)"); # K_00_19
541 &movdqu (@X[-4&7],"0($inp)"); # load input
542 &movdqu (@X[-3&7],"16($inp)");
543 &movdqu (@X[-2&7],"32($inp)");
544 &movdqu (@X[-1&7],"48($inp)");
545 &pshufb (@X[-4&7],@X[2]); # byte swap
554 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions
559 &pshufb (@X[($Xi-3)&7],@X[2]);
562 &paddd (@X[($Xi-4)&7],@Tx[1]);
567 &movdqa (eval(16*$Xi)."(%rsp)",@X[($Xi-4)&7]); # X[]+K xfer to IALU
570 &psubd (@X[($Xi-4)&7],@Tx[1]);
572 foreach (@insns) { eval; }
579 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions
582 foreach (@insns) { eval; }
587 '($a,$b,$c,$d,$e)=@V;'.
588 '&add ($e,eval(4*($j&15))."(%rsp)");', # X[]+K xfer
590 '&mov (@T[1],$a);', # $b in next round
592 '&and (@T[0],$c);', # ($b&($c^$d))
593 '&xor ($c,$d);', # restore $c
596 '&$_ror ($b,$j?7:2);', # $b>>>2
597 '&add ($e,@T[0]);' .'$j++; unshift(@V,pop(@V)); unshift(@T,pop(@T));'
603 '($a,$b,$c,$d,$e)=@V;'.
604 '&add ($e,eval(4*($j++&15))."(%rsp)");', # X[]+K xfer
605 '&xor (@T[0],$d);', # ($b^$d)
606 '&mov (@T[1],$a);', # $b in next round
608 '&xor (@T[0],$c);', # ($b^$d^$c)
610 '&$_ror ($b,7);', # $b>>>2
611 '&add ($e,@T[0]);' .'unshift(@V,pop(@V)); unshift(@T,pop(@T));'
617 '($a,$b,$c,$d,$e)=@V;'.
620 '&add ($e,eval(4*($j++&15))."(%rsp)");', # X[]+K xfer
622 '&and (@T[0],$c);', # ($b&($c^$d))
623 '&$_ror ($b,7);', # $b>>>2
625 '&mov (@T[1],$a);', # $b in next round
628 '&xor ($c,$d);', # restore $c
629 '&add ($e,$a);' .'unshift(@V,pop(@V)); unshift(@T,pop(@T));'
636 &Xupdate_ssse3_16_31(\&body_00_19);
637 &Xupdate_ssse3_16_31(\&body_00_19);
638 &Xupdate_ssse3_16_31(\&body_00_19);
639 &Xupdate_ssse3_16_31(\&body_00_19);
640 &Xupdate_ssse3_32_79(\&body_00_19);
641 &Xupdate_ssse3_32_79(\&body_20_39);
642 &Xupdate_ssse3_32_79(\&body_20_39);
643 &Xupdate_ssse3_32_79(\&body_20_39);
644 &Xupdate_ssse3_32_79(\&body_20_39);
645 &Xupdate_ssse3_32_79(\&body_20_39);
646 &Xupdate_ssse3_32_79(\&body_40_59);
647 &Xupdate_ssse3_32_79(\&body_40_59);
648 &Xupdate_ssse3_32_79(\&body_40_59);
649 &Xupdate_ssse3_32_79(\&body_40_59);
650 &Xupdate_ssse3_32_79(\&body_40_59);
651 &Xupdate_ssse3_32_79(\&body_20_39);
652 &Xuplast_ssse3_80(\&body_20_39); # can jump to "done"
654 $saved_j=$j; @saved_V=@V;
656 &Xloop_ssse3(\&body_20_39);
657 &Xloop_ssse3(\&body_20_39);
658 &Xloop_ssse3(\&body_20_39);
661 add 0($ctx),$A # update context
668 mov @T[0],$B # magic seed
677 $j=$saved_j; @V=@saved_V;
679 &Xtail_ssse3(\&body_20_39);
680 &Xtail_ssse3(\&body_20_39);
681 &Xtail_ssse3(\&body_20_39);
684 add 0($ctx),$A # update context
695 $code.=<<___ if ($win64);
696 movaps 64+0(%rsp),%xmm6
697 movaps 64+16(%rsp),%xmm7
698 movaps 64+32(%rsp),%xmm8
699 movaps 64+48(%rsp),%xmm9
700 movaps 64+64(%rsp),%xmm10
703 lea `64+($win64?5*16:0)`(%rsp),%rsi
710 .size sha1_block_data_order_ssse3,.-sha1_block_data_order_ssse3
715 my @X=map("%xmm$_",(4..7,0..3));
716 my @Tx=map("%xmm$_",(8..10));
717 my @V=($A,$B,$C,$D,$E)=("%eax","%ebx","%ecx","%edx","%ebp"); # size optimization
718 my @T=("%esi","%edi");
722 my $_rol=sub { &shld(@_[0],@_) };
723 my $_ror=sub { &shrd(@_[0],@_) };
726 .type sha1_block_data_order_avx,\@function,3
728 sha1_block_data_order_avx:
733 lea `-64-($win64?5*16:0)`(%rsp),%rsp
735 $code.=<<___ if ($win64);
736 movaps %xmm6,64+0(%rsp)
737 movaps %xmm7,64+16(%rsp)
738 movaps %xmm8,64+32(%rsp)
739 movaps %xmm9,64+48(%rsp)
740 movaps %xmm10,64+64(%rsp)
744 mov %rdi,$ctx # reassigned argument
745 mov %rsi,$inp # reassigned argument
746 mov %rdx,$num # reassigned argument
751 lea K_XX_XX(%rip),$K_XX_XX
753 mov 0($ctx),$A # load context
757 mov $B,@T[0] # magic seed
760 vmovdqa 64($K_XX_XX),@X[2] # pbswap mask
761 vmovdqa 0($K_XX_XX),@Tx[1] # K_00_19
762 vmovdqu 0($inp),@X[-4&7] # load input to %xmm[0-3]
763 vmovdqu 16($inp),@X[-3&7]
764 vmovdqu 32($inp),@X[-2&7]
765 vmovdqu 48($inp),@X[-1&7]
766 vpshufb @X[2],@X[-4&7],@X[-4&7] # byte swap
768 vpshufb @X[2],@X[-3&7],@X[-3&7]
769 vpshufb @X[2],@X[-2&7],@X[-2&7]
770 vpshufb @X[2],@X[-1&7],@X[-1&7]
771 vpaddd @Tx[1],@X[-4&7],@X[0] # add K_00_19
772 vpaddd @Tx[1],@X[-3&7],@X[1]
773 vpaddd @Tx[1],@X[-2&7],@X[2]
774 vmovdqa @X[0],0(%rsp) # X[]+K xfer to IALU
775 vmovdqa @X[1],16(%rsp)
776 vmovdqa @X[2],32(%rsp)
780 sub Xupdate_avx_16_31() # recall that $Xi starts wtih 4
783 my @insns = (&$body,&$body,&$body,&$body); # 40 instructions
788 &vpalignr(@X[0],@X[-3&7],@X[-4&7],8); # compose "X[-14]" in "X[0]"
792 &vpaddd (@Tx[1],@Tx[1],@X[-1&7]);
795 &vpsrldq(@Tx[0],@X[-1&7],4); # "X[-3]", 3 dwords
798 &vpxor (@X[0],@X[0],@X[-4&7]); # "X[0]"^="X[-16]"
802 &vpxor (@Tx[0],@Tx[0],@X[-2&7]); # "X[-3]"^"X[-8]"
808 &vpxor (@X[0],@X[0],@Tx[0]); # "X[0]"^="X[-3]"^"X[-8]"
811 &vmovdqa (eval(16*(($Xi-1)&3))."(%rsp)",@Tx[1]); # X[]+K xfer to IALU
815 &vpsrld (@Tx[0],@X[0],31);
821 &vpslldq(@Tx[2],@X[0],12); # "X[0]"<<96, extract one dword
822 &vpaddd (@X[0],@X[0],@X[0]);
828 &vpsrld (@Tx[1],@Tx[2],30);
829 &vpor (@X[0],@X[0],@Tx[0]); # "X[0]"<<<=1
835 &vpslld (@Tx[2],@Tx[2],2);
836 &vpxor (@X[0],@X[0],@Tx[1]);
842 &vpxor (@X[0],@X[0],@Tx[2]); # "X[0]"^=("X[0]">>96)<<<2
845 &vmovdqa (@Tx[2],eval(16*(($Xi)/5))."($K_XX_XX)"); # K_XX_XX
850 foreach (@insns) { eval; } # remaining instructions [if any]
852 $Xi++; push(@X,shift(@X)); # "rotate" X[]
853 push(@Tx,shift(@Tx));
856 sub Xupdate_avx_32_79()
859 my @insns = (&$body,&$body,&$body,&$body); # 32 to 48 instructions
862 &vpalignr(@Tx[0],@X[-1&7],@X[-2&7],8); # compose "X[-6]"
863 &vpxor (@X[0],@X[0],@X[-4&7]); # "X[0]"="X[-32]"^"X[-16]"
864 eval(shift(@insns)); # body_20_39
867 eval(shift(@insns)); # rol
869 &vpxor (@X[0],@X[0],@X[-7&7]); # "X[0]"^="X[-28]"
871 eval(shift(@insns)) if (@insns[0] !~ /&ro[rl]/);
873 &vmovdqa (@Tx[2],@Tx[1]);# "perpetuate" K_XX_XX...
874 } else { # ... or load next one
875 &vmovdqa (@Tx[2],eval(16*($Xi/5))."($K_XX_XX)");
877 &vpaddd (@Tx[1],@Tx[1],@X[-1&7]);
878 eval(shift(@insns)); # ror
881 &vpxor (@X[0],@X[0],@Tx[0]); # "X[0]"^="X[-6]"
882 eval(shift(@insns)); # body_20_39
885 eval(shift(@insns)); # rol
887 &vpsrld (@Tx[0],@X[0],30);
888 &vmovdqa (eval(16*(($Xi-1)&3))."(%rsp)",@Tx[1]); # X[]+K xfer to IALU
891 eval(shift(@insns)); # ror
894 &vpslld (@X[0],@X[0],2);
895 eval(shift(@insns)); # body_20_39
898 eval(shift(@insns)); # rol
901 eval(shift(@insns)); # ror
904 &vpor (@X[0],@X[0],@Tx[0]); # "X[0]"<<<=2
905 eval(shift(@insns)); # body_20_39
907 &vmovdqa (@Tx[1],@X[0]) if ($Xi<19);
909 eval(shift(@insns)); # rol
912 eval(shift(@insns)); # rol
915 foreach (@insns) { eval; } # remaining instructions
917 $Xi++; push(@X,shift(@X)); # "rotate" X[]
918 push(@Tx,shift(@Tx));
924 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions
928 &vpaddd (@Tx[1],@Tx[1],@X[-1&7]);
934 &movdqa (eval(16*(($Xi-1)&3))."(%rsp)",@Tx[1]); # X[]+K xfer IALU
936 foreach (@insns) { eval; } # remaining instructions
941 unshift(@Tx,pop(@Tx));
943 &vmovdqa(@X[2],"64($K_XX_XX)"); # pbswap mask
944 &vmovdqa(@Tx[1],"0($K_XX_XX)"); # K_00_19
945 &vmovdqu(@X[-4&7],"0($inp)"); # load input
946 &vmovdqu(@X[-3&7],"16($inp)");
947 &vmovdqu(@X[-2&7],"32($inp)");
948 &vmovdqu(@X[-1&7],"48($inp)");
949 &vpshufb(@X[-4&7],@X[-4&7],@X[2]); # byte swap
958 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions
963 &vpshufb(@X[($Xi-3)&7],@X[($Xi-3)&7],@X[2]);
966 &vpaddd (@X[$Xi&7],@X[($Xi-4)&7],@Tx[1]);
971 &vmovdqa(eval(16*$Xi)."(%rsp)",@X[$Xi&7]); # X[]+K xfer to IALU
975 foreach (@insns) { eval; }
982 my @insns = (&$body,&$body,&$body,&$body); # 32 instructions
985 foreach (@insns) { eval; }
992 &Xupdate_avx_16_31(\&body_00_19);
993 &Xupdate_avx_16_31(\&body_00_19);
994 &Xupdate_avx_16_31(\&body_00_19);
995 &Xupdate_avx_16_31(\&body_00_19);
996 &Xupdate_avx_32_79(\&body_00_19);
997 &Xupdate_avx_32_79(\&body_20_39);
998 &Xupdate_avx_32_79(\&body_20_39);
999 &Xupdate_avx_32_79(\&body_20_39);
1000 &Xupdate_avx_32_79(\&body_20_39);
1001 &Xupdate_avx_32_79(\&body_20_39);
1002 &Xupdate_avx_32_79(\&body_40_59);
1003 &Xupdate_avx_32_79(\&body_40_59);
1004 &Xupdate_avx_32_79(\&body_40_59);
1005 &Xupdate_avx_32_79(\&body_40_59);
1006 &Xupdate_avx_32_79(\&body_40_59);
1007 &Xupdate_avx_32_79(\&body_20_39);
1008 &Xuplast_avx_80(\&body_20_39); # can jump to "done"
1010 $saved_j=$j; @saved_V=@V;
1012 &Xloop_avx(\&body_20_39);
1013 &Xloop_avx(\&body_20_39);
1014 &Xloop_avx(\&body_20_39);
1017 add 0($ctx),$A # update context
1024 mov @T[0],$B # magic seed
1033 $j=$saved_j; @V=@saved_V;
1035 &Xtail_avx(\&body_20_39);
1036 &Xtail_avx(\&body_20_39);
1037 &Xtail_avx(\&body_20_39);
1042 add 0($ctx),$A # update context
1053 $code.=<<___ if ($win64);
1054 movaps 64+0(%rsp),%xmm6
1055 movaps 64+16(%rsp),%xmm7
1056 movaps 64+32(%rsp),%xmm8
1057 movaps 64+48(%rsp),%xmm9
1058 movaps 64+64(%rsp),%xmm10
1061 lea `64+($win64?5*16:0)`(%rsp),%rsi
1068 .size sha1_block_data_order_avx,.-sha1_block_data_order_avx
1074 .long 0x5a827999,0x5a827999,0x5a827999,0x5a827999 # K_00_19
1075 .long 0x6ed9eba1,0x6ed9eba1,0x6ed9eba1,0x6ed9eba1 # K_20_39
1076 .long 0x8f1bbcdc,0x8f1bbcdc,0x8f1bbcdc,0x8f1bbcdc # K_40_59
1077 .long 0xca62c1d6,0xca62c1d6,0xca62c1d6,0xca62c1d6 # K_60_79
1078 .long 0x00010203,0x04050607,0x08090a0b,0x0c0d0e0f # pbswap mask
1082 .asciz "SHA1 block transform for x86_64, CRYPTOGAMS by <appro\@openssl.org>"
1086 # EXCEPTION_DISPOSITION handler (EXCEPTION_RECORD *rec,ULONG64 frame,
1087 # CONTEXT *context,DISPATCHER_CONTEXT *disp)
1095 .extern __imp_RtlVirtualUnwind
1096 .type se_handler,\@abi-omnipotent
1110 mov 120($context),%rax # pull context->Rax
1111 mov 248($context),%rbx # pull context->Rip
1113 lea .Lprologue(%rip),%r10
1114 cmp %r10,%rbx # context->Rip<.Lprologue
1115 jb .Lcommon_seh_tail
1117 mov 152($context),%rax # pull context->Rsp
1119 lea .Lepilogue(%rip),%r10
1120 cmp %r10,%rbx # context->Rip>=.Lepilogue
1121 jae .Lcommon_seh_tail
1123 mov `16*4`(%rax),%rax # pull saved stack pointer
1130 mov %rbx,144($context) # restore context->Rbx
1131 mov %rbp,160($context) # restore context->Rbp
1132 mov %r12,216($context) # restore context->R12
1133 mov %r13,224($context) # restore context->R13
1135 jmp .Lcommon_seh_tail
1136 .size se_handler,.-se_handler
1138 .type ssse3_handler,\@abi-omnipotent
1152 mov 120($context),%rax # pull context->Rax
1153 mov 248($context),%rbx # pull context->Rip
1155 mov 8($disp),%rsi # disp->ImageBase
1156 mov 56($disp),%r11 # disp->HandlerData
1158 mov 0(%r11),%r10d # HandlerData[0]
1159 lea (%rsi,%r10),%r10 # prologue label
1160 cmp %r10,%rbx # context->Rip<prologue label
1161 jb .Lcommon_seh_tail
1163 mov 152($context),%rax # pull context->Rsp
1165 mov 4(%r11),%r10d # HandlerData[1]
1166 lea (%rsi,%r10),%r10 # epilogue label
1167 cmp %r10,%rbx # context->Rip>=epilogue label
1168 jae .Lcommon_seh_tail
1171 lea 512($context),%rdi # &context.Xmm6
1173 .long 0xa548f3fc # cld; rep movsq
1174 lea `24+64+5*16`(%rax),%rax # adjust stack pointer
1179 mov %rbx,144($context) # restore context->Rbx
1180 mov %rbp,160($context) # restore context->Rbp
1181 mov %r12,216($context) # restore cotnext->R12
1186 mov %rax,152($context) # restore context->Rsp
1187 mov %rsi,168($context) # restore context->Rsi
1188 mov %rdi,176($context) # restore context->Rdi
1190 mov 40($disp),%rdi # disp->ContextRecord
1191 mov $context,%rsi # context
1192 mov \$154,%ecx # sizeof(CONTEXT)
1193 .long 0xa548f3fc # cld; rep movsq
1196 xor %rcx,%rcx # arg1, UNW_FLAG_NHANDLER
1197 mov 8(%rsi),%rdx # arg2, disp->ImageBase
1198 mov 0(%rsi),%r8 # arg3, disp->ControlPc
1199 mov 16(%rsi),%r9 # arg4, disp->FunctionEntry
1200 mov 40(%rsi),%r10 # disp->ContextRecord
1201 lea 56(%rsi),%r11 # &disp->HandlerData
1202 lea 24(%rsi),%r12 # &disp->EstablisherFrame
1203 mov %r10,32(%rsp) # arg5
1204 mov %r11,40(%rsp) # arg6
1205 mov %r12,48(%rsp) # arg7
1206 mov %rcx,56(%rsp) # arg8, (NULL)
1207 call *__imp_RtlVirtualUnwind(%rip)
1209 mov \$1,%eax # ExceptionContinueSearch
1221 .size ssse3_handler,.-ssse3_handler
1225 .rva .LSEH_begin_sha1_block_data_order
1226 .rva .LSEH_end_sha1_block_data_order
1227 .rva .LSEH_info_sha1_block_data_order
1228 .rva .LSEH_begin_sha1_block_data_order_ssse3
1229 .rva .LSEH_end_sha1_block_data_order_ssse3
1230 .rva .LSEH_info_sha1_block_data_order_ssse3
1232 $code.=<<___ if ($avx);
1233 .rva .LSEH_begin_sha1_block_data_order_avx
1234 .rva .LSEH_end_sha1_block_data_order_avx
1235 .rva .LSEH_info_sha1_block_data_order_avx
1240 .LSEH_info_sha1_block_data_order:
1243 .LSEH_info_sha1_block_data_order_ssse3:
1246 .rva .Lprologue_ssse3,.Lepilogue_ssse3 # HandlerData[]
1248 $code.=<<___ if ($avx);
1249 .LSEH_info_sha1_block_data_order_avx:
1252 .rva .Lprologue_avx,.Lepilogue_avx # HandlerData[]
1256 ####################################################################
1258 $code =~ s/\`([^\`]*)\`/eval $1/gem;