2 * Copyright 2009-2018 The OpenSSL Project Authors. All Rights Reserved.
4 * Licensed under the OpenSSL license (the "License"). You may not use
5 * this file except in compliance with the License. You can obtain a copy
6 * in the file LICENSE in the source distribution or at
7 * https://www.openssl.org/source/license.html
16 #if defined(__linux) || defined(_AIX)
17 # include <sys/utsname.h>
19 #if defined(_AIX53) /* defined even on post-5.3 */
20 # include <sys/systemcfg.h>
21 # if !defined(__power_set)
22 # define __power_set(a) (_system_configuration.implementation & (a))
25 #if defined(__APPLE__) && defined(__MACH__)
26 # include <sys/types.h>
27 # include <sys/sysctl.h>
29 #include <openssl/crypto.h>
30 #include <openssl/bn.h>
31 #include <internal/cryptlib.h>
32 #include <internal/chacha.h>
33 #include "bn/bn_lcl.h"
37 unsigned int OPENSSL_ppccap_P = 0;
39 static sigset_t all_masked;
41 #ifdef OPENSSL_BN_ASM_MONT
42 int bn_mul_mont(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
43 const BN_ULONG *np, const BN_ULONG *n0, int num)
45 int bn_mul_mont_int(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
46 const BN_ULONG *np, const BN_ULONG *n0, int num);
47 int bn_mul4x_mont_int(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
48 const BN_ULONG *np, const BN_ULONG *n0, int num);
54 return bn_mul4x_mont_int(rp, ap, bp, np, n0, num);
57 * There used to be [optional] call to bn_mul_mont_fpu64 here,
58 * but above subroutine is faster on contemporary processors.
59 * Formulation means that there might be old processors where
60 * FPU code path would be faster, POWER6 perhaps, but there was
61 * no opportunity to figure it out...
64 return bn_mul_mont_int(rp, ap, bp, np, n0, num);
68 void sha256_block_p8(void *ctx, const void *inp, size_t len);
69 void sha256_block_ppc(void *ctx, const void *inp, size_t len);
70 void sha256_block_data_order(void *ctx, const void *inp, size_t len);
71 void sha256_block_data_order(void *ctx, const void *inp, size_t len)
73 OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha256_block_p8(ctx, inp, len) :
74 sha256_block_ppc(ctx, inp, len);
77 void sha512_block_p8(void *ctx, const void *inp, size_t len);
78 void sha512_block_ppc(void *ctx, const void *inp, size_t len);
79 void sha512_block_data_order(void *ctx, const void *inp, size_t len);
80 void sha512_block_data_order(void *ctx, const void *inp, size_t len)
82 OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha512_block_p8(ctx, inp, len) :
83 sha512_block_ppc(ctx, inp, len);
86 #ifndef OPENSSL_NO_CHACHA
87 void ChaCha20_ctr32_int(unsigned char *out, const unsigned char *inp,
88 size_t len, const unsigned int key[8],
89 const unsigned int counter[4]);
90 void ChaCha20_ctr32_vmx(unsigned char *out, const unsigned char *inp,
91 size_t len, const unsigned int key[8],
92 const unsigned int counter[4]);
93 void ChaCha20_ctr32(unsigned char *out, const unsigned char *inp,
94 size_t len, const unsigned int key[8],
95 const unsigned int counter[4])
97 OPENSSL_ppccap_P & PPC_ALTIVEC
98 ? ChaCha20_ctr32_vmx(out, inp, len, key, counter)
99 : ChaCha20_ctr32_int(out, inp, len, key, counter);
103 #ifndef OPENSSL_NO_POLY1305
104 void poly1305_init_int(void *ctx, const unsigned char key[16]);
105 void poly1305_blocks(void *ctx, const unsigned char *inp, size_t len,
106 unsigned int padbit);
107 void poly1305_emit(void *ctx, unsigned char mac[16],
108 const unsigned int nonce[4]);
109 void poly1305_init_fpu(void *ctx, const unsigned char key[16]);
110 void poly1305_blocks_fpu(void *ctx, const unsigned char *inp, size_t len,
111 unsigned int padbit);
112 void poly1305_emit_fpu(void *ctx, unsigned char mac[16],
113 const unsigned int nonce[4]);
114 int poly1305_init(void *ctx, const unsigned char key[16], void *func[2]);
115 int poly1305_init(void *ctx, const unsigned char key[16], void *func[2])
117 if (sizeof(size_t) == 4 && (OPENSSL_ppccap_P & PPC_FPU)) {
118 poly1305_init_fpu(ctx, key);
119 func[0] = (void*)(uintptr_t)poly1305_blocks_fpu;
120 func[1] = (void*)(uintptr_t)poly1305_emit_fpu;
122 poly1305_init_int(ctx, key);
123 func[0] = (void*)(uintptr_t)poly1305_blocks;
124 func[1] = (void*)(uintptr_t)poly1305_emit;
130 #ifdef ECP_NISTZ256_ASM
131 void ecp_nistz256_mul_mont(unsigned long res[4], const unsigned long a[4],
132 const unsigned long b[4]);
134 void ecp_nistz256_to_mont(unsigned long res[4], const unsigned long in[4]);
135 void ecp_nistz256_to_mont(unsigned long res[4], const unsigned long in[4])
137 static const unsigned long RR[] = { 0x0000000000000003U,
140 0x00000004fffffffdU };
142 ecp_nistz256_mul_mont(res, in, RR);
145 void ecp_nistz256_from_mont(unsigned long res[4], const unsigned long in[4]);
146 void ecp_nistz256_from_mont(unsigned long res[4], const unsigned long in[4])
148 static const unsigned long one[] = { 1, 0, 0, 0 };
150 ecp_nistz256_mul_mont(res, in, one);
154 static sigjmp_buf ill_jmp;
155 static void ill_handler(int sig)
157 siglongjmp(ill_jmp, sig);
160 void OPENSSL_fpu_probe(void);
161 void OPENSSL_ppc64_probe(void);
162 void OPENSSL_altivec_probe(void);
163 void OPENSSL_crypto207_probe(void);
164 void OPENSSL_madd300_probe(void);
167 * Use a weak reference to getauxval() so we can use it if it is available
168 * but don't break the build if it is not. Note that this is *link-time*
169 * feature detection, not *run-time*. In other words if we link with
170 * symbol present, it's expected to be present even at run-time.
172 #if defined(__GNUC__) && __GNUC__>=2 && defined(__ELF__)
173 extern unsigned long getauxval(unsigned long type) __attribute__ ((weak));
175 static unsigned long (*getauxval) (unsigned long) = NULL;
178 /* I wish <sys/auxv.h> was universally available */
179 #define HWCAP 16 /* AT_HWCAP */
180 #define HWCAP_PPC64 (1U << 30)
181 #define HWCAP_ALTIVEC (1U << 28)
182 #define HWCAP_FPU (1U << 27)
183 #define HWCAP_POWER6_EXT (1U << 9)
184 #define HWCAP_VSX (1U << 7)
186 #define HWCAP2 26 /* AT_HWCAP2 */
187 #define HWCAP_VEC_CRYPTO (1U << 25)
188 #define HWCAP_ARCH_3_00 (1U << 23)
190 # if defined(__GNUC__) && __GNUC__>=2
191 __attribute__ ((constructor))
193 void OPENSSL_cpuid_setup(void)
196 struct sigaction ill_oact, ill_act;
198 static int trigger = 0;
204 if ((e = getenv("OPENSSL_ppccap"))) {
205 OPENSSL_ppccap_P = strtoul(e, NULL, 0);
209 OPENSSL_ppccap_P = 0;
212 OPENSSL_ppccap_P |= PPC_FPU;
214 if (sizeof(size_t) == 4) {
216 # if defined(_SC_AIX_KERNEL_BITMODE)
217 if (sysconf(_SC_AIX_KERNEL_BITMODE) != 64)
220 if (uname(&uts) != 0 || atoi(uts.version) < 6)
224 # if defined(__power_set)
226 * Value used in __power_set is a single-bit 1<<n one denoting
227 * specific processor class. Incidentally 0xffffffff<<n can be
228 * used to denote specific processor and its successors.
230 if (sizeof(size_t) == 4) {
231 /* In 32-bit case PPC_FPU64 is always fastest [if option] */
232 if (__power_set(0xffffffffU<<13)) /* POWER5 and later */
233 OPENSSL_ppccap_P |= PPC_FPU64;
235 /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
236 if (__power_set(0x1U<<14)) /* POWER6 */
237 OPENSSL_ppccap_P |= PPC_FPU64;
240 if (__power_set(0xffffffffU<<14)) /* POWER6 and later */
241 OPENSSL_ppccap_P |= PPC_ALTIVEC;
243 if (__power_set(0xffffffffU<<16)) /* POWER8 and later */
244 OPENSSL_ppccap_P |= PPC_CRYPTO207;
246 if (__power_set(0xffffffffU<<17)) /* POWER9 and later */
247 OPENSSL_ppccap_P |= PPC_MADD300;
253 #if defined(__APPLE__) && defined(__MACH__)
254 OPENSSL_ppccap_P |= PPC_FPU;
258 size_t len = sizeof(val);
260 if (sysctlbyname("hw.optional.64bitops", &val, &len, NULL, 0) == 0) {
262 OPENSSL_ppccap_P |= PPC_FPU64;
266 if (sysctlbyname("hw.optional.altivec", &val, &len, NULL, 0) == 0) {
268 OPENSSL_ppccap_P |= PPC_ALTIVEC;
275 if (getauxval != NULL) {
276 unsigned long hwcap = getauxval(HWCAP);
278 if (hwcap & HWCAP_FPU) {
279 OPENSSL_ppccap_P |= PPC_FPU;
281 if (sizeof(size_t) == 4) {
282 /* In 32-bit case PPC_FPU64 is always fastest [if option] */
283 if (hwcap & HWCAP_PPC64)
284 OPENSSL_ppccap_P |= PPC_FPU64;
286 /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
287 if (hwcap & HWCAP_POWER6_EXT)
288 OPENSSL_ppccap_P |= PPC_FPU64;
292 if (hwcap & HWCAP_ALTIVEC) {
293 OPENSSL_ppccap_P |= PPC_ALTIVEC;
295 if ((hwcap & HWCAP_VSX) && (getauxval(HWCAP2) & HWCAP_VEC_CRYPTO))
296 OPENSSL_ppccap_P |= PPC_CRYPTO207;
299 if (hwcap & HWCAP_ARCH_3_00) {
300 OPENSSL_ppccap_P |= PPC_MADD300;
306 sigfillset(&all_masked);
307 sigdelset(&all_masked, SIGILL);
308 sigdelset(&all_masked, SIGTRAP);
310 sigdelset(&all_masked, SIGEMT);
312 sigdelset(&all_masked, SIGFPE);
313 sigdelset(&all_masked, SIGBUS);
314 sigdelset(&all_masked, SIGSEGV);
316 memset(&ill_act, 0, sizeof(ill_act));
317 ill_act.sa_handler = ill_handler;
318 ill_act.sa_mask = all_masked;
320 sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset);
321 sigaction(SIGILL, &ill_act, &ill_oact);
323 if (sigsetjmp(ill_jmp,1) == 0) {
325 OPENSSL_ppccap_P |= PPC_FPU;
327 if (sizeof(size_t) == 4) {
330 if (uname(&uts) == 0 && strcmp(uts.machine, "ppc64") == 0)
332 if (sigsetjmp(ill_jmp, 1) == 0) {
333 OPENSSL_ppc64_probe();
334 OPENSSL_ppccap_P |= PPC_FPU64;
338 * Wanted code detecting POWER6 CPU and setting PPC_FPU64
343 if (sigsetjmp(ill_jmp, 1) == 0) {
344 OPENSSL_altivec_probe();
345 OPENSSL_ppccap_P |= PPC_ALTIVEC;
346 if (sigsetjmp(ill_jmp, 1) == 0) {
347 OPENSSL_crypto207_probe();
348 OPENSSL_ppccap_P |= PPC_CRYPTO207;
352 if (sigsetjmp(ill_jmp, 1) == 0) {
353 OPENSSL_madd300_probe();
354 OPENSSL_ppccap_P |= PPC_MADD300;
357 sigaction(SIGILL, &ill_oact, NULL);
358 sigprocmask(SIG_SETMASK, &oset, NULL);