2 * Copyright 2009-2018 The OpenSSL Project Authors. All Rights Reserved.
4 * Licensed under the Apache License 2.0 (the "License"). You may not use
5 * this file except in compliance with the License. You can obtain a copy
6 * in the file LICENSE in the source distribution or at
7 * https://www.openssl.org/source/license.html
16 #if defined(__linux) || defined(_AIX)
17 # include <sys/utsname.h>
19 #if defined(_AIX53) /* defined even on post-5.3 */
20 # include <sys/systemcfg.h>
21 # if !defined(__power_set)
22 # define __power_set(a) (_system_configuration.implementation & (a))
25 #if defined(__APPLE__) && defined(__MACH__)
26 # include <sys/types.h>
27 # include <sys/sysctl.h>
29 #include <openssl/crypto.h>
30 #include <openssl/bn.h>
31 #include <internal/cryptlib.h>
32 #include <internal/chacha.h>
33 #include "bn/bn_lcl.h"
37 unsigned int OPENSSL_ppccap_P = 0;
39 static sigset_t all_masked;
41 #ifdef OPENSSL_BN_ASM_MONT
42 int bn_mul_mont(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
43 const BN_ULONG *np, const BN_ULONG *n0, int num)
45 int bn_mul_mont_int(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
46 const BN_ULONG *np, const BN_ULONG *n0, int num);
47 int bn_mul4x_mont_int(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
48 const BN_ULONG *np, const BN_ULONG *n0, int num);
54 return bn_mul4x_mont_int(rp, ap, bp, np, n0, num);
57 * There used to be [optional] call to bn_mul_mont_fpu64 here,
58 * but above subroutine is faster on contemporary processors.
59 * Formulation means that there might be old processors where
60 * FPU code path would be faster, POWER6 perhaps, but there was
61 * no opportunity to figure it out...
64 return bn_mul_mont_int(rp, ap, bp, np, n0, num);
68 void sha256_block_p8(void *ctx, const void *inp, size_t len);
69 void sha256_block_ppc(void *ctx, const void *inp, size_t len);
70 void sha256_block_data_order(void *ctx, const void *inp, size_t len);
71 void sha256_block_data_order(void *ctx, const void *inp, size_t len)
73 OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha256_block_p8(ctx, inp, len) :
74 sha256_block_ppc(ctx, inp, len);
77 void sha512_block_p8(void *ctx, const void *inp, size_t len);
78 void sha512_block_ppc(void *ctx, const void *inp, size_t len);
79 void sha512_block_data_order(void *ctx, const void *inp, size_t len);
80 void sha512_block_data_order(void *ctx, const void *inp, size_t len)
82 OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha512_block_p8(ctx, inp, len) :
83 sha512_block_ppc(ctx, inp, len);
86 #ifndef OPENSSL_NO_CHACHA
87 void ChaCha20_ctr32_int(unsigned char *out, const unsigned char *inp,
88 size_t len, const unsigned int key[8],
89 const unsigned int counter[4]);
90 void ChaCha20_ctr32_vmx(unsigned char *out, const unsigned char *inp,
91 size_t len, const unsigned int key[8],
92 const unsigned int counter[4]);
93 void ChaCha20_ctr32_vsx(unsigned char *out, const unsigned char *inp,
94 size_t len, const unsigned int key[8],
95 const unsigned int counter[4]);
96 void ChaCha20_ctr32(unsigned char *out, const unsigned char *inp,
97 size_t len, const unsigned int key[8],
98 const unsigned int counter[4])
100 OPENSSL_ppccap_P & PPC_CRYPTO207
101 ? ChaCha20_ctr32_vsx(out, inp, len, key, counter)
102 : OPENSSL_ppccap_P & PPC_ALTIVEC
103 ? ChaCha20_ctr32_vmx(out, inp, len, key, counter)
104 : ChaCha20_ctr32_int(out, inp, len, key, counter);
108 #ifndef OPENSSL_NO_POLY1305
109 void poly1305_init_int(void *ctx, const unsigned char key[16]);
110 void poly1305_blocks(void *ctx, const unsigned char *inp, size_t len,
111 unsigned int padbit);
112 void poly1305_emit(void *ctx, unsigned char mac[16],
113 const unsigned int nonce[4]);
114 void poly1305_init_fpu(void *ctx, const unsigned char key[16]);
115 void poly1305_blocks_fpu(void *ctx, const unsigned char *inp, size_t len,
116 unsigned int padbit);
117 void poly1305_emit_fpu(void *ctx, unsigned char mac[16],
118 const unsigned int nonce[4]);
119 int poly1305_init(void *ctx, const unsigned char key[16], void *func[2]);
120 int poly1305_init(void *ctx, const unsigned char key[16], void *func[2])
122 if (sizeof(size_t) == 4 && (OPENSSL_ppccap_P & PPC_FPU)) {
123 poly1305_init_fpu(ctx, key);
124 func[0] = (void*)(uintptr_t)poly1305_blocks_fpu;
125 func[1] = (void*)(uintptr_t)poly1305_emit_fpu;
127 poly1305_init_int(ctx, key);
128 func[0] = (void*)(uintptr_t)poly1305_blocks;
129 func[1] = (void*)(uintptr_t)poly1305_emit;
135 #ifdef ECP_NISTZ256_ASM
136 void ecp_nistz256_mul_mont(unsigned long res[4], const unsigned long a[4],
137 const unsigned long b[4]);
139 void ecp_nistz256_to_mont(unsigned long res[4], const unsigned long in[4]);
140 void ecp_nistz256_to_mont(unsigned long res[4], const unsigned long in[4])
142 static const unsigned long RR[] = { 0x0000000000000003U,
145 0x00000004fffffffdU };
147 ecp_nistz256_mul_mont(res, in, RR);
150 void ecp_nistz256_from_mont(unsigned long res[4], const unsigned long in[4]);
151 void ecp_nistz256_from_mont(unsigned long res[4], const unsigned long in[4])
153 static const unsigned long one[] = { 1, 0, 0, 0 };
155 ecp_nistz256_mul_mont(res, in, one);
159 static sigjmp_buf ill_jmp;
160 static void ill_handler(int sig)
162 siglongjmp(ill_jmp, sig);
165 void OPENSSL_fpu_probe(void);
166 void OPENSSL_ppc64_probe(void);
167 void OPENSSL_altivec_probe(void);
168 void OPENSSL_crypto207_probe(void);
169 void OPENSSL_madd300_probe(void);
171 #if defined(__GLIBC__) && defined(__GLIBC_PREREQ)
172 # if __GLIBC_PREREQ(2, 16)
173 # include <sys/auxv.h>
174 # define OSSL_IMPLEMENT_GETAUXVAL
178 /* I wish <sys/auxv.h> was universally available */
179 #define HWCAP 16 /* AT_HWCAP */
180 #define HWCAP_PPC64 (1U << 30)
181 #define HWCAP_ALTIVEC (1U << 28)
182 #define HWCAP_FPU (1U << 27)
183 #define HWCAP_POWER6_EXT (1U << 9)
184 #define HWCAP_VSX (1U << 7)
186 #define HWCAP2 26 /* AT_HWCAP2 */
187 #define HWCAP_VEC_CRYPTO (1U << 25)
188 #define HWCAP_ARCH_3_00 (1U << 23)
190 # if defined(__GNUC__) && __GNUC__>=2
191 __attribute__ ((constructor))
193 void OPENSSL_cpuid_setup(void)
196 struct sigaction ill_oact, ill_act;
198 static int trigger = 0;
204 if ((e = getenv("OPENSSL_ppccap"))) {
205 OPENSSL_ppccap_P = strtoul(e, NULL, 0);
209 OPENSSL_ppccap_P = 0;
212 OPENSSL_ppccap_P |= PPC_FPU;
214 if (sizeof(size_t) == 4) {
216 # if defined(_SC_AIX_KERNEL_BITMODE)
217 if (sysconf(_SC_AIX_KERNEL_BITMODE) != 64)
220 if (uname(&uts) != 0 || atoi(uts.version) < 6)
224 # if defined(__power_set)
226 * Value used in __power_set is a single-bit 1<<n one denoting
227 * specific processor class. Incidentally 0xffffffff<<n can be
228 * used to denote specific processor and its successors.
230 if (sizeof(size_t) == 4) {
231 /* In 32-bit case PPC_FPU64 is always fastest [if option] */
232 if (__power_set(0xffffffffU<<13)) /* POWER5 and later */
233 OPENSSL_ppccap_P |= PPC_FPU64;
235 /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
236 if (__power_set(0x1U<<14)) /* POWER6 */
237 OPENSSL_ppccap_P |= PPC_FPU64;
240 if (__power_set(0xffffffffU<<14)) /* POWER6 and later */
241 OPENSSL_ppccap_P |= PPC_ALTIVEC;
243 if (__power_set(0xffffffffU<<16)) /* POWER8 and later */
244 OPENSSL_ppccap_P |= PPC_CRYPTO207;
246 if (__power_set(0xffffffffU<<17)) /* POWER9 and later */
247 OPENSSL_ppccap_P |= PPC_MADD300;
253 #if defined(__APPLE__) && defined(__MACH__)
254 OPENSSL_ppccap_P |= PPC_FPU;
258 size_t len = sizeof(val);
260 if (sysctlbyname("hw.optional.64bitops", &val, &len, NULL, 0) == 0) {
262 OPENSSL_ppccap_P |= PPC_FPU64;
266 if (sysctlbyname("hw.optional.altivec", &val, &len, NULL, 0) == 0) {
268 OPENSSL_ppccap_P |= PPC_ALTIVEC;
275 #ifdef OSSL_IMPLEMENT_GETAUXVAL
277 unsigned long hwcap = getauxval(HWCAP);
279 if (hwcap & HWCAP_FPU) {
280 OPENSSL_ppccap_P |= PPC_FPU;
282 if (sizeof(size_t) == 4) {
283 /* In 32-bit case PPC_FPU64 is always fastest [if option] */
284 if (hwcap & HWCAP_PPC64)
285 OPENSSL_ppccap_P |= PPC_FPU64;
287 /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
288 if (hwcap & HWCAP_POWER6_EXT)
289 OPENSSL_ppccap_P |= PPC_FPU64;
293 if (hwcap & HWCAP_ALTIVEC) {
294 OPENSSL_ppccap_P |= PPC_ALTIVEC;
296 if ((hwcap & HWCAP_VSX) && (getauxval(HWCAP2) & HWCAP_VEC_CRYPTO))
297 OPENSSL_ppccap_P |= PPC_CRYPTO207;
300 if (hwcap & HWCAP_ARCH_3_00) {
301 OPENSSL_ppccap_P |= PPC_MADD300;
308 sigfillset(&all_masked);
309 sigdelset(&all_masked, SIGILL);
310 sigdelset(&all_masked, SIGTRAP);
312 sigdelset(&all_masked, SIGEMT);
314 sigdelset(&all_masked, SIGFPE);
315 sigdelset(&all_masked, SIGBUS);
316 sigdelset(&all_masked, SIGSEGV);
318 memset(&ill_act, 0, sizeof(ill_act));
319 ill_act.sa_handler = ill_handler;
320 ill_act.sa_mask = all_masked;
322 sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset);
323 sigaction(SIGILL, &ill_act, &ill_oact);
325 if (sigsetjmp(ill_jmp,1) == 0) {
327 OPENSSL_ppccap_P |= PPC_FPU;
329 if (sizeof(size_t) == 4) {
332 if (uname(&uts) == 0 && strcmp(uts.machine, "ppc64") == 0)
334 if (sigsetjmp(ill_jmp, 1) == 0) {
335 OPENSSL_ppc64_probe();
336 OPENSSL_ppccap_P |= PPC_FPU64;
340 * Wanted code detecting POWER6 CPU and setting PPC_FPU64
345 if (sigsetjmp(ill_jmp, 1) == 0) {
346 OPENSSL_altivec_probe();
347 OPENSSL_ppccap_P |= PPC_ALTIVEC;
348 if (sigsetjmp(ill_jmp, 1) == 0) {
349 OPENSSL_crypto207_probe();
350 OPENSSL_ppccap_P |= PPC_CRYPTO207;
354 if (sigsetjmp(ill_jmp, 1) == 0) {
355 OPENSSL_madd300_probe();
356 OPENSSL_ppccap_P |= PPC_MADD300;
359 sigaction(SIGILL, &ill_oact, NULL);
360 sigprocmask(SIG_SETMASK, &oset, NULL);