7 #if defined(__linux) || defined(_AIX)
8 # include <sys/utsname.h>
10 #if defined(_AIX53) /* defined even on post-5.3 */
11 # include <sys/systemcfg.h>
12 # if !defined(__power_set)
13 # define __power_set(a) (_system_configuration.implementation & (a))
16 #include <openssl/crypto.h>
17 #include <openssl/bn.h>
21 unsigned int OPENSSL_ppccap_P = 0;
23 static sigset_t all_masked;
25 #ifdef OPENSSL_BN_ASM_MONT
26 int bn_mul_mont(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
27 const BN_ULONG *np, const BN_ULONG *n0, int num)
29 int bn_mul_mont_fpu64(BN_ULONG *rp, const BN_ULONG *ap,
30 const BN_ULONG *bp, const BN_ULONG *np,
31 const BN_ULONG *n0, int num);
32 int bn_mul_mont_int(BN_ULONG *rp, const BN_ULONG *ap, const BN_ULONG *bp,
33 const BN_ULONG *np, const BN_ULONG *n0, int num);
35 if (sizeof(size_t) == 4) {
36 # if 1 || (defined(__APPLE__) && defined(__MACH__))
37 if (num >= 8 && (num & 3) == 0 && (OPENSSL_ppccap_P & PPC_FPU64))
38 return bn_mul_mont_fpu64(rp, ap, bp, np, n0, num);
41 * boundary of 32 was experimentally determined on Linux 2.6.22,
42 * might have to be adjusted on AIX...
44 if (num >= 32 && (num & 3) == 0 && (OPENSSL_ppccap_P & PPC_FPU64)) {
48 sigprocmask(SIG_SETMASK, &all_masked, &oset);
49 ret = bn_mul_mont_fpu64(rp, ap, bp, np, n0, num);
50 sigprocmask(SIG_SETMASK, &oset, NULL);
55 } else if ((OPENSSL_ppccap_P & PPC_FPU64))
57 * this is a "must" on POWER6, but run-time detection is not
60 return bn_mul_mont_fpu64(rp, ap, bp, np, n0, num);
62 return bn_mul_mont_int(rp, ap, bp, np, n0, num);
66 void sha256_block_p8(void *ctx, const void *inp, size_t len);
67 void sha256_block_ppc(void *ctx, const void *inp, size_t len);
68 void sha256_block_data_order(void *ctx, const void *inp, size_t len)
70 OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha256_block_p8(ctx, inp, len) :
71 sha256_block_ppc(ctx, inp, len);
74 void sha512_block_p8(void *ctx, const void *inp, size_t len);
75 void sha512_block_ppc(void *ctx, const void *inp, size_t len);
76 void sha512_block_data_order(void *ctx, const void *inp, size_t len)
78 OPENSSL_ppccap_P & PPC_CRYPTO207 ? sha512_block_p8(ctx, inp, len) :
79 sha512_block_ppc(ctx, inp, len);
82 void ChaCha20_ctr32_int(unsigned char *out, const unsigned char *inp,
83 size_t len, const unsigned int key[8],
84 const unsigned int counter[4]);
85 void ChaCha20_ctr32_vmx(unsigned char *out, const unsigned char *inp,
86 size_t len, const unsigned int key[8],
87 const unsigned int counter[4]);
88 void ChaCha20_ctr32(unsigned char *out, const unsigned char *inp,
89 size_t len, const unsigned int key[8],
90 const unsigned int counter[4])
92 OPENSSL_ppccap_P & PPC_ALTIVEC
93 ? ChaCha20_ctr32_vmx(out, inp, len, key, counter)
94 : ChaCha20_ctr32_int(out, inp, len, key, counter);
97 void poly1305_init_int(void *ctx, const unsigned char key[16]);
98 void poly1305_blocks(void *ctx, const unsigned char *inp, size_t len,
100 void poly1305_emit(void *ctx, unsigned char mac[16],
101 const unsigned int nonce[4]);
102 void poly1305_init_fpu(void *ctx, const unsigned char key[16]);
103 void poly1305_blocks_fpu(void *ctx, const unsigned char *inp, size_t len,
104 unsigned int padbit);
105 void poly1305_emit_fpu(void *ctx, unsigned char mac[16],
106 const unsigned int nonce[4]);
107 int poly1305_init(void *ctx, const unsigned char key[16], void *func[2])
109 if (sizeof(size_t) == 4 && (OPENSSL_ppccap_P & PPC_FPU)) {
110 poly1305_init_fpu(ctx,key);
111 func[0] = poly1305_blocks_fpu;
112 func[1] = poly1305_emit_fpu;
114 poly1305_init_int(ctx,key);
115 func[0] = poly1305_blocks;
116 func[1] = poly1305_emit;
121 static sigjmp_buf ill_jmp;
122 static void ill_handler(int sig)
124 siglongjmp(ill_jmp, sig);
127 void OPENSSL_fpu_probe(void);
128 void OPENSSL_ppc64_probe(void);
129 void OPENSSL_altivec_probe(void);
130 void OPENSSL_crypto207_probe(void);
133 * Use a weak reference to getauxval() so we can use it if it is available
134 * but don't break the build if it is not. Note that this is *link-time*
135 * feature detection, not *run-time*. In other words if we link with
136 * symbol present, it's expected to be present even at run-time.
138 #if defined(__GNUC__) && __GNUC__>=2 && defined(__ELF__)
139 extern unsigned long getauxval(unsigned long type) __attribute__ ((weak));
141 static unsigned long (*getauxval) (unsigned long) = NULL;
144 /* I wish <sys/auxv.h> was universally available */
145 #define HWCAP 16 /* AT_HWCAP */
146 #define HWCAP_PPC64 (1U << 30)
147 #define HWCAP_ALTIVEC (1U << 28)
148 #define HWCAP_FPU (1U << 27)
149 #define HWCAP_POWER6_EXT (1U << 9)
150 #define HWCAP_VSX (1U << 7)
152 #define HWCAP2 26 /* AT_HWCAP2 */
153 #define HWCAP_VEC_CRYPTO (1U << 25)
155 # if defined(__GNUC__) && __GNUC__>=2
156 __attribute__ ((constructor))
158 void OPENSSL_cpuid_setup(void)
161 struct sigaction ill_oact, ill_act;
163 static int trigger = 0;
169 if ((e = getenv("OPENSSL_ppccap"))) {
170 OPENSSL_ppccap_P = strtoul(e, NULL, 0);
174 OPENSSL_ppccap_P = 0;
177 OPENSSL_ppccap_P |= PPC_FPU;
179 if (sizeof(size_t) == 4) {
181 # if defined(_SC_AIX_KERNEL_BITMODE)
182 if (sysconf(_SC_AIX_KERNEL_BITMODE) != 64)
185 if (uname(&uts) != 0 || atoi(uts.version) < 6)
189 # if defined(__power_set)
191 * Value used in __power_set is a single-bit 1<<n one denoting
192 * specific processor class. Incidentally 0xffffffff<<n can be
193 * used to denote specific processor and its successors.
195 if (sizeof(size_t) == 4) {
196 /* In 32-bit case PPC_FPU64 is always fastest [if option] */
197 if (__power_set(0xffffffffU<<13)) /* POWER5 and later */
198 OPENSSL_ppccap_P |= PPC_FPU64;
200 /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
201 if (__power_set(0x1U<<14)) /* POWER6 */
202 OPENSSL_ppccap_P |= PPC_FPU64;
205 if (__power_set(0xffffffffU<<14)) /* POWER6 and later */
206 OPENSSL_ppccap_P |= PPC_ALTIVEC;
208 if (__power_set(0xffffffffU<<16)) /* POWER8 and later */
209 OPENSSL_ppccap_P |= PPC_CRYPTO207;
215 if (getauxval != NULL) {
216 unsigned long hwcap = getauxval(HWCAP);
218 if (hwcap & HWCAP_FPU) {
219 OPENSSL_ppccap_P |= PPC_FPU;
221 if (sizeof(size_t) == 4) {
222 /* In 32-bit case PPC_FPU64 is always fastest [if option] */
223 if (hwcap & HWCAP_PPC64)
224 OPENSSL_ppccap_P |= PPC_FPU64;
226 /* In 64-bit case PPC_FPU64 is fastest only on POWER6 */
227 if (hwcap & HWCAP_POWER6_EXT)
228 OPENSSL_ppccap_P |= PPC_FPU64;
232 if (hwcap & HWCAP_ALTIVEC) {
233 OPENSSL_ppccap_P |= PPC_ALTIVEC;
235 if ((hwcap & HWCAP_VSX) && (getauxval(HWCAP2) & HWCAP_VEC_CRYPTO))
236 OPENSSL_ppccap_P |= PPC_CRYPTO207;
242 sigfillset(&all_masked);
243 sigdelset(&all_masked, SIGILL);
244 sigdelset(&all_masked, SIGTRAP);
246 sigdelset(&all_masked, SIGEMT);
248 sigdelset(&all_masked, SIGFPE);
249 sigdelset(&all_masked, SIGBUS);
250 sigdelset(&all_masked, SIGSEGV);
252 memset(&ill_act, 0, sizeof(ill_act));
253 ill_act.sa_handler = ill_handler;
254 ill_act.sa_mask = all_masked;
256 sigprocmask(SIG_SETMASK, &ill_act.sa_mask, &oset);
257 sigaction(SIGILL, &ill_act, &ill_oact);
259 if (sigsetjmp(ill_jmp,1) == 0) {
261 OPENSSL_ppccap_P |= PPC_FPU;
263 if (sizeof(size_t) == 4) {
266 if (uname(&uts) == 0 && strcmp(uts.machine, "ppc64") == 0)
268 if (sigsetjmp(ill_jmp, 1) == 0) {
269 OPENSSL_ppc64_probe();
270 OPENSSL_ppccap_P |= PPC_FPU64;
274 * Wanted code detecting POWER6 CPU and setting PPC_FPU64
279 if (sigsetjmp(ill_jmp, 1) == 0) {
280 OPENSSL_altivec_probe();
281 OPENSSL_ppccap_P |= PPC_ALTIVEC;
282 if (sigsetjmp(ill_jmp, 1) == 0) {
283 OPENSSL_crypto207_probe();
284 OPENSSL_ppccap_P |= PPC_CRYPTO207;
288 sigaction(SIGILL, &ill_oact, NULL);
289 sigprocmask(SIG_SETMASK, &oset, NULL);