3 # ====================================================================
4 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
5 # project. The module is, however, dual licensed under OpenSSL and
6 # CRYPTOGAMS licenses depending on where you obtain it. For further
7 # details see http://www.openssl.org/~appro/cryptogams/.
8 # ====================================================================
10 # GHASH for ARMv8 Crypto Extension, 64-bit polynomial multiplication.
14 # Initial version was developed in tight cooperation with Ard
15 # Biesheuvel <ard.biesheuvel@linaro.org> from bits-n-pieces from
16 # other assembly modules. Just like aesv8-armx.pl this module
17 # supports both AArch32 and AArch64 execution modes.
19 # Current performance in cycles per processed byte:
21 # PMULL[2] 32-bit NEON(*)
23 # Cortex-A53 1.45 8.39
24 # Cortex-A57 2.22 7.61
26 # (*) presented for reference/comparison purposes;
31 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
32 ( $xlate="${dir}arm-xlate.pl" and -f $xlate ) or
33 ( $xlate="${dir}../../perlasm/arm-xlate.pl" and -f $xlate) or
34 die "can't locate arm-xlate.pl";
36 open OUT,"| \"$^X\" $xlate $flavour $output";
39 $Xi="x0"; # argument block
47 my ($Xl,$Xm,$Xh,$IN)=map("q$_",(0..3));
48 my ($t0,$t1,$t2,$t3,$H,$Hhl)=map("q$_",(8..14));
55 $code.=".arch armv8-a+crypto\n" if ($flavour =~ /64/);
56 $code.=".fpu neon\n.code 32\n" if ($flavour !~ /64/);
60 .type gcm_init_v8,%function
63 vld1.64 {$t1},[x1] @ load H
68 vext.8 $t0,$t2,$t0,#8 @ t0=0xc2....01
71 vshr.s32 $t1,$t1,#31 @ broadcast carry bit
76 vorr $IN,$IN,$t3 @ H<<<=1
77 veor $IN,$IN,$t0 @ twisted H
81 .size gcm_init_v8,.-gcm_init_v8
84 .type gcm_gmult_v8,%function
87 vld1.64 {$t1},[$Xi] @ load Xi
89 vld1.64 {$H},[$Htbl] @ load twisted H
98 veor $Hhl,$Hhl,$H @ Karatsuba pre-processing
101 .size gcm_gmult_v8,.-gcm_gmult_v8
104 .type gcm_ghash_v8,%function
107 vld1.64 {$Xl},[$Xi] @ load [rotated] Xi
111 vld1.64 {$H},[$Htbl] @ load twisted H
113 vext.8 $Xl,$Xl,$Xl,#8
115 vld1.64 {$t1},[$inp],$inc @ load [rotated] inp
121 veor $Hhl,$Hhl,$H @ Karatsuba pre-processing
122 vext.8 $IN,$t1,$t1,#8
127 vext.8 $t2,$Xl,$Xl,#8
128 veor $IN,$IN,$Xl @ inp^=Xi
129 veor $t1,$t1,$t2 @ $t1 is rotated inp^Xi
132 vpmull.p64 $Xl,$H,$IN @ H.lo·Xi.lo
133 veor $t1,$t1,$IN @ Karatsuba pre-processing
134 vpmull2.p64 $Xh,$H,$IN @ H.hi·Xi.hi
136 vpmull.p64 $Xm,$Hhl,$t1 @ (H.lo+H.hi)·(Xi.lo+Xi.hi)
139 vext.8 $t1,$Xl,$Xh,#8 @ Karatsuba post-processing
142 vld1.64 {$t1},[$inp],$inc @ load [rotated] inp
144 vpmull.p64 $t2,$Xl,$t3 @ 1st phase
146 vmov $Xh#lo,$Xm#hi @ Xh|Xm - 256-bit result
147 vmov $Xm#hi,$Xl#lo @ Xm is rotated Xl
152 vext.8 $IN,$t1,$t1,#8
154 vext.8 $t2,$Xl,$Xl,#8 @ 2nd phase
155 vpmull.p64 $Xl,$Xl,$t3
163 vext.8 $Xl,$Xl,$Xl,#8
164 vst1.64 {$Xl},[$Xi] @ write out Xi
167 .size gcm_ghash_v8,.-gcm_ghash_v8
171 .asciz "GHASH for ARMv8, CRYPTOGAMS by <appro\@openssl.org>"
175 if ($flavour =~ /64/) { ######## 64-bit code
179 $arg =~ m/q([0-9]+)#(lo|hi),\s*q([0-9]+)#(lo|hi)/o &&
180 sprintf "ins v%d.d[%d],v%d.d[%d]",$1,($2 eq "lo")?0:1,$3,($4 eq "lo")?0:1;
182 foreach(split("\n",$code)) {
183 s/cclr\s+([wx])([^,]+),\s*([a-z]+)/csel $1$2,$1zr,$1$2,$3/o or
184 s/vmov\.i8/movi/o or # fix up legacy mnemonics
185 s/vmov\s+(.*)/unvmov($1)/geo or
187 s/vshr\.s/sshr\.s/o or
189 s/^(\s+)v/$1/o or # strip off v prefix
192 s/\bq([0-9]+)\b/"v".($1<8?$1:$1+8).".16b"/geo; # old->new registers
193 s/@\s/\/\//o; # old->new style commentary
195 # fix up remainig legacy suffixes
197 s/\.[uis]?32//o and s/\.16b/\.4s/go;
198 m/\.p64/o and s/\.16b/\.1q/o; # 1st pmull argument
199 m/l\.p64/o and s/\.16b/\.1d/go; # 2nd and 3rd pmull arguments
200 s/\.[uisp]?64//o and s/\.16b/\.2d/go;
201 s/\.[42]([sd])\[([0-3])\]/\.$1\[$2\]/o;
205 } else { ######## 32-bit code
209 $arg =~ m/q([0-9]+),\s*q([0-9]+)\[([0-3])\]/o &&
210 sprintf "vdup.32 q%d,d%d[%d]",$1,2*$2+($3>>1),$3&1;
213 my ($mnemonic,$arg)=@_;
215 if ($arg =~ m/q([0-9]+),\s*q([0-9]+),\s*q([0-9]+)/o) {
216 my $word = 0xf2a00e00|(($1&7)<<13)|(($1&8)<<19)
217 |(($2&7)<<17)|(($2&8)<<4)
218 |(($3&7)<<1) |(($3&8)<<2);
219 $word |= 0x00010001 if ($mnemonic =~ "2");
220 # since ARMv7 instructions are always encoded little-endian.
221 # correct solution is to use .inst directive, but older
222 # assemblers don't implement it:-(
223 sprintf ".byte\t0x%02x,0x%02x,0x%02x,0x%02x\t@ %s %s",
224 $word&0xff,($word>>8)&0xff,
225 ($word>>16)&0xff,($word>>24)&0xff,
230 foreach(split("\n",$code)) {
231 s/\b[wx]([0-9]+)\b/r$1/go; # new->old registers
232 s/\bv([0-9])\.[12468]+[bsd]\b/q$1/go; # new->old registers
233 s/\/\/\s?/@ /o; # new->old style commentary
235 # fix up remainig new-style suffixes
238 s/cclr\s+([^,]+),\s*([a-z]+)/mov$2 $1,#0/o or
239 s/vdup\.32\s+(.*)/unvdup32($1)/geo or
240 s/v?(pmull2?)\.p64\s+(.*)/unvpmullp64($1,$2)/geo or
241 s/\bq([0-9]+)#(lo|hi)/sprintf "d%d",2*$1+($2 eq "hi")/geo or
243 s/^(\s+)ret/$1bx\tlr/o;
249 close STDOUT; # enforce flush