ghash-x86_64.pl: optimize for upcoming Atom.
[oweals/openssl.git] / crypto / modes / asm / ghash-x86_64.pl
1 #!/usr/bin/env perl
2 #
3 # ====================================================================
4 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
5 # project. The module is, however, dual licensed under OpenSSL and
6 # CRYPTOGAMS licenses depending on where you obtain it. For further
7 # details see http://www.openssl.org/~appro/cryptogams/.
8 # ====================================================================
9 #
10 # March, June 2010
11 #
12 # The module implements "4-bit" GCM GHASH function and underlying
13 # single multiplication operation in GF(2^128). "4-bit" means that
14 # it uses 256 bytes per-key table [+128 bytes shared table]. GHASH
15 # function features so called "528B" variant utilizing additional
16 # 256+16 bytes of per-key storage [+512 bytes shared table].
17 # Performance results are for this streamed GHASH subroutine and are
18 # expressed in cycles per processed byte, less is better:
19 #
20 #               gcc 3.4.x(*)    assembler
21 #
22 # P4            28.6            14.0            +100%
23 # Opteron       19.3            7.7             +150%
24 # Core2         17.8            8.1(**)         +120%
25 # Atom          31.6            16.8            +88%
26 # VIA Nano      21.8            10.1            +115%
27 #
28 # (*)   comparison is not completely fair, because C results are
29 #       for vanilla "256B" implementation, while assembler results
30 #       are for "528B";-)
31 # (**)  it's mystery [to me] why Core2 result is not same as for
32 #       Opteron;
33
34 # May 2010
35 #
36 # Add PCLMULQDQ version performing at 2.02 cycles per processed byte.
37 # See ghash-x86.pl for background information and details about coding
38 # techniques.
39 #
40 # Special thanks to David Woodhouse <dwmw2@infradead.org> for
41 # providing access to a Westmere-based system on behalf of Intel
42 # Open Source Technology Centre.
43
44 # December 2012
45 #
46 # Overhaul: aggregate Karatsuba post-processing, improve ILP in
47 # reduction_alg9, increase reduction aggregate factor to 4x. As for
48 # the latter. ghash-x86.pl discusses that it makes lesser sense to
49 # increase aggregate factor. Then why increase here? Critical path
50 # consists of 3 independent pclmulqdq instructions, Karatsuba post-
51 # processing and reduction. "On top" of this we lay down aggregated
52 # multiplication operations, triplets of independent pclmulqdq's. As
53 # issue rate for pclmulqdq is limited, it makes lesser sense to
54 # aggregate more multiplications than it takes to perform remaining
55 # non-multiplication operations. 2x is near-optimal coefficient for
56 # contemporary Intel CPUs (therefore modest improvement coefficient),
57 # but not for Bulldozer. Latter is because logical SIMD operations
58 # are twice as slow in comparison to Intel, so that critical path is
59 # longer. A CPU with higher pclmulqdq issue rate would also benefit
60 # from higher aggregate factor...
61 #
62 # Westmere      1.78(+13%)
63 # Sandy Bridge  1.80(+8%)
64 # Ivy Bridge    1.80(+7%)
65 # Haswell       0.55(+93%) (if system doesn't support AVX)
66 # Bulldozer     1.49(+27%)
67
68 # March 2013
69 #
70 # ... 8x aggregate factor AVX code path is using reduction algorithm
71 # suggested by Shay Gueron[1]. Even though contemporary AVX-capable
72 # CPUs such as Sandy and Ivy Bridge can execute it, the code performs
73 # sub-optimally in comparison to above mentioned version. But thanks
74 # to Ilya Albrekht and Max Locktyukhin of Intel Corp. we knew that
75 # it performs in 0.41 cycles per byte on Haswell processor.
76 #
77 # [1] http://rt.openssl.org/Ticket/Display.html?id=2900&user=guest&pass=guest
78
79 $flavour = shift;
80 $output  = shift;
81 if ($flavour =~ /\./) { $output = $flavour; undef $flavour; }
82
83 $win64=0; $win64=1 if ($flavour =~ /[nm]asm|mingw64/ || $output =~ /\.asm$/);
84
85 $0 =~ m/(.*[\/\\])[^\/\\]+$/; $dir=$1;
86 ( $xlate="${dir}x86_64-xlate.pl" and -f $xlate ) or
87 ( $xlate="${dir}../../perlasm/x86_64-xlate.pl" and -f $xlate) or
88 die "can't locate x86_64-xlate.pl";
89
90 if (`$ENV{CC} -Wa,-v -c -o /dev/null -x assembler /dev/null 2>&1`
91                 =~ /GNU assembler version ([2-9]\.[0-9]+)/) {
92         $avx = ($1>=2.19) + ($1>=2.22);
93 }
94
95 if (!$avx && $win64 && ($flavour =~ /nasm/ || $ENV{ASM} =~ /nasm/) &&
96             `nasm -v 2>&1` =~ /NASM version ([2-9]\.[0-9]+)/) {
97         $avx = ($1>=2.09) + ($1>=2.10);
98 }
99
100 if (!$avx && $win64 && ($flavour =~ /masm/ || $ENV{ASM} =~ /ml64/) &&
101             `ml64 2>&1` =~ /Version ([0-9]+)\./) {
102         $avx = ($1>=10) + ($1>=11);
103 }
104
105 open OUT,"| \"$^X\" $xlate $flavour $output";
106 *STDOUT=*OUT;
107
108 $do4xaggr=1;
109
110 # common register layout
111 $nlo="%rax";
112 $nhi="%rbx";
113 $Zlo="%r8";
114 $Zhi="%r9";
115 $tmp="%r10";
116 $rem_4bit = "%r11";
117
118 $Xi="%rdi";
119 $Htbl="%rsi";
120
121 # per-function register layout
122 $cnt="%rcx";
123 $rem="%rdx";
124
125 sub LB() { my $r=shift; $r =~ s/%[er]([a-d])x/%\1l/     or
126                         $r =~ s/%[er]([sd]i)/%\1l/      or
127                         $r =~ s/%[er](bp)/%\1l/         or
128                         $r =~ s/%(r[0-9]+)[d]?/%\1b/;   $r; }
129
130 sub AUTOLOAD()          # thunk [simplified] 32-bit style perlasm
131 { my $opcode = $AUTOLOAD; $opcode =~ s/.*:://;
132   my $arg = pop;
133     $arg = "\$$arg" if ($arg*1 eq $arg);
134     $code .= "\t$opcode\t".join(',',$arg,reverse @_)."\n";
135 }
136 \f
137 { my $N;
138   sub loop() {
139   my $inp = shift;
140
141         $N++;
142 $code.=<<___;
143         xor     $nlo,$nlo
144         xor     $nhi,$nhi
145         mov     `&LB("$Zlo")`,`&LB("$nlo")`
146         mov     `&LB("$Zlo")`,`&LB("$nhi")`
147         shl     \$4,`&LB("$nlo")`
148         mov     \$14,$cnt
149         mov     8($Htbl,$nlo),$Zlo
150         mov     ($Htbl,$nlo),$Zhi
151         and     \$0xf0,`&LB("$nhi")`
152         mov     $Zlo,$rem
153         jmp     .Loop$N
154
155 .align  16
156 .Loop$N:
157         shr     \$4,$Zlo
158         and     \$0xf,$rem
159         mov     $Zhi,$tmp
160         mov     ($inp,$cnt),`&LB("$nlo")`
161         shr     \$4,$Zhi
162         xor     8($Htbl,$nhi),$Zlo
163         shl     \$60,$tmp
164         xor     ($Htbl,$nhi),$Zhi
165         mov     `&LB("$nlo")`,`&LB("$nhi")`
166         xor     ($rem_4bit,$rem,8),$Zhi
167         mov     $Zlo,$rem
168         shl     \$4,`&LB("$nlo")`
169         xor     $tmp,$Zlo
170         dec     $cnt
171         js      .Lbreak$N
172
173         shr     \$4,$Zlo
174         and     \$0xf,$rem
175         mov     $Zhi,$tmp
176         shr     \$4,$Zhi
177         xor     8($Htbl,$nlo),$Zlo
178         shl     \$60,$tmp
179         xor     ($Htbl,$nlo),$Zhi
180         and     \$0xf0,`&LB("$nhi")`
181         xor     ($rem_4bit,$rem,8),$Zhi
182         mov     $Zlo,$rem
183         xor     $tmp,$Zlo
184         jmp     .Loop$N
185
186 .align  16
187 .Lbreak$N:
188         shr     \$4,$Zlo
189         and     \$0xf,$rem
190         mov     $Zhi,$tmp
191         shr     \$4,$Zhi
192         xor     8($Htbl,$nlo),$Zlo
193         shl     \$60,$tmp
194         xor     ($Htbl,$nlo),$Zhi
195         and     \$0xf0,`&LB("$nhi")`
196         xor     ($rem_4bit,$rem,8),$Zhi
197         mov     $Zlo,$rem
198         xor     $tmp,$Zlo
199
200         shr     \$4,$Zlo
201         and     \$0xf,$rem
202         mov     $Zhi,$tmp
203         shr     \$4,$Zhi
204         xor     8($Htbl,$nhi),$Zlo
205         shl     \$60,$tmp
206         xor     ($Htbl,$nhi),$Zhi
207         xor     $tmp,$Zlo
208         xor     ($rem_4bit,$rem,8),$Zhi
209
210         bswap   $Zlo
211         bswap   $Zhi
212 ___
213 }}
214
215 $code=<<___;
216 .text
217 .extern OPENSSL_ia32cap_P
218
219 .globl  gcm_gmult_4bit
220 .type   gcm_gmult_4bit,\@function,2
221 .align  16
222 gcm_gmult_4bit:
223         push    %rbx
224         push    %rbp            # %rbp and %r12 are pushed exclusively in
225         push    %r12            # order to reuse Win64 exception handler...
226 .Lgmult_prologue:
227
228         movzb   15($Xi),$Zlo
229         lea     .Lrem_4bit(%rip),$rem_4bit
230 ___
231         &loop   ($Xi);
232 $code.=<<___;
233         mov     $Zlo,8($Xi)
234         mov     $Zhi,($Xi)
235
236         mov     16(%rsp),%rbx
237         lea     24(%rsp),%rsp
238 .Lgmult_epilogue:
239         ret
240 .size   gcm_gmult_4bit,.-gcm_gmult_4bit
241 ___
242 \f
243 # per-function register layout
244 $inp="%rdx";
245 $len="%rcx";
246 $rem_8bit=$rem_4bit;
247
248 $code.=<<___;
249 .globl  gcm_ghash_4bit
250 .type   gcm_ghash_4bit,\@function,4
251 .align  16
252 gcm_ghash_4bit:
253         push    %rbx
254         push    %rbp
255         push    %r12
256         push    %r13
257         push    %r14
258         push    %r15
259         sub     \$280,%rsp
260 .Lghash_prologue:
261         mov     $inp,%r14               # reassign couple of args
262         mov     $len,%r15
263 ___
264 { my $inp="%r14";
265   my $dat="%edx";
266   my $len="%r15";
267   my @nhi=("%ebx","%ecx");
268   my @rem=("%r12","%r13");
269   my $Hshr4="%rbp";
270
271         &sub    ($Htbl,-128);           # size optimization
272         &lea    ($Hshr4,"16+128(%rsp)");
273         { my @lo =($nlo,$nhi);
274           my @hi =($Zlo,$Zhi);
275
276           &xor  ($dat,$dat);
277           for ($i=0,$j=-2;$i<18;$i++,$j++) {
278             &mov        ("$j(%rsp)",&LB($dat))          if ($i>1);
279             &or         ($lo[0],$tmp)                   if ($i>1);
280             &mov        (&LB($dat),&LB($lo[1]))         if ($i>0 && $i<17);
281             &shr        ($lo[1],4)                      if ($i>0 && $i<17);
282             &mov        ($tmp,$hi[1])                   if ($i>0 && $i<17);
283             &shr        ($hi[1],4)                      if ($i>0 && $i<17);
284             &mov        ("8*$j($Hshr4)",$hi[0])         if ($i>1);
285             &mov        ($hi[0],"16*$i+0-128($Htbl)")   if ($i<16);
286             &shl        (&LB($dat),4)                   if ($i>0 && $i<17);
287             &mov        ("8*$j-128($Hshr4)",$lo[0])     if ($i>1);
288             &mov        ($lo[0],"16*$i+8-128($Htbl)")   if ($i<16);
289             &shl        ($tmp,60)                       if ($i>0 && $i<17);
290
291             push        (@lo,shift(@lo));
292             push        (@hi,shift(@hi));
293           }
294         }
295         &add    ($Htbl,-128);
296         &mov    ($Zlo,"8($Xi)");
297         &mov    ($Zhi,"0($Xi)");
298         &add    ($len,$inp);            # pointer to the end of data
299         &lea    ($rem_8bit,".Lrem_8bit(%rip)");
300         &jmp    (".Louter_loop");
301
302 $code.=".align  16\n.Louter_loop:\n";
303         &xor    ($Zhi,"($inp)");
304         &mov    ("%rdx","8($inp)");
305         &lea    ($inp,"16($inp)");
306         &xor    ("%rdx",$Zlo);
307         &mov    ("($Xi)",$Zhi);
308         &mov    ("8($Xi)","%rdx");
309         &shr    ("%rdx",32);
310
311         &xor    ($nlo,$nlo);
312         &rol    ($dat,8);
313         &mov    (&LB($nlo),&LB($dat));
314         &movz   ($nhi[0],&LB($dat));
315         &shl    (&LB($nlo),4);
316         &shr    ($nhi[0],4);
317
318         for ($j=11,$i=0;$i<15;$i++) {
319             &rol        ($dat,8);
320             &xor        ($Zlo,"8($Htbl,$nlo)")                  if ($i>0);
321             &xor        ($Zhi,"($Htbl,$nlo)")                   if ($i>0);
322             &mov        ($Zlo,"8($Htbl,$nlo)")                  if ($i==0);
323             &mov        ($Zhi,"($Htbl,$nlo)")                   if ($i==0);
324
325             &mov        (&LB($nlo),&LB($dat));
326             &xor        ($Zlo,$tmp)                             if ($i>0);
327             &movzw      ($rem[1],"($rem_8bit,$rem[1],2)")       if ($i>0);
328
329             &movz       ($nhi[1],&LB($dat));
330             &shl        (&LB($nlo),4);
331             &movzb      ($rem[0],"(%rsp,$nhi[0])");
332
333             &shr        ($nhi[1],4)                             if ($i<14);
334             &and        ($nhi[1],0xf0)                          if ($i==14);
335             &shl        ($rem[1],48)                            if ($i>0);
336             &xor        ($rem[0],$Zlo);
337
338             &mov        ($tmp,$Zhi);
339             &xor        ($Zhi,$rem[1])                          if ($i>0);
340             &shr        ($Zlo,8);
341
342             &movz       ($rem[0],&LB($rem[0]));
343             &mov        ($dat,"$j($Xi)")                        if (--$j%4==0);
344             &shr        ($Zhi,8);
345
346             &xor        ($Zlo,"-128($Hshr4,$nhi[0],8)");
347             &shl        ($tmp,56);
348             &xor        ($Zhi,"($Hshr4,$nhi[0],8)");
349
350             unshift     (@nhi,pop(@nhi));               # "rotate" registers
351             unshift     (@rem,pop(@rem));
352         }
353         &movzw  ($rem[1],"($rem_8bit,$rem[1],2)");
354         &xor    ($Zlo,"8($Htbl,$nlo)");
355         &xor    ($Zhi,"($Htbl,$nlo)");
356
357         &shl    ($rem[1],48);
358         &xor    ($Zlo,$tmp);
359
360         &xor    ($Zhi,$rem[1]);
361         &movz   ($rem[0],&LB($Zlo));
362         &shr    ($Zlo,4);
363
364         &mov    ($tmp,$Zhi);
365         &shl    (&LB($rem[0]),4);
366         &shr    ($Zhi,4);
367
368         &xor    ($Zlo,"8($Htbl,$nhi[0])");
369         &movzw  ($rem[0],"($rem_8bit,$rem[0],2)");
370         &shl    ($tmp,60);
371
372         &xor    ($Zhi,"($Htbl,$nhi[0])");
373         &xor    ($Zlo,$tmp);
374         &shl    ($rem[0],48);
375
376         &bswap  ($Zlo);
377         &xor    ($Zhi,$rem[0]);
378
379         &bswap  ($Zhi);
380         &cmp    ($inp,$len);
381         &jb     (".Louter_loop");
382 }
383 $code.=<<___;
384         mov     $Zlo,8($Xi)
385         mov     $Zhi,($Xi)
386
387         lea     280(%rsp),%rsi
388         mov     0(%rsi),%r15
389         mov     8(%rsi),%r14
390         mov     16(%rsi),%r13
391         mov     24(%rsi),%r12
392         mov     32(%rsi),%rbp
393         mov     40(%rsi),%rbx
394         lea     48(%rsi),%rsp
395 .Lghash_epilogue:
396         ret
397 .size   gcm_ghash_4bit,.-gcm_ghash_4bit
398 ___
399 \f
400 ######################################################################
401 # PCLMULQDQ version.
402
403 @_4args=$win64? ("%rcx","%rdx","%r8", "%r9") :  # Win64 order
404                 ("%rdi","%rsi","%rdx","%rcx");  # Unix order
405
406 ($Xi,$Xhi)=("%xmm0","%xmm1");   $Hkey="%xmm2";
407 ($T1,$T2,$T3)=("%xmm3","%xmm4","%xmm5");
408
409 sub clmul64x64_T2 {     # minimal register pressure
410 my ($Xhi,$Xi,$Hkey,$HK)=@_;
411
412 if (!defined($HK)) {    $HK = $T2;
413 $code.=<<___;
414         movdqa          $Xi,$Xhi                #
415         pshufd          \$0b01001110,$Xi,$T1
416         pshufd          \$0b01001110,$Hkey,$T2
417         pxor            $Xi,$T1                 #
418         pxor            $Hkey,$T2
419 ___
420 } else {
421 $code.=<<___;
422         movdqa          $Xi,$Xhi                #
423         pshufd          \$0b01001110,$Xi,$T1
424         pxor            $Xi,$T1                 #
425 ___
426 }
427 $code.=<<___;
428         pclmulqdq       \$0x00,$Hkey,$Xi        #######
429         pclmulqdq       \$0x11,$Hkey,$Xhi       #######
430         pclmulqdq       \$0x00,$HK,$T1          #######
431         pxor            $Xi,$T1                 #
432         pxor            $Xhi,$T1                #
433
434         movdqa          $T1,$T2                 #
435         psrldq          \$8,$T1
436         pslldq          \$8,$T2                 #
437         pxor            $T1,$Xhi
438         pxor            $T2,$Xi                 #
439 ___
440 }
441
442 sub reduction_alg9 {    # 17/11 times faster than Intel version
443 my ($Xhi,$Xi) = @_;
444
445 $code.=<<___;
446         # 1st phase
447         movdqa          $Xi,$T2                 #
448         movdqa          $Xi,$T1
449         psllq           \$5,$Xi
450         pxor            $Xi,$T1                 #
451         psllq           \$1,$Xi
452         pxor            $T1,$Xi                 #
453         psllq           \$57,$Xi                #
454         movdqa          $Xi,$T1                 #
455         pslldq          \$8,$Xi
456         psrldq          \$8,$T1                 #       
457         pxor            $T2,$Xi
458         pxor            $T1,$Xhi                #
459
460         # 2nd phase
461         movdqa          $Xi,$T2
462         psrlq           \$1,$Xi
463         pxor            $T2,$Xhi                #
464         pxor            $Xi,$T2
465         psrlq           \$5,$Xi
466         pxor            $T2,$Xi                 #
467         psrlq           \$1,$Xi                 #
468         pxor            $Xhi,$Xi                #
469 ___
470 }
471 \f
472 { my ($Htbl,$Xip)=@_4args;
473   my $HK="%xmm6";
474
475 $code.=<<___;
476 .globl  gcm_init_clmul
477 .type   gcm_init_clmul,\@abi-omnipotent
478 .align  16
479 gcm_init_clmul:
480 .L_init_clmul:
481 ___
482 $code.=<<___ if ($win64);
483 .LSEH_begin_gcm_init_clmul:
484         # I can't trust assembler to use specific encoding:-(
485         .byte   0x48,0x83,0xec,0x18             #sub    $0x18,%rsp
486         .byte   0x0f,0x29,0x34,0x24             #movaps %xmm6,(%rsp)
487 ___
488 $code.=<<___;
489         movdqu          ($Xip),$Hkey
490         pshufd          \$0b01001110,$Hkey,$Hkey        # dword swap
491
492         # <<1 twist
493         pshufd          \$0b11111111,$Hkey,$T2  # broadcast uppermost dword
494         movdqa          $Hkey,$T1
495         psllq           \$1,$Hkey
496         pxor            $T3,$T3                 #
497         psrlq           \$63,$T1
498         pcmpgtd         $T2,$T3                 # broadcast carry bit
499         pslldq          \$8,$T1
500         por             $T1,$Hkey               # H<<=1
501
502         # magic reduction
503         pand            .L0x1c2_polynomial(%rip),$T3
504         pxor            $T3,$Hkey               # if(carry) H^=0x1c2_polynomial
505
506         # calculate H^2
507         pshufd          \$0b01001110,$Hkey,$HK
508         movdqa          $Hkey,$Xi
509         pxor            $Hkey,$HK
510 ___
511         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$HK);
512         &reduction_alg9 ($Xhi,$Xi);
513 $code.=<<___;
514         pshufd          \$0b01001110,$Hkey,$T1
515         pshufd          \$0b01001110,$Xi,$T2
516         pxor            $Hkey,$T1               # Karatsuba pre-processing
517         movdqu          $Hkey,0x00($Htbl)       # save H
518         pxor            $Xi,$T2                 # Karatsuba pre-processing
519         movdqu          $Xi,0x10($Htbl)         # save H^2
520         palignr         \$8,$T1,$T2             # low part is H.lo^H.hi...
521         movdqu          $T2,0x20($Htbl)         # save Karatsuba "salt"
522 ___
523 if ($do4xaggr) {
524         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$HK);   # H^3
525         &reduction_alg9 ($Xhi,$Xi);
526 $code.=<<___;
527         movdqa          $Xi,$T3
528 ___
529         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$HK);   # H^4
530         &reduction_alg9 ($Xhi,$Xi);
531 $code.=<<___;
532         pshufd          \$0b01001110,$T3,$T1
533         pshufd          \$0b01001110,$Xi,$T2
534         pxor            $T3,$T1                 # Karatsuba pre-processing
535         movdqu          $T3,0x30($Htbl)         # save H^3
536         pxor            $Xi,$T2                 # Karatsuba pre-processing
537         movdqu          $Xi,0x40($Htbl)         # save H^4
538         palignr         \$8,$T1,$T2             # low part is H^3.lo^H^3.hi...
539         movdqu          $T2,0x50($Htbl)         # save Karatsuba "salt"
540 ___
541 }
542 $code.=<<___ if ($win64);
543         movaps  (%rsp),%xmm6
544         lea     0x18(%rsp),%rsp
545 .LSEH_end_gcm_init_clmul:
546 ___
547 $code.=<<___;
548         ret
549 .size   gcm_init_clmul,.-gcm_init_clmul
550 ___
551 }
552
553 { my ($Xip,$Htbl)=@_4args;
554
555 $code.=<<___;
556 .globl  gcm_gmult_clmul
557 .type   gcm_gmult_clmul,\@abi-omnipotent
558 .align  16
559 gcm_gmult_clmul:
560 .L_gmult_clmul:
561         movdqu          ($Xip),$Xi
562         movdqa          .Lbswap_mask(%rip),$T3
563         movdqu          ($Htbl),$Hkey
564         movdqu          0x20($Htbl),$T2
565         pshufb          $T3,$Xi
566 ___
567         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$T2);
568 $code.=<<___ if (0 || (&reduction_alg9($Xhi,$Xi)&&0));
569         # experimental alternative. special thing about is that there
570         # no dependency between the two multiplications... 
571         mov             \$`0xE1<<1`,%eax
572         mov             \$0xA040608020C0E000,%r10       # ((7..0)·0xE0)&0xff
573         mov             \$0x07,%r11d
574         movq            %rax,$T1
575         movq            %r10,$T2
576         movq            %r11,$T3                # borrow $T3
577         pand            $Xi,$T3
578         pshufb          $T3,$T2                 # ($Xi&7)·0xE0
579         movq            %rax,$T3
580         pclmulqdq       \$0x00,$Xi,$T1          # Â·(0xE1<<1)
581         pxor            $Xi,$T2
582         pslldq          \$15,$T2
583         paddd           $T2,$T2                 # <<(64+56+1)
584         pxor            $T2,$Xi
585         pclmulqdq       \$0x01,$T3,$Xi
586         movdqa          .Lbswap_mask(%rip),$T3  # reload $T3
587         psrldq          \$1,$T1
588         pxor            $T1,$Xhi
589         pslldq          \$7,$Xi
590         pxor            $Xhi,$Xi
591 ___
592 $code.=<<___;
593         pshufb          $T3,$Xi
594         movdqu          $Xi,($Xip)
595         ret
596 .size   gcm_gmult_clmul,.-gcm_gmult_clmul
597 ___
598 }
599 \f
600 { my ($Xip,$Htbl,$inp,$len)=@_4args;
601   my ($Xln,$Xmn,$Xhn,$Hkey2,$HK) = map("%xmm$_",(3..7));
602   my ($T1,$T2,$T3)=map("%xmm$_",(8..10));
603
604 $code.=<<___;
605 .globl  gcm_ghash_clmul
606 .type   gcm_ghash_clmul,\@abi-omnipotent
607 .align  32
608 gcm_ghash_clmul:
609 .L_ghash_clmul:
610 ___
611 $code.=<<___ if ($win64);
612         lea     -0x88(%rsp),%rax
613 .LSEH_begin_gcm_ghash_clmul:
614         # I can't trust assembler to use specific encoding:-(
615         .byte   0x48,0x8d,0x60,0xe0             #lea    -0x20(%rax),%rsp
616         .byte   0x0f,0x29,0x70,0xe0             #movaps %xmm6,-0x20(%rax)
617         .byte   0x0f,0x29,0x78,0xf0             #movaps %xmm7,-0x10(%rax)
618         .byte   0x44,0x0f,0x29,0x00             #movaps %xmm8,0(%rax)
619         .byte   0x44,0x0f,0x29,0x48,0x10        #movaps %xmm9,0x10(%rax)
620         .byte   0x44,0x0f,0x29,0x50,0x20        #movaps %xmm10,0x20(%rax)
621         .byte   0x44,0x0f,0x29,0x58,0x30        #movaps %xmm11,0x30(%rax)
622         .byte   0x44,0x0f,0x29,0x60,0x40        #movaps %xmm12,0x40(%rax)
623         .byte   0x44,0x0f,0x29,0x68,0x50        #movaps %xmm13,0x50(%rax)
624         .byte   0x44,0x0f,0x29,0x70,0x60        #movaps %xmm14,0x60(%rax)
625         .byte   0x44,0x0f,0x29,0x78,0x70        #movaps %xmm15,0x70(%rax)
626 ___
627 $code.=<<___;
628         movdqa          .Lbswap_mask(%rip),$T3
629
630         movdqu          ($Xip),$Xi
631         movdqu          ($Htbl),$Hkey
632         movdqu          0x20($Htbl),$HK
633         pshufb          $T3,$Xi
634
635         sub             \$0x10,$len
636         jz              .Lodd_tail
637
638         movdqu          0x10($Htbl),$Hkey2
639 ___
640 if ($do4xaggr) {
641 my ($Xl,$Xm,$Xh,$Hkey3,$Hkey4)=map("%xmm$_",(11..15));
642
643 $code.=<<___;
644         mov             OPENSSL_ia32cap_P+4(%rip),%eax
645         cmp             \$0x30,$len
646         jb              .Lskip4x
647
648         and             \$`1<<26|1<<22`,%eax    # isolate MOVBE+XSAVE
649         cmp             \$`1<<22`,%eax          # check for MOVBE without XSAVE
650         je              .Lskip4x
651
652         sub             \$0x30,$len
653         mov             \$0xA040608020C0E000,%rax       # ((7..0)·0xE0)&0xff
654         movdqu          0x30($Htbl),$Hkey3
655         movdqu          0x40($Htbl),$Hkey4
656
657         #######
658         # Xi+4 =[(H*Ii+3) + (H^2*Ii+2) + (H^3*Ii+1) + H^4*(Ii+Xi)] mod P
659         #
660         movdqu          0x30($inp),$Xln
661          movdqu         0x20($inp),$Xl
662         pshufb          $T3,$Xln
663          pshufb         $T3,$Xl
664         movdqa          $Xln,$Xhn
665         pshufd          \$0b01001110,$Xln,$Xmn
666         pxor            $Xln,$Xmn
667         pclmulqdq       \$0x00,$Hkey,$Xln
668         pclmulqdq       \$0x11,$Hkey,$Xhn
669         pclmulqdq       \$0x00,$HK,$Xmn
670
671         movdqa          $Xl,$Xh
672         pshufd          \$0b01001110,$Xl,$Xm
673         pxor            $Xl,$Xm
674         pclmulqdq       \$0x00,$Hkey2,$Xl
675         pclmulqdq       \$0x11,$Hkey2,$Xh
676         pclmulqdq       \$0x10,$HK,$Xm
677         xorps           $Xl,$Xln
678         xorps           $Xh,$Xhn
679         movups          0x50($Htbl),$HK
680         xorps           $Xm,$Xmn
681
682         movdqu          0x10($inp),$Xl
683          movdqu         0($inp),$T1
684         pshufb          $T3,$Xl
685          pshufb         $T3,$T1
686         movdqa          $Xl,$Xh
687         pshufd          \$0b01001110,$Xl,$Xm
688          pxor           $T1,$Xi
689         pxor            $Xl,$Xm
690         pclmulqdq       \$0x00,$Hkey3,$Xl
691          movdqa         $Xi,$Xhi
692          pshufd         \$0b01001110,$Xi,$T1
693          pxor           $Xi,$T1
694         pclmulqdq       \$0x11,$Hkey3,$Xh
695         pclmulqdq       \$0x00,$HK,$Xm
696         xorps           $Xl,$Xln
697         xorps           $Xh,$Xhn
698
699         lea     0x40($inp),$inp
700         sub     \$0x40,$len
701         jc      .Ltail4x
702
703         jmp     .Lmod4_loop
704 .align  32
705 .Lmod4_loop:
706         pclmulqdq       \$0x00,$Hkey4,$Xi
707         xorps           $Xm,$Xmn
708          movdqu         0x30($inp),$Xl
709          pshufb         $T3,$Xl
710         pclmulqdq       \$0x11,$Hkey4,$Xhi
711         xorps           $Xln,$Xi
712          movdqu         0x20($inp),$Xln
713          movdqa         $Xl,$Xh
714         pclmulqdq       \$0x10,$HK,$T1
715          pshufd         \$0b01001110,$Xl,$Xm
716         xorps           $Xhn,$Xhi
717          pxor           $Xl,$Xm
718          pshufb         $T3,$Xln
719         movups          0x20($Htbl),$HK
720         xorps           $Xmn,$T1
721          pclmulqdq      \$0x00,$Hkey,$Xl
722          pshufd         \$0b01001110,$Xln,$Xmn
723
724         pxor            $Xi,$T1                 # aggregated Karatsuba post-processing
725          movdqa         $Xln,$Xhn
726         pxor            $Xhi,$T1                #
727          pxor           $Xln,$Xmn
728         movdqa          $T1,$T2                 #
729          pclmulqdq      \$0x11,$Hkey,$Xh
730         pslldq          \$8,$T1
731         psrldq          \$8,$T2                 #
732         pxor            $T1,$Xi
733         movdqa          .L7_mask(%rip),$T1
734         pxor            $T2,$Xhi                #
735         movq            %rax,$T2
736
737         pand            $Xi,$T1                 # 1st phase
738         pshufb          $T1,$T2                 #
739         pxor            $Xi,$T2                 #
740          pclmulqdq      \$0x00,$HK,$Xm
741         psllq           \$57,$T2                #
742         movdqa          $T2,$T1                 #
743         pslldq          \$8,$T2
744          pclmulqdq      \$0x00,$Hkey2,$Xln
745         psrldq          \$8,$T1                 #       
746         pxor            $T2,$Xi
747         pxor            $T1,$Xhi                #
748         movdqu          0($inp),$T1
749
750         movdqa          $Xi,$T2                 # 2nd phase
751         psrlq           \$1,$Xi
752          pclmulqdq      \$0x11,$Hkey2,$Xhn
753          xorps          $Xl,$Xln
754          movdqu         0x10($inp),$Xl
755          pshufb         $T3,$Xl
756          pclmulqdq      \$0x10,$HK,$Xmn
757          xorps          $Xh,$Xhn
758          movups         0x50($Htbl),$HK
759         pshufb          $T3,$T1
760         pxor            $T2,$Xhi                #
761         pxor            $Xi,$T2
762         psrlq           \$5,$Xi
763
764          movdqa         $Xl,$Xh
765          pxor           $Xm,$Xmn
766          pshufd         \$0b01001110,$Xl,$Xm
767         pxor            $T2,$Xi                 #
768         pxor            $T1,$Xhi
769          pxor           $Xl,$Xm
770          pclmulqdq      \$0x00,$Hkey3,$Xl
771         psrlq           \$1,$Xi                 #
772         pxor            $Xhi,$Xi                #
773         movdqa          $Xi,$Xhi
774          pclmulqdq      \$0x11,$Hkey3,$Xh
775          xorps          $Xl,$Xln
776         pshufd          \$0b01001110,$Xi,$T1
777         pxor            $Xi,$T1
778
779          pclmulqdq      \$0x00,$HK,$Xm
780          xorps          $Xh,$Xhn
781
782         lea     0x40($inp),$inp
783         sub     \$0x40,$len
784         jnc     .Lmod4_loop
785
786 .Ltail4x:
787         pclmulqdq       \$0x00,$Hkey4,$Xi
788         pclmulqdq       \$0x11,$Hkey4,$Xhi
789         pclmulqdq       \$0x10,$HK,$T1
790         xorps           $Xm,$Xmn
791         xorps           $Xln,$Xi
792         xorps           $Xhn,$Xhi
793         pxor            $Xi,$Xhi                # aggregated Karatsuba post-processing
794         pxor            $Xmn,$T1
795
796         pxor            $Xhi,$T1                #
797         pxor            $Xi,$Xhi
798
799         movdqa          $T1,$T2                 #
800         psrldq          \$8,$T1
801         pslldq          \$8,$T2                 #
802         pxor            $T1,$Xhi
803         pxor            $T2,$Xi                 #
804 ___
805         &reduction_alg9($Xhi,$Xi);
806 $code.=<<___;
807         add     \$0x40,$len
808         jz      .Ldone
809         movdqu  0x20($Htbl),$HK
810         sub     \$0x10,$len
811         jz      .Lodd_tail
812 .Lskip4x:
813 ___
814 }
815 $code.=<<___;
816         #######
817         # Xi+2 =[H*(Ii+1 + Xi+1)] mod P =
818         #       [(H*Ii+1) + (H*Xi+1)] mod P =
819         #       [(H*Ii+1) + H^2*(Ii+Xi)] mod P
820         #
821         movdqu          ($inp),$T1              # Ii
822         movdqu          16($inp),$Xln           # Ii+1
823         pshufb          $T3,$T1
824         pshufb          $T3,$Xln
825         pxor            $T1,$Xi                 # Ii+Xi
826
827         movdqa          $Xln,$Xhn
828         pshufd          \$0b01001110,$Xln,$Xmn
829         pxor            $Xln,$Xmn
830         pclmulqdq       \$0x00,$Hkey,$Xln
831         pclmulqdq       \$0x11,$Hkey,$Xhn
832         pclmulqdq       \$0x00,$HK,$Xmn
833
834         lea             32($inp),$inp           # i+=2
835         nop
836         sub             \$0x20,$len
837         jbe             .Leven_tail
838         nop
839         jmp             .Lmod_loop
840
841 .align  32
842 .Lmod_loop:
843         movdqa          $Xi,$Xhi
844         movdqa          $Xmn,$T1
845         pshufd          \$0b01001110,$Xi,$Xmn   #
846         pxor            $Xi,$Xmn                #
847
848         pclmulqdq       \$0x00,$Hkey2,$Xi
849         pclmulqdq       \$0x11,$Hkey2,$Xhi
850         pclmulqdq       \$0x10,$HK,$Xmn
851
852         pxor            $Xln,$Xi                # (H*Ii+1) + H^2*(Ii+Xi)
853         pxor            $Xhn,$Xhi
854           movdqu        ($inp),$T2              # Ii
855         pxor            $Xi,$T1                 # aggregated Karatsuba post-processing
856           pshufb        $T3,$T2
857           movdqu        16($inp),$Xln           # Ii+1
858
859         pxor            $Xhi,$T1
860           pxor          $T2,$Xhi                # "Ii+Xi", consume early
861         pxor            $T1,$Xmn
862          pshufb         $T3,$Xln
863         movdqa          $Xmn,$T1                #
864         psrldq          \$8,$T1
865         pslldq          \$8,$Xmn                #
866         pxor            $T1,$Xhi
867         pxor            $Xmn,$Xi                #
868
869         movdqa          $Xln,$Xhn               #
870
871           movdqa        $Xi,$T2                 # 1st phase
872           movdqa        $Xi,$T1
873           psllq         \$5,$Xi
874           pxor          $Xi,$T1                 #
875         pclmulqdq       \$0x00,$Hkey,$Xln       #######
876           psllq         \$1,$Xi
877           pxor          $T1,$Xi                 #
878           psllq         \$57,$Xi                #
879           movdqa        $Xi,$T1                 #
880           pslldq        \$8,$Xi
881           psrldq        \$8,$T1                 #       
882           pxor          $T2,$Xi
883         pshufd          \$0b01001110,$Xhn,$Xmn
884           pxor          $T1,$Xhi                #
885         pxor            $Xhn,$Xmn               #
886
887           movdqa        $Xi,$T2                 # 2nd phase
888           psrlq         \$1,$Xi
889         pclmulqdq       \$0x11,$Hkey,$Xhn       #######
890           pxor          $T2,$Xhi                #
891           pxor          $Xi,$T2
892           psrlq         \$5,$Xi
893           pxor          $T2,$Xi                 #
894         lea             32($inp),$inp
895           psrlq         \$1,$Xi                 #
896         pclmulqdq       \$0x00,$HK,$Xmn         #######
897           pxor          $Xhi,$Xi                #
898
899         sub             \$0x20,$len
900         ja              .Lmod_loop
901
902 .Leven_tail:
903          movdqa         $Xi,$Xhi
904          movdqa         $Xmn,$T1
905          pshufd         \$0b01001110,$Xi,$Xmn   #
906          pxor           $Xi,$Xmn                #
907
908         pclmulqdq       \$0x00,$Hkey2,$Xi
909         pclmulqdq       \$0x11,$Hkey2,$Xhi
910         pclmulqdq       \$0x10,$HK,$Xmn
911
912         pxor            $Xln,$Xi                # (H*Ii+1) + H^2*(Ii+Xi)
913         pxor            $Xhn,$Xhi
914         pxor            $Xi,$T1
915         pxor            $Xhi,$T1
916         pxor            $T1,$Xmn
917         movdqa          $Xmn,$T1                #
918         psrldq          \$8,$T1
919         pslldq          \$8,$Xmn                #
920         pxor            $T1,$Xhi
921         pxor            $Xmn,$Xi                #
922 ___
923         &reduction_alg9 ($Xhi,$Xi);
924 $code.=<<___;
925         test            $len,$len
926         jnz             .Ldone
927
928 .Lodd_tail:
929         movdqu          ($inp),$T1              # Ii
930         pshufb          $T3,$T1
931         pxor            $T1,$Xi                 # Ii+Xi
932 ___
933         &clmul64x64_T2  ($Xhi,$Xi,$Hkey,$HK);   # H*(Ii+Xi)
934         &reduction_alg9 ($Xhi,$Xi);
935 $code.=<<___;
936 .Ldone:
937         pshufb          $T3,$Xi
938         movdqu          $Xi,($Xip)
939 ___
940 $code.=<<___ if ($win64);
941         movaps  (%rsp),%xmm6
942         movaps  0x10(%rsp),%xmm7
943         movaps  0x20(%rsp),%xmm8
944         movaps  0x30(%rsp),%xmm9
945         movaps  0x40(%rsp),%xmm10
946         movaps  0x50(%rsp),%xmm11
947         movaps  0x60(%rsp),%xmm12
948         movaps  0x70(%rsp),%xmm13
949         movaps  0x80(%rsp),%xmm14
950         movaps  0x90(%rsp),%xmm15
951         lea     0xa8(%rsp),%rsp
952 .LSEH_end_gcm_ghash_clmul:
953 ___
954 $code.=<<___;
955         ret
956 .size   gcm_ghash_clmul,.-gcm_ghash_clmul
957 ___
958 }
959 \f
960 $code.=<<___;
961 .globl  gcm_init_avx
962 .type   gcm_init_avx,\@abi-omnipotent
963 .align  32
964 gcm_init_avx:
965 ___
966 if ($avx) {
967 my ($Htbl,$Xip)=@_4args;
968 my $HK="%xmm6";
969
970 $code.=<<___ if ($win64);
971 .LSEH_begin_gcm_init_avx:
972         # I can't trust assembler to use specific encoding:-(
973         .byte   0x48,0x83,0xec,0x18             #sub    $0x18,%rsp
974         .byte   0x0f,0x29,0x34,0x24             #movaps %xmm6,(%rsp)
975 ___
976 $code.=<<___;
977         vzeroupper
978
979         vmovdqu         ($Xip),$Hkey
980         vpshufd         \$0b01001110,$Hkey,$Hkey        # dword swap
981
982         # <<1 twist
983         vpshufd         \$0b11111111,$Hkey,$T2  # broadcast uppermost dword
984         vpsrlq          \$63,$Hkey,$T1
985         vpsllq          \$1,$Hkey,$Hkey
986         vpxor           $T3,$T3,$T3             #
987         vpcmpgtd        $T2,$T3,$T3             # broadcast carry bit
988         vpslldq         \$8,$T1,$T1
989         vpor            $T1,$Hkey,$Hkey         # H<<=1
990
991         # magic reduction
992         vpand           .L0x1c2_polynomial(%rip),$T3,$T3
993         vpxor           $T3,$Hkey,$Hkey         # if(carry) H^=0x1c2_polynomial
994
995         vpunpckhqdq     $Hkey,$Hkey,$HK
996         vmovdqa         $Hkey,$Xi
997         vpxor           $Hkey,$HK,$HK
998         mov             \$4,%r10                # up to H^8
999         jmp             .Linit_start_avx
1000 ___
1001
1002 sub clmul64x64_avx {
1003 my ($Xhi,$Xi,$Hkey,$HK)=@_;
1004
1005 if (!defined($HK)) {    $HK = $T2;
1006 $code.=<<___;
1007         vpunpckhqdq     $Xi,$Xi,$T1
1008         vpunpckhqdq     $Hkey,$Hkey,$T2
1009         vpxor           $Xi,$T1,$T1             #
1010         vpxor           $Hkey,$T2,$T2
1011 ___
1012 } else {
1013 $code.=<<___;
1014         vpunpckhqdq     $Xi,$Xi,$T1
1015         vpxor           $Xi,$T1,$T1             #
1016 ___
1017 }
1018 $code.=<<___;
1019         vpclmulqdq      \$0x11,$Hkey,$Xi,$Xhi   #######
1020         vpclmulqdq      \$0x00,$Hkey,$Xi,$Xi    #######
1021         vpclmulqdq      \$0x00,$HK,$T1,$T1      #######
1022         vpxor           $Xi,$Xhi,$T2            #
1023         vpxor           $T2,$T1,$T1             #
1024
1025         vpslldq         \$8,$T1,$T2             #
1026         vpsrldq         \$8,$T1,$T1
1027         vpxor           $T2,$Xi,$Xi             #
1028         vpxor           $T1,$Xhi,$Xhi
1029 ___
1030 }
1031
1032 sub reduction_avx {
1033 my ($Xhi,$Xi) = @_;
1034
1035 $code.=<<___;
1036         vpsllq          \$57,$Xi,$T1            # 1st phase
1037         vpsllq          \$62,$Xi,$T2
1038         vpxor           $T1,$T2,$T2             #
1039         vpsllq          \$63,$Xi,$T1
1040         vpxor           $T1,$T2,$T2             #
1041         vpslldq         \$8,$T2,$T1             #
1042         vpsrldq         \$8,$T2,$T2
1043         vpxor           $T1,$Xi,$Xi             #
1044         vpxor           $T2,$Xhi,$Xhi
1045
1046         vpsrlq          \$1,$Xi,$T2             # 2nd phase
1047         vpxor           $Xi,$Xhi,$Xhi
1048         vpxor           $T2,$Xi,$Xi             #
1049         vpsrlq          \$5,$T2,$T2
1050         vpxor           $T2,$Xi,$Xi             #
1051         vpsrlq          \$1,$Xi,$Xi             #
1052         vpxor           $Xhi,$Xi,$Xi            #
1053 ___
1054 }
1055
1056 $code.=<<___;
1057 .align  32
1058 .Linit_loop_avx:
1059         vpalignr        \$8,$T1,$T2,$T3         # low part is H.lo^H.hi...
1060         vmovdqu         $T3,-0x10($Htbl)        # save Karatsuba "salt"
1061 ___
1062         &clmul64x64_avx ($Xhi,$Xi,$Hkey,$HK);   # calculate H^3,5,7
1063         &reduction_avx  ($Xhi,$Xi);
1064 $code.=<<___;
1065 .Linit_start_avx:
1066         vmovdqa         $Xi,$T3
1067 ___
1068         &clmul64x64_avx ($Xhi,$Xi,$Hkey,$HK);   # calculate H^2,4,6,8
1069         &reduction_avx  ($Xhi,$Xi);
1070 $code.=<<___;
1071         vpshufd         \$0b01001110,$T3,$T1
1072         vpshufd         \$0b01001110,$Xi,$T2
1073         vpxor           $T3,$T1,$T1             # Karatsuba pre-processing
1074         vmovdqu         $T3,0x00($Htbl)         # save H^1,3,5,7
1075         vpxor           $Xi,$T2,$T2             # Karatsuba pre-processing
1076         vmovdqu         $Xi,0x10($Htbl)         # save H^2,4,6,8
1077         lea             0x30($Htbl),$Htbl
1078         sub             \$1,%r10
1079         jnz             .Linit_loop_avx
1080
1081         vpalignr        \$8,$T2,$T1,$T3         # last "salt" is flipped
1082         vmovdqu         $T3,-0x10($Htbl)
1083
1084         vzeroupper
1085 ___
1086 $code.=<<___ if ($win64);
1087         movaps  (%rsp),%xmm6
1088         lea     0x18(%rsp),%rsp
1089 .LSEH_end_gcm_init_avx:
1090 ___
1091 $code.=<<___;
1092         ret
1093 .size   gcm_init_avx,.-gcm_init_avx
1094 ___
1095 } else {
1096 $code.=<<___;
1097         jmp     .L_init_clmul
1098 .size   gcm_init_avx,.-gcm_init_avx
1099 ___
1100 }
1101
1102 $code.=<<___;
1103 .globl  gcm_gmult_avx
1104 .type   gcm_gmult_avx,\@abi-omnipotent
1105 .align  32
1106 gcm_gmult_avx:
1107         jmp     .L_gmult_clmul
1108 .size   gcm_gmult_avx,.-gcm_gmult_avx
1109 ___
1110 \f
1111 $code.=<<___;
1112 .globl  gcm_ghash_avx
1113 .type   gcm_ghash_avx,\@abi-omnipotent
1114 .align  32
1115 gcm_ghash_avx:
1116 ___
1117 if ($avx) {
1118 my ($Xip,$Htbl,$inp,$len)=@_4args;
1119 my ($Xlo,$Xhi,$Xmi,
1120     $Zlo,$Zhi,$Zmi,
1121     $Hkey,$HK,$T1,$T2,
1122     $Xi,$Xo,$Tred,$bswap,$Ii,$Ij) = map("%xmm$_",(0..15));
1123
1124 $code.=<<___ if ($win64);
1125         lea     -0x88(%rsp),%rax
1126 .LSEH_begin_gcm_ghash_avx:
1127         # I can't trust assembler to use specific encoding:-(
1128         .byte   0x48,0x8d,0x60,0xe0             #lea    -0x20(%rax),%rsp
1129         .byte   0x0f,0x29,0x70,0xe0             #movaps %xmm6,-0x20(%rax)
1130         .byte   0x0f,0x29,0x78,0xf0             #movaps %xmm7,-0x10(%rax)
1131         .byte   0x44,0x0f,0x29,0x00             #movaps %xmm8,0(%rax)
1132         .byte   0x44,0x0f,0x29,0x48,0x10        #movaps %xmm9,0x10(%rax)
1133         .byte   0x44,0x0f,0x29,0x50,0x20        #movaps %xmm10,0x20(%rax)
1134         .byte   0x44,0x0f,0x29,0x58,0x30        #movaps %xmm11,0x30(%rax)
1135         .byte   0x44,0x0f,0x29,0x60,0x40        #movaps %xmm12,0x40(%rax)
1136         .byte   0x44,0x0f,0x29,0x68,0x50        #movaps %xmm13,0x50(%rax)
1137         .byte   0x44,0x0f,0x29,0x70,0x60        #movaps %xmm14,0x60(%rax)
1138         .byte   0x44,0x0f,0x29,0x78,0x70        #movaps %xmm15,0x70(%rax)
1139 ___
1140 $code.=<<___;
1141         vzeroupper
1142
1143         vmovdqu         ($Xip),$Xi              # load $Xi
1144         lea             .L0x1c2_polynomial(%rip),%r10
1145         lea             0x40($Htbl),$Htbl       # size optimization
1146         vmovdqu         .Lbswap_mask(%rip),$bswap
1147         vpshufb         $bswap,$Xi,$Xi
1148         cmp             \$0x80,$len
1149         jb              .Lshort_avx
1150         sub             \$0x80,$len
1151
1152         vmovdqu         0x70($inp),$Ii          # I[7]
1153         vmovdqu         0x00-0x40($Htbl),$Hkey  # $Hkey^1
1154         vpshufb         $bswap,$Ii,$Ii
1155         vmovdqu         0x20-0x40($Htbl),$HK
1156
1157         vpunpckhqdq     $Ii,$Ii,$T2
1158          vmovdqu        0x60($inp),$Ij          # I[6]
1159         vpclmulqdq      \$0x00,$Hkey,$Ii,$Xlo
1160         vpxor           $Ii,$T2,$T2
1161          vpshufb        $bswap,$Ij,$Ij
1162         vpclmulqdq      \$0x11,$Hkey,$Ii,$Xhi
1163          vmovdqu        0x10-0x40($Htbl),$Hkey  # $Hkey^2
1164          vpunpckhqdq    $Ij,$Ij,$T1
1165          vmovdqu        0x50($inp),$Ii          # I[5]
1166         vpclmulqdq      \$0x00,$HK,$T2,$Xmi
1167          vpxor          $Ij,$T1,$T1
1168
1169          vpshufb        $bswap,$Ii,$Ii
1170         vpclmulqdq      \$0x00,$Hkey,$Ij,$Zlo
1171          vpunpckhqdq    $Ii,$Ii,$T2
1172         vpclmulqdq      \$0x11,$Hkey,$Ij,$Zhi
1173          vmovdqu        0x30-0x40($Htbl),$Hkey  # $Hkey^3
1174          vpxor          $Ii,$T2,$T2
1175          vmovdqu        0x40($inp),$Ij          # I[4]
1176         vpclmulqdq      \$0x10,$HK,$T1,$Zmi
1177          vmovdqu        0x50-0x40($Htbl),$HK
1178
1179          vpshufb        $bswap,$Ij,$Ij
1180         vpxor           $Xlo,$Zlo,$Zlo
1181         vpclmulqdq      \$0x00,$Hkey,$Ii,$Xlo
1182         vpxor           $Xhi,$Zhi,$Zhi
1183          vpunpckhqdq    $Ij,$Ij,$T1
1184         vpclmulqdq      \$0x11,$Hkey,$Ii,$Xhi
1185          vmovdqu        0x40-0x40($Htbl),$Hkey  # $Hkey^4
1186         vpxor           $Xmi,$Zmi,$Zmi
1187         vpclmulqdq      \$0x00,$HK,$T2,$Xmi
1188          vpxor          $Ij,$T1,$T1
1189
1190          vmovdqu        0x30($inp),$Ii          # I[3]
1191         vpxor           $Zlo,$Xlo,$Xlo
1192         vpclmulqdq      \$0x00,$Hkey,$Ij,$Zlo
1193         vpxor           $Zhi,$Xhi,$Xhi
1194          vpshufb        $bswap,$Ii,$Ii
1195         vpclmulqdq      \$0x11,$Hkey,$Ij,$Zhi
1196          vmovdqu        0x60-0x40($Htbl),$Hkey  # $Hkey^5
1197         vpxor           $Zmi,$Xmi,$Xmi
1198          vpunpckhqdq    $Ii,$Ii,$T2
1199         vpclmulqdq      \$0x10,$HK,$T1,$Zmi
1200          vmovdqu        0x80-0x40($Htbl),$HK
1201          vpxor          $Ii,$T2,$T2
1202
1203          vmovdqu        0x20($inp),$Ij          # I[2]
1204         vpxor           $Xlo,$Zlo,$Zlo
1205         vpclmulqdq      \$0x00,$Hkey,$Ii,$Xlo
1206         vpxor           $Xhi,$Zhi,$Zhi
1207          vpshufb        $bswap,$Ij,$Ij
1208         vpclmulqdq      \$0x11,$Hkey,$Ii,$Xhi
1209          vmovdqu        0x70-0x40($Htbl),$Hkey  # $Hkey^6
1210         vpxor           $Xmi,$Zmi,$Zmi
1211          vpunpckhqdq    $Ij,$Ij,$T1
1212         vpclmulqdq      \$0x00,$HK,$T2,$Xmi
1213          vpxor          $Ij,$T1,$T1
1214
1215          vmovdqu        0x10($inp),$Ii          # I[1]
1216         vpxor           $Zlo,$Xlo,$Xlo
1217         vpclmulqdq      \$0x00,$Hkey,$Ij,$Zlo
1218         vpxor           $Zhi,$Xhi,$Xhi
1219          vpshufb        $bswap,$Ii,$Ii
1220         vpclmulqdq      \$0x11,$Hkey,$Ij,$Zhi
1221          vmovdqu        0x90-0x40($Htbl),$Hkey  # $Hkey^7
1222         vpxor           $Zmi,$Xmi,$Xmi
1223          vpunpckhqdq    $Ii,$Ii,$T2
1224         vpclmulqdq      \$0x10,$HK,$T1,$Zmi
1225          vmovdqu        0xb0-0x40($Htbl),$HK
1226          vpxor          $Ii,$T2,$T2
1227
1228          vmovdqu        ($inp),$Ij              # I[0]
1229         vpxor           $Xlo,$Zlo,$Zlo
1230         vpclmulqdq      \$0x00,$Hkey,$Ii,$Xlo
1231         vpxor           $Xhi,$Zhi,$Zhi
1232          vpshufb        $bswap,$Ij,$Ij
1233         vpclmulqdq      \$0x11,$Hkey,$Ii,$Xhi
1234          vmovdqu        0xa0-0x40($Htbl),$Hkey  # $Hkey^8
1235         vpxor           $Xmi,$Zmi,$Zmi
1236         vpclmulqdq      \$0x10,$HK,$T2,$Xmi
1237
1238         lea             0x80($inp),$inp
1239         cmp             \$0x80,$len
1240         jb              .Ltail_avx
1241
1242         vpxor           $Xi,$Ij,$Ij             # accumulate $Xi
1243         sub             \$0x80,$len
1244         jmp             .Loop8x_avx
1245
1246 .align  32
1247 .Loop8x_avx:
1248         vpunpckhqdq     $Ij,$Ij,$T1
1249          vmovdqu        0x70($inp),$Ii          # I[7]
1250         vpxor           $Xlo,$Zlo,$Zlo
1251         vpxor           $Ij,$T1,$T1
1252         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xi
1253          vpshufb        $bswap,$Ii,$Ii
1254         vpxor           $Xhi,$Zhi,$Zhi
1255         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xo
1256          vmovdqu        0x00-0x40($Htbl),$Hkey  # $Hkey^1
1257          vpunpckhqdq    $Ii,$Ii,$T2
1258         vpxor           $Xmi,$Zmi,$Zmi
1259         vpclmulqdq      \$0x00,$HK,$T1,$Tred
1260          vmovdqu        0x20-0x40($Htbl),$HK
1261          vpxor          $Ii,$T2,$T2
1262
1263           vmovdqu       0x60($inp),$Ij          # I[6]
1264          vpclmulqdq     \$0x00,$Hkey,$Ii,$Xlo
1265         vpxor           $Zlo,$Xi,$Xi            # collect result
1266           vpshufb       $bswap,$Ij,$Ij
1267          vpclmulqdq     \$0x11,$Hkey,$Ii,$Xhi
1268         vxorps          $Zhi,$Xo,$Xo
1269           vmovdqu       0x10-0x40($Htbl),$Hkey  # $Hkey^2
1270          vpunpckhqdq    $Ij,$Ij,$T1
1271          vpclmulqdq     \$0x00,$HK,  $T2,$Xmi
1272         vpxor           $Zmi,$Tred,$Tred
1273          vxorps         $Ij,$T1,$T1
1274
1275           vmovdqu       0x50($inp),$Ii          # I[5]
1276         vpxor           $Xi,$Tred,$Tred         # aggregated Karatsuba post-processing
1277          vpclmulqdq     \$0x00,$Hkey,$Ij,$Zlo
1278         vpxor           $Xo,$Tred,$Tred
1279         vpslldq         \$8,$Tred,$T2
1280          vpxor          $Xlo,$Zlo,$Zlo
1281          vpclmulqdq     \$0x11,$Hkey,$Ij,$Zhi
1282         vpsrldq         \$8,$Tred,$Tred
1283         vpxor           $T2, $Xi, $Xi
1284           vmovdqu       0x30-0x40($Htbl),$Hkey  # $Hkey^3
1285           vpshufb       $bswap,$Ii,$Ii
1286         vxorps          $Tred,$Xo, $Xo
1287          vpxor          $Xhi,$Zhi,$Zhi
1288          vpunpckhqdq    $Ii,$Ii,$T2
1289          vpclmulqdq     \$0x10,$HK,  $T1,$Zmi
1290           vmovdqu       0x50-0x40($Htbl),$HK
1291          vpxor          $Ii,$T2,$T2
1292          vpxor          $Xmi,$Zmi,$Zmi
1293
1294           vmovdqu       0x40($inp),$Ij          # I[4]
1295         vpalignr        \$8,$Xi,$Xi,$Tred       # 1st phase
1296          vpclmulqdq     \$0x00,$Hkey,$Ii,$Xlo
1297           vpshufb       $bswap,$Ij,$Ij
1298          vpxor          $Zlo,$Xlo,$Xlo
1299          vpclmulqdq     \$0x11,$Hkey,$Ii,$Xhi
1300           vmovdqu       0x40-0x40($Htbl),$Hkey  # $Hkey^4
1301          vpunpckhqdq    $Ij,$Ij,$T1
1302          vpxor          $Zhi,$Xhi,$Xhi
1303          vpclmulqdq     \$0x00,$HK,  $T2,$Xmi
1304          vxorps         $Ij,$T1,$T1
1305          vpxor          $Zmi,$Xmi,$Xmi
1306
1307           vmovdqu       0x30($inp),$Ii          # I[3]
1308         vpclmulqdq      \$0x10,(%r10),$Xi,$Xi
1309          vpclmulqdq     \$0x00,$Hkey,$Ij,$Zlo
1310           vpshufb       $bswap,$Ii,$Ii
1311          vpxor          $Xlo,$Zlo,$Zlo
1312          vpclmulqdq     \$0x11,$Hkey,$Ij,$Zhi
1313           vmovdqu       0x60-0x40($Htbl),$Hkey  # $Hkey^5
1314          vpunpckhqdq    $Ii,$Ii,$T2
1315          vpxor          $Xhi,$Zhi,$Zhi
1316          vpclmulqdq     \$0x10,$HK,  $T1,$Zmi
1317           vmovdqu       0x80-0x40($Htbl),$HK
1318          vpxor          $Ii,$T2,$T2
1319          vpxor          $Xmi,$Zmi,$Zmi
1320
1321           vmovdqu       0x20($inp),$Ij          # I[2]
1322          vpclmulqdq     \$0x00,$Hkey,$Ii,$Xlo
1323           vpshufb       $bswap,$Ij,$Ij
1324          vpxor          $Zlo,$Xlo,$Xlo
1325          vpclmulqdq     \$0x11,$Hkey,$Ii,$Xhi
1326           vmovdqu       0x70-0x40($Htbl),$Hkey  # $Hkey^6
1327          vpunpckhqdq    $Ij,$Ij,$T1
1328          vpxor          $Zhi,$Xhi,$Xhi
1329          vpclmulqdq     \$0x00,$HK,  $T2,$Xmi
1330          vpxor          $Ij,$T1,$T1
1331          vpxor          $Zmi,$Xmi,$Xmi
1332         vxorps          $Tred,$Xi,$Xi
1333
1334           vmovdqu       0x10($inp),$Ii          # I[1]
1335         vpalignr        \$8,$Xi,$Xi,$Tred       # 2nd phase
1336          vpclmulqdq     \$0x00,$Hkey,$Ij,$Zlo
1337           vpshufb       $bswap,$Ii,$Ii
1338          vpxor          $Xlo,$Zlo,$Zlo
1339          vpclmulqdq     \$0x11,$Hkey,$Ij,$Zhi
1340           vmovdqu       0x90-0x40($Htbl),$Hkey  # $Hkey^7
1341         vpclmulqdq      \$0x10,(%r10),$Xi,$Xi
1342         vxorps          $Xo,$Tred,$Tred
1343          vpunpckhqdq    $Ii,$Ii,$T2
1344          vpxor          $Xhi,$Zhi,$Zhi
1345          vpclmulqdq     \$0x10,$HK,  $T1,$Zmi
1346           vmovdqu       0xb0-0x40($Htbl),$HK
1347          vpxor          $Ii,$T2,$T2
1348          vpxor          $Xmi,$Zmi,$Zmi
1349
1350           vmovdqu       ($inp),$Ij              # I[0]
1351          vpclmulqdq     \$0x00,$Hkey,$Ii,$Xlo
1352           vpshufb       $bswap,$Ij,$Ij
1353          vpclmulqdq     \$0x11,$Hkey,$Ii,$Xhi
1354           vmovdqu       0xa0-0x40($Htbl),$Hkey  # $Hkey^8
1355         vpxor           $Tred,$Ij,$Ij
1356          vpclmulqdq     \$0x10,$HK,  $T2,$Xmi
1357         vpxor           $Xi,$Ij,$Ij             # accumulate $Xi
1358
1359         lea             0x80($inp),$inp
1360         sub             \$0x80,$len
1361         jnc             .Loop8x_avx
1362
1363         add             \$0x80,$len
1364         jmp             .Ltail_no_xor_avx
1365
1366 .align  32
1367 .Lshort_avx:
1368         vmovdqu         -0x10($inp,$len),$Ii    # very last word
1369         lea             ($inp,$len),$inp
1370         vmovdqu         0x00-0x40($Htbl),$Hkey  # $Hkey^1
1371         vmovdqu         0x20-0x40($Htbl),$HK
1372         vpshufb         $bswap,$Ii,$Ij
1373
1374         vmovdqa         $Xlo,$Zlo               # subtle way to zero $Zlo,
1375         vmovdqa         $Xhi,$Zhi               # $Zhi and
1376         vmovdqa         $Xmi,$Zmi               # $Zmi
1377         sub             \$0x10,$len
1378         jz              .Ltail_avx
1379
1380         vpunpckhqdq     $Ij,$Ij,$T1
1381         vpxor           $Xlo,$Zlo,$Zlo
1382         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1383         vpxor           $Ij,$T1,$T1
1384          vmovdqu        -0x20($inp),$Ii
1385         vpxor           $Xhi,$Zhi,$Zhi
1386         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1387         vmovdqu         0x10-0x40($Htbl),$Hkey  # $Hkey^2
1388          vpshufb        $bswap,$Ii,$Ij
1389         vpxor           $Xmi,$Zmi,$Zmi
1390         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1391         vpsrldq         \$8,$HK,$HK
1392         sub             \$0x10,$len
1393         jz              .Ltail_avx
1394
1395         vpunpckhqdq     $Ij,$Ij,$T1
1396         vpxor           $Xlo,$Zlo,$Zlo
1397         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1398         vpxor           $Ij,$T1,$T1
1399          vmovdqu        -0x30($inp),$Ii
1400         vpxor           $Xhi,$Zhi,$Zhi
1401         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1402         vmovdqu         0x30-0x40($Htbl),$Hkey  # $Hkey^3
1403          vpshufb        $bswap,$Ii,$Ij
1404         vpxor           $Xmi,$Zmi,$Zmi
1405         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1406         vmovdqu         0x50-0x40($Htbl),$HK
1407         sub             \$0x10,$len
1408         jz              .Ltail_avx
1409
1410         vpunpckhqdq     $Ij,$Ij,$T1
1411         vpxor           $Xlo,$Zlo,$Zlo
1412         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1413         vpxor           $Ij,$T1,$T1
1414          vmovdqu        -0x40($inp),$Ii
1415         vpxor           $Xhi,$Zhi,$Zhi
1416         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1417         vmovdqu         0x40-0x40($Htbl),$Hkey  # $Hkey^4
1418          vpshufb        $bswap,$Ii,$Ij
1419         vpxor           $Xmi,$Zmi,$Zmi
1420         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1421         vpsrldq         \$8,$HK,$HK
1422         sub             \$0x10,$len
1423         jz              .Ltail_avx
1424
1425         vpunpckhqdq     $Ij,$Ij,$T1
1426         vpxor           $Xlo,$Zlo,$Zlo
1427         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1428         vpxor           $Ij,$T1,$T1
1429          vmovdqu        -0x50($inp),$Ii
1430         vpxor           $Xhi,$Zhi,$Zhi
1431         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1432         vmovdqu         0x60-0x40($Htbl),$Hkey  # $Hkey^5
1433          vpshufb        $bswap,$Ii,$Ij
1434         vpxor           $Xmi,$Zmi,$Zmi
1435         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1436         vmovdqu         0x80-0x40($Htbl),$HK
1437         sub             \$0x10,$len
1438         jz              .Ltail_avx
1439
1440         vpunpckhqdq     $Ij,$Ij,$T1
1441         vpxor           $Xlo,$Zlo,$Zlo
1442         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1443         vpxor           $Ij,$T1,$T1
1444          vmovdqu        -0x60($inp),$Ii
1445         vpxor           $Xhi,$Zhi,$Zhi
1446         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1447         vmovdqu         0x70-0x40($Htbl),$Hkey  # $Hkey^6
1448          vpshufb        $bswap,$Ii,$Ij
1449         vpxor           $Xmi,$Zmi,$Zmi
1450         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1451         vpsrldq         \$8,$HK,$HK
1452         sub             \$0x10,$len
1453         jz              .Ltail_avx
1454
1455         vpunpckhqdq     $Ij,$Ij,$T1
1456         vpxor           $Xlo,$Zlo,$Zlo
1457         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1458         vpxor           $Ij,$T1,$T1
1459          vmovdqu        -0x70($inp),$Ii
1460         vpxor           $Xhi,$Zhi,$Zhi
1461         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1462         vmovdqu         0x90-0x40($Htbl),$Hkey  # $Hkey^7
1463          vpshufb        $bswap,$Ii,$Ij
1464         vpxor           $Xmi,$Zmi,$Zmi
1465         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1466         vmovq           0xb8-0x40($Htbl),$HK
1467         sub             \$0x10,$len
1468         jmp             .Ltail_avx
1469
1470 .align  32
1471 .Ltail_avx:
1472         vpxor           $Xi,$Ij,$Ij             # accumulate $Xi
1473 .Ltail_no_xor_avx:
1474         vpunpckhqdq     $Ij,$Ij,$T1
1475         vpxor           $Xlo,$Zlo,$Zlo
1476         vpclmulqdq      \$0x00,$Hkey,$Ij,$Xlo
1477         vpxor           $Ij,$T1,$T1
1478         vpxor           $Xhi,$Zhi,$Zhi
1479         vpclmulqdq      \$0x11,$Hkey,$Ij,$Xhi
1480         vpxor           $Xmi,$Zmi,$Zmi
1481         vpclmulqdq      \$0x00,$HK,$T1,$Xmi
1482
1483         vmovdqu         (%r10),$Tred
1484
1485         vpxor           $Xlo,$Zlo,$Xi
1486         vpxor           $Xhi,$Zhi,$Xo
1487         vpxor           $Xmi,$Zmi,$Zmi
1488
1489         vpxor           $Xi, $Zmi,$Zmi          # aggregated Karatsuba post-processing
1490         vpxor           $Xo, $Zmi,$Zmi
1491         vpslldq         \$8, $Zmi,$T2
1492         vpsrldq         \$8, $Zmi,$Zmi
1493         vpxor           $T2, $Xi, $Xi
1494         vpxor           $Zmi,$Xo, $Xo
1495
1496         vpclmulqdq      \$0x10,$Tred,$Xi,$T2    # 1st phase
1497         vpalignr        \$8,$Xi,$Xi,$Xi
1498         vpxor           $T2,$Xi,$Xi
1499
1500         vpclmulqdq      \$0x10,$Tred,$Xi,$T2    # 2nd phase
1501         vpalignr        \$8,$Xi,$Xi,$Xi
1502         vpxor           $Xo,$Xi,$Xi
1503         vpxor           $T2,$Xi,$Xi
1504
1505         cmp             \$0,$len
1506         jne             .Lshort_avx
1507
1508         vpshufb         $bswap,$Xi,$Xi
1509         vmovdqu         $Xi,($Xip)
1510         vzeroupper
1511 ___
1512 $code.=<<___ if ($win64);
1513         movaps  (%rsp),%xmm6
1514         movaps  0x10(%rsp),%xmm7
1515         movaps  0x20(%rsp),%xmm8
1516         movaps  0x30(%rsp),%xmm9
1517         movaps  0x40(%rsp),%xmm10
1518         movaps  0x50(%rsp),%xmm11
1519         movaps  0x60(%rsp),%xmm12
1520         movaps  0x70(%rsp),%xmm13
1521         movaps  0x80(%rsp),%xmm14
1522         movaps  0x90(%rsp),%xmm15
1523         lea     0xa8(%rsp),%rsp
1524 .LSEH_end_gcm_ghash_avx:
1525 ___
1526 $code.=<<___;
1527         ret
1528 .size   gcm_ghash_avx,.-gcm_ghash_avx
1529 ___
1530 } else {
1531 $code.=<<___;
1532         jmp     .L_ghash_clmul
1533 .size   gcm_ghash_avx,.-gcm_ghash_avx
1534 ___
1535 }
1536 \f
1537 $code.=<<___;
1538 .align  64
1539 .Lbswap_mask:
1540         .byte   15,14,13,12,11,10,9,8,7,6,5,4,3,2,1,0
1541 .L0x1c2_polynomial:
1542         .byte   1,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0xc2
1543 .L7_mask:
1544         .long   7,0,7,0
1545 .L7_mask_poly:
1546         .long   7,0,`0xE1<<1`,0
1547 .align  64
1548 .type   .Lrem_4bit,\@object
1549 .Lrem_4bit:
1550         .long   0,`0x0000<<16`,0,`0x1C20<<16`,0,`0x3840<<16`,0,`0x2460<<16`
1551         .long   0,`0x7080<<16`,0,`0x6CA0<<16`,0,`0x48C0<<16`,0,`0x54E0<<16`
1552         .long   0,`0xE100<<16`,0,`0xFD20<<16`,0,`0xD940<<16`,0,`0xC560<<16`
1553         .long   0,`0x9180<<16`,0,`0x8DA0<<16`,0,`0xA9C0<<16`,0,`0xB5E0<<16`
1554 .type   .Lrem_8bit,\@object
1555 .Lrem_8bit:
1556         .value  0x0000,0x01C2,0x0384,0x0246,0x0708,0x06CA,0x048C,0x054E
1557         .value  0x0E10,0x0FD2,0x0D94,0x0C56,0x0918,0x08DA,0x0A9C,0x0B5E
1558         .value  0x1C20,0x1DE2,0x1FA4,0x1E66,0x1B28,0x1AEA,0x18AC,0x196E
1559         .value  0x1230,0x13F2,0x11B4,0x1076,0x1538,0x14FA,0x16BC,0x177E
1560         .value  0x3840,0x3982,0x3BC4,0x3A06,0x3F48,0x3E8A,0x3CCC,0x3D0E
1561         .value  0x3650,0x3792,0x35D4,0x3416,0x3158,0x309A,0x32DC,0x331E
1562         .value  0x2460,0x25A2,0x27E4,0x2626,0x2368,0x22AA,0x20EC,0x212E
1563         .value  0x2A70,0x2BB2,0x29F4,0x2836,0x2D78,0x2CBA,0x2EFC,0x2F3E
1564         .value  0x7080,0x7142,0x7304,0x72C6,0x7788,0x764A,0x740C,0x75CE
1565         .value  0x7E90,0x7F52,0x7D14,0x7CD6,0x7998,0x785A,0x7A1C,0x7BDE
1566         .value  0x6CA0,0x6D62,0x6F24,0x6EE6,0x6BA8,0x6A6A,0x682C,0x69EE
1567         .value  0x62B0,0x6372,0x6134,0x60F6,0x65B8,0x647A,0x663C,0x67FE
1568         .value  0x48C0,0x4902,0x4B44,0x4A86,0x4FC8,0x4E0A,0x4C4C,0x4D8E
1569         .value  0x46D0,0x4712,0x4554,0x4496,0x41D8,0x401A,0x425C,0x439E
1570         .value  0x54E0,0x5522,0x5764,0x56A6,0x53E8,0x522A,0x506C,0x51AE
1571         .value  0x5AF0,0x5B32,0x5974,0x58B6,0x5DF8,0x5C3A,0x5E7C,0x5FBE
1572         .value  0xE100,0xE0C2,0xE284,0xE346,0xE608,0xE7CA,0xE58C,0xE44E
1573         .value  0xEF10,0xEED2,0xEC94,0xED56,0xE818,0xE9DA,0xEB9C,0xEA5E
1574         .value  0xFD20,0xFCE2,0xFEA4,0xFF66,0xFA28,0xFBEA,0xF9AC,0xF86E
1575         .value  0xF330,0xF2F2,0xF0B4,0xF176,0xF438,0xF5FA,0xF7BC,0xF67E
1576         .value  0xD940,0xD882,0xDAC4,0xDB06,0xDE48,0xDF8A,0xDDCC,0xDC0E
1577         .value  0xD750,0xD692,0xD4D4,0xD516,0xD058,0xD19A,0xD3DC,0xD21E
1578         .value  0xC560,0xC4A2,0xC6E4,0xC726,0xC268,0xC3AA,0xC1EC,0xC02E
1579         .value  0xCB70,0xCAB2,0xC8F4,0xC936,0xCC78,0xCDBA,0xCFFC,0xCE3E
1580         .value  0x9180,0x9042,0x9204,0x93C6,0x9688,0x974A,0x950C,0x94CE
1581         .value  0x9F90,0x9E52,0x9C14,0x9DD6,0x9898,0x995A,0x9B1C,0x9ADE
1582         .value  0x8DA0,0x8C62,0x8E24,0x8FE6,0x8AA8,0x8B6A,0x892C,0x88EE
1583         .value  0x83B0,0x8272,0x8034,0x81F6,0x84B8,0x857A,0x873C,0x86FE
1584         .value  0xA9C0,0xA802,0xAA44,0xAB86,0xAEC8,0xAF0A,0xAD4C,0xAC8E
1585         .value  0xA7D0,0xA612,0xA454,0xA596,0xA0D8,0xA11A,0xA35C,0xA29E
1586         .value  0xB5E0,0xB422,0xB664,0xB7A6,0xB2E8,0xB32A,0xB16C,0xB0AE
1587         .value  0xBBF0,0xBA32,0xB874,0xB9B6,0xBCF8,0xBD3A,0xBF7C,0xBEBE
1588
1589 .asciz  "GHASH for x86_64, CRYPTOGAMS by <appro\@openssl.org>"
1590 .align  64
1591 ___
1592 \f
1593 # EXCEPTION_DISPOSITION handler (EXCEPTION_RECORD *rec,ULONG64 frame,
1594 #               CONTEXT *context,DISPATCHER_CONTEXT *disp)
1595 if ($win64) {
1596 $rec="%rcx";
1597 $frame="%rdx";
1598 $context="%r8";
1599 $disp="%r9";
1600
1601 $code.=<<___;
1602 .extern __imp_RtlVirtualUnwind
1603 .type   se_handler,\@abi-omnipotent
1604 .align  16
1605 se_handler:
1606         push    %rsi
1607         push    %rdi
1608         push    %rbx
1609         push    %rbp
1610         push    %r12
1611         push    %r13
1612         push    %r14
1613         push    %r15
1614         pushfq
1615         sub     \$64,%rsp
1616
1617         mov     120($context),%rax      # pull context->Rax
1618         mov     248($context),%rbx      # pull context->Rip
1619
1620         mov     8($disp),%rsi           # disp->ImageBase
1621         mov     56($disp),%r11          # disp->HandlerData
1622
1623         mov     0(%r11),%r10d           # HandlerData[0]
1624         lea     (%rsi,%r10),%r10        # prologue label
1625         cmp     %r10,%rbx               # context->Rip<prologue label
1626         jb      .Lin_prologue
1627
1628         mov     152($context),%rax      # pull context->Rsp
1629
1630         mov     4(%r11),%r10d           # HandlerData[1]
1631         lea     (%rsi,%r10),%r10        # epilogue label
1632         cmp     %r10,%rbx               # context->Rip>=epilogue label
1633         jae     .Lin_prologue
1634
1635         lea     24(%rax),%rax           # adjust "rsp"
1636
1637         mov     -8(%rax),%rbx
1638         mov     -16(%rax),%rbp
1639         mov     -24(%rax),%r12
1640         mov     %rbx,144($context)      # restore context->Rbx
1641         mov     %rbp,160($context)      # restore context->Rbp
1642         mov     %r12,216($context)      # restore context->R12
1643
1644 .Lin_prologue:
1645         mov     8(%rax),%rdi
1646         mov     16(%rax),%rsi
1647         mov     %rax,152($context)      # restore context->Rsp
1648         mov     %rsi,168($context)      # restore context->Rsi
1649         mov     %rdi,176($context)      # restore context->Rdi
1650
1651         mov     40($disp),%rdi          # disp->ContextRecord
1652         mov     $context,%rsi           # context
1653         mov     \$`1232/8`,%ecx         # sizeof(CONTEXT)
1654         .long   0xa548f3fc              # cld; rep movsq
1655
1656         mov     $disp,%rsi
1657         xor     %rcx,%rcx               # arg1, UNW_FLAG_NHANDLER
1658         mov     8(%rsi),%rdx            # arg2, disp->ImageBase
1659         mov     0(%rsi),%r8             # arg3, disp->ControlPc
1660         mov     16(%rsi),%r9            # arg4, disp->FunctionEntry
1661         mov     40(%rsi),%r10           # disp->ContextRecord
1662         lea     56(%rsi),%r11           # &disp->HandlerData
1663         lea     24(%rsi),%r12           # &disp->EstablisherFrame
1664         mov     %r10,32(%rsp)           # arg5
1665         mov     %r11,40(%rsp)           # arg6
1666         mov     %r12,48(%rsp)           # arg7
1667         mov     %rcx,56(%rsp)           # arg8, (NULL)
1668         call    *__imp_RtlVirtualUnwind(%rip)
1669
1670         mov     \$1,%eax                # ExceptionContinueSearch
1671         add     \$64,%rsp
1672         popfq
1673         pop     %r15
1674         pop     %r14
1675         pop     %r13
1676         pop     %r12
1677         pop     %rbp
1678         pop     %rbx
1679         pop     %rdi
1680         pop     %rsi
1681         ret
1682 .size   se_handler,.-se_handler
1683
1684 .section        .pdata
1685 .align  4
1686         .rva    .LSEH_begin_gcm_gmult_4bit
1687         .rva    .LSEH_end_gcm_gmult_4bit
1688         .rva    .LSEH_info_gcm_gmult_4bit
1689
1690         .rva    .LSEH_begin_gcm_ghash_4bit
1691         .rva    .LSEH_end_gcm_ghash_4bit
1692         .rva    .LSEH_info_gcm_ghash_4bit
1693
1694         .rva    .LSEH_begin_gcm_init_clmul
1695         .rva    .LSEH_end_gcm_init_clmul
1696         .rva    .LSEH_info_gcm_init_clmul
1697
1698         .rva    .LSEH_begin_gcm_ghash_clmul
1699         .rva    .LSEH_end_gcm_ghash_clmul
1700         .rva    .LSEH_info_gcm_ghash_clmul
1701 ___
1702 $code.=<<___    if ($avx);
1703         .rva    .LSEH_begin_gcm_init_avx
1704         .rva    .LSEH_end_gcm_init_avx
1705         .rva    .LSEH_info_gcm_init_clmul
1706
1707         .rva    .LSEH_begin_gcm_ghash_avx
1708         .rva    .LSEH_end_gcm_ghash_avx
1709         .rva    .LSEH_info_gcm_ghash_clmul
1710 ___
1711 $code.=<<___;
1712 .section        .xdata
1713 .align  8
1714 .LSEH_info_gcm_gmult_4bit:
1715         .byte   9,0,0,0
1716         .rva    se_handler
1717         .rva    .Lgmult_prologue,.Lgmult_epilogue       # HandlerData
1718 .LSEH_info_gcm_ghash_4bit:
1719         .byte   9,0,0,0
1720         .rva    se_handler
1721         .rva    .Lghash_prologue,.Lghash_epilogue       # HandlerData
1722 .LSEH_info_gcm_init_clmul:
1723         .byte   0x01,0x08,0x03,0x00
1724         .byte   0x08,0x68,0x00,0x00     #movaps 0x00(rsp),xmm6
1725         .byte   0x04,0x22,0x00,0x00     #sub    rsp,0x18
1726 .LSEH_info_gcm_ghash_clmul:
1727         .byte   0x01,0x33,0x16,0x00
1728         .byte   0x33,0xf8,0x09,0x00     #movaps 0x90(rsp),xmm15
1729         .byte   0x2e,0xe8,0x08,0x00     #movaps 0x80(rsp),xmm14
1730         .byte   0x29,0xd8,0x07,0x00     #movaps 0x70(rsp),xmm13
1731         .byte   0x24,0xc8,0x06,0x00     #movaps 0x60(rsp),xmm12
1732         .byte   0x1f,0xb8,0x05,0x00     #movaps 0x50(rsp),xmm11
1733         .byte   0x1a,0xa8,0x04,0x00     #movaps 0x40(rsp),xmm10
1734         .byte   0x15,0x98,0x03,0x00     #movaps 0x30(rsp),xmm9
1735         .byte   0x10,0x88,0x02,0x00     #movaps 0x20(rsp),xmm8
1736         .byte   0x0c,0x78,0x01,0x00     #movaps 0x10(rsp),xmm7
1737         .byte   0x08,0x68,0x00,0x00     #movaps 0x00(rsp),xmm6
1738         .byte   0x04,0x01,0x15,0x00     #sub    rsp,0xa8
1739 ___
1740 }
1741 \f
1742 $code =~ s/\`([^\`]*)\`/eval($1)/gem;
1743
1744 print $code;
1745
1746 close STDOUT;