2 # Copyright 2010-2016 The OpenSSL Project Authors. All Rights Reserved.
4 # Licensed under the OpenSSL license (the "License"). You may not use
5 # this file except in compliance with the License. You can obtain a copy
6 # in the file LICENSE in the source distribution or at
7 # https://www.openssl.org/source/license.html
10 # ====================================================================
11 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
12 # project. The module is, however, dual licensed under OpenSSL and
13 # CRYPTOGAMS licenses depending on where you obtain it. For further
14 # details see http://www.openssl.org/~appro/cryptogams/.
15 # ====================================================================
19 # The module implements "4-bit" GCM GHASH function and underlying
20 # single multiplication operation in GF(2^128). "4-bit" means that it
21 # uses 256 bytes per-key table [+128 bytes shared table]. Performance
22 # results are for streamed GHASH subroutine on UltraSPARC pre-Tx CPU
23 # and are expressed in cycles per processed byte, less is better:
25 # gcc 3.3.x cc 5.2 this assembler
27 # 32-bit build 81.4 43.3 12.6 (+546%/+244%)
28 # 64-bit build 20.2 21.2 12.6 (+60%/+68%)
30 # Here is data collected on UltraSPARC T1 system running Linux:
32 # gcc 4.4.1 this assembler
34 # 32-bit build 566 50 (+1000%)
35 # 64-bit build 56 50 (+12%)
37 # I don't quite understand why difference between 32-bit and 64-bit
38 # compiler-generated code is so big. Compilers *were* instructed to
39 # generate code for UltraSPARC and should have used 64-bit registers
40 # for Z vector (see C code) even in 32-bit build... Oh well, it only
41 # means more impressive improvement coefficients for this assembler
42 # module;-) Loops are aggressively modulo-scheduled in respect to
43 # references to input data and Z.hi updates to achieve 12 cycles
44 # timing. To anchor to something else, sha1-sparcv9.pl spends 11.6
45 # cycles to process one byte on UltraSPARC pre-Tx CPU and ~24 on T1.
49 # Add VIS3 lookup-table-free implementation using polynomial
50 # multiplication xmulx[hi] and extended addition addxc[cc]
51 # instructions. 4.52/7.63x improvement on T3/T4 or in absolute
52 # terms 7.90/2.14 cycles per byte. On T4 multi-process benchmark
53 # saturates at ~15.5x single-process result on 8-core processor,
54 # or ~20.5GBps per 2.85GHz socket.
57 open STDOUT,">$output";
62 $Zhi="%o0"; # 64-bit values
69 $nhi="%l0"; # small values and pointers
78 $Xi="%i0"; # input argument block
84 #include "sparc_arch.h"
87 .register %g2,#scratch
88 .register %g3,#scratch
91 .section ".text",#alloc,#execinstr
95 .long `0x0000<<16`,0,`0x1C20<<16`,0,`0x3840<<16`,0,`0x2460<<16`,0
96 .long `0x7080<<16`,0,`0x6CA0<<16`,0,`0x48C0<<16`,0,`0x54E0<<16`,0
97 .long `0xE100<<16`,0,`0xFD20<<16`,0,`0xD940<<16`,0,`0xC560<<16`,0
98 .long `0x9180<<16`,0,`0x8DA0<<16`,0,`0xA9C0<<16`,0,`0xB5E0<<16`,0
99 .type rem_4bit,#object
100 .size rem_4bit,(.-rem_4bit)
102 .globl gcm_ghash_4bit
113 add %o7,rem_4bit-1b,$rem_4bit
120 ldx [$Htblo+$nlo],$Zlo
121 ldx [$Htbl+$nlo],$Zhi
125 ldx [$Htblo+$nhi],$Tlo
127 ldx [$Htbl+$nhi],$Thi
129 ldx [$rem_4bit+$remi],$rem
145 ldx [$Htblo+$nlo],$Tlo
148 ldx [$Htbl+$nlo],$Thi
151 ldx [$rem_4bit+$remi],$rem
154 ldub [$inp+$cnt],$nlo
161 ldx [$Htblo+$nhi],$Tlo
164 ldx [$Htbl+$nhi],$Thi
166 ldx [$rem_4bit+$remi],$rem
179 ldx [$Htblo+$nlo],$Tlo
182 ldx [$Htbl+$nlo],$Thi
185 ldx [$rem_4bit+$remi],$rem
194 be,pn SIZE_T_CC,.Ldone
197 ldx [$Htblo+$nhi],$Tlo
200 ldx [$Htbl+$nhi],$Thi
202 ldx [$rem_4bit+$remi],$rem
218 ldx [$Htblo+$nhi],$Tlo
221 ldx [$Htbl+$nhi],$Thi
223 ldx [$rem_4bit+$remi],$rem
235 .type gcm_ghash_4bit,#function
236 .size gcm_ghash_4bit,(.-gcm_ghash_4bit)
243 .globl gcm_gmult_4bit
251 add %o7,rem_4bit-1b,$rem_4bit
256 ldx [$Htblo+$nlo],$Zlo
257 ldx [$Htbl+$nlo],$Zhi
261 ldx [$Htblo+$nhi],$Tlo
263 ldx [$Htbl+$nhi],$Thi
265 ldx [$rem_4bit+$remi],$rem
280 ldx [$Htblo+$nlo],$Tlo
283 ldx [$Htbl+$nlo],$Thi
286 ldx [$rem_4bit+$remi],$rem
295 ldx [$Htblo+$nhi],$Tlo
298 ldx [$Htbl+$nhi],$Thi
300 ldx [$rem_4bit+$remi],$rem
312 ldx [$Htblo+$nlo],$Tlo
315 ldx [$Htbl+$nlo],$Thi
318 ldx [$rem_4bit+$remi],$rem
326 ldx [$Htblo+$nhi],$Tlo
329 ldx [$Htbl+$nhi],$Thi
331 ldx [$rem_4bit+$remi],$rem
343 .type gcm_gmult_4bit,#function
344 .size gcm_gmult_4bit,(.-gcm_gmult_4bit)
348 # Straightforward 128x128-bit multiplication using Karatsuba algorithm
349 # followed by pair of 64-bit reductions [with a shortcut in first one,
350 # which allowed to break dependency between reductions and remove one
351 # multiplication from critical path]. While it might be suboptimal
352 # with regard to sheer number of multiplications, other methods [such
353 # as aggregate reduction] would require more 64-bit registers, which
354 # we don't have in 32-bit application context.
356 ($Xip,$Htable,$inp,$len)=map("%i$_",(0..3));
358 ($Hhl,$Hlo,$Hhi,$Xlo,$Xhi,$xE1,$sqr, $C0,$C1,$C2,$C3,$V)=
359 (map("%o$_",(0..5,7)),map("%g$_",(1..5)));
361 ($shl,$shr)=map("%l$_",(0..7));
363 # For details regarding "twisted H" see ghash-x86.pl.
375 srax $Hhi,63,$C0 ! broadcast carry
376 addcc $Hlo,$Hlo,$Hlo ! H<<=1
382 stx $Hlo,[%i0+8] ! save twisted H
385 sethi %hi(0xA0406080),$V
386 sethi %hi(0x20C0E000),%l0
387 or $V,%lo(0xA0406080),$V
388 or %l0,%lo(0x20C0E000),%l0
390 or %l0,$V,$V ! (0xE0·i)&0xff=0xA040608020C0E000
395 .type gcm_init_vis3,#function
396 .size gcm_init_vis3,.-gcm_init_vis3
398 .globl gcm_gmult_vis3
403 ldx [$Xip+8],$Xlo ! load Xi
405 ldx [$Htable+8],$Hlo ! load twisted H
409 sllx %l7,57,$xE1 ! 57 is not a typo
410 ldx [$Htable+16],$V ! (0xE0·i)&0xff=0xA040608020C0E000
412 xor $Hhi,$Hlo,$Hhl ! Karatsuba pre-processing
414 xor $Xlo,$Xhi,$C2 ! Karatsuba pre-processing
416 xmulxhi $Xlo,$Hlo,$Xlo
418 xmulxhi $Xhi,$Hhi,$C3
422 srlx $V,$sqr,$sqr ! ·0xE0 [implicit &(7<<3)]
424 sllx $sqr,57,$sqr ! ($C0·0xE1)<<1<<56 [implicit &0x7f]
426 xor $C0,$C1,$C1 ! Karatsuba post-processing
428 xor $sqr,$Xlo,$Xlo ! real destination is $C1
434 xmulxhi $C0,$xE1,$Xlo ! ·0xE1<<1<<56
444 stx $C2,[$Xip+8] ! save Xi
449 .type gcm_gmult_vis3,#function
450 .size gcm_gmult_vis3,.-gcm_gmult_vis3
452 .globl gcm_ghash_vis3
457 srln $len,0,$len ! needed on v8+, "nop" on v9
459 ldx [$Xip+8],$C2 ! load Xi
461 ldx [$Htable+8],$Hlo ! load twisted H
465 sllx %l7,57,$xE1 ! 57 is not a typo
466 ldx [$Htable+16],$V ! (0xE0·i)&0xff=0xA040608020C0E000
471 prefetch [$inp+63], 20
474 xor $Hhi,$Hlo,$Hhl ! Karatsuba pre-processing
480 ldx [$inp+16],$C1 ! align data
492 prefetch [$inp+63], 20
495 xor $Xlo,$Xhi,$C2 ! Karatsuba pre-processing
497 xmulxhi $Xlo,$Hlo,$Xlo
499 xmulxhi $Xhi,$Hhi,$C3
503 srlx $V,$sqr,$sqr ! ·0xE0 [implicit &(7<<3)]
505 sllx $sqr,57,$sqr ! ($C0·0xE1)<<1<<56 [implicit &0x7f]
507 xor $C0,$C1,$C1 ! Karatsuba post-processing
509 xor $sqr,$Xlo,$Xlo ! real destination is $C1
515 xmulxhi $C0,$xE1,$Xlo ! ·0xE1<<1<<56
526 stx $C2,[$Xip+8] ! save Xi
531 .type gcm_ghash_vis3,#function
532 .size gcm_ghash_vis3,.-gcm_ghash_vis3
536 .asciz "GHASH for SPARCv9/VIS3, CRYPTOGAMS by <appro\@openssl.org>"
541 # Purpose of these subroutines is to explicitly encode VIS instructions,
542 # so that one can compile the module without having to specify VIS
543 # extensions on compiler command line, e.g. -xarch=v9 vs. -xarch=v9a.
544 # Idea is to reserve for option to produce "universal" binary and let
545 # programmer detect if current CPU is VIS capable at run-time.
547 my ($mnemonic,$rs1,$rs2,$rd)=@_;
548 my %bias = ( "g" => 0, "o" => 8, "l" => 16, "i" => 24 );
550 my %visopf = ( "addxc" => 0x011,
553 "xmulxhi" => 0x116 );
555 $ref = "$mnemonic\t$rs1,$rs2,$rd";
557 if ($opf=$visopf{$mnemonic}) {
558 foreach ($rs1,$rs2,$rd) {
559 return $ref if (!/%([goli])([0-9])/);
563 return sprintf ".word\t0x%08x !%s",
564 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2,
571 foreach (split("\n",$code)) {
572 s/\`([^\`]*)\`/eval $1/ge;
574 s/\b(xmulx[hi]*|addxc[c]{0,2})\s+(%[goli][0-7]),\s*(%[goli][0-7]),\s*(%[goli][0-7])/