2 # Copyright 2010-2016 The OpenSSL Project Authors. All Rights Reserved.
4 # Licensed under the Apache License 2.0 (the "License"). You may not use
5 # this file except in compliance with the License. You can obtain a copy
6 # in the file LICENSE in the source distribution or at
7 # https://www.openssl.org/source/license.html
10 # ====================================================================
11 # Written by Andy Polyakov <appro@openssl.org> for the OpenSSL
12 # project. The module is, however, dual licensed under OpenSSL and
13 # CRYPTOGAMS licenses depending on where you obtain it. For further
14 # details see http://www.openssl.org/~appro/cryptogams/.
15 # ====================================================================
19 # The module implements "4-bit" GCM GHASH function and underlying
20 # single multiplication operation in GF(2^128). "4-bit" means that it
21 # uses 256 bytes per-key table [+128 bytes shared table]. Performance
22 # results are for streamed GHASH subroutine on UltraSPARC pre-Tx CPU
23 # and are expressed in cycles per processed byte, less is better:
25 # gcc 3.3.x cc 5.2 this assembler
27 # 32-bit build 81.4 43.3 12.6 (+546%/+244%)
28 # 64-bit build 20.2 21.2 12.6 (+60%/+68%)
30 # Here is data collected on UltraSPARC T1 system running Linux:
32 # gcc 4.4.1 this assembler
34 # 32-bit build 566 50 (+1000%)
35 # 64-bit build 56 50 (+12%)
37 # I don't quite understand why difference between 32-bit and 64-bit
38 # compiler-generated code is so big. Compilers *were* instructed to
39 # generate code for UltraSPARC and should have used 64-bit registers
40 # for Z vector (see C code) even in 32-bit build... Oh well, it only
41 # means more impressive improvement coefficients for this assembler
42 # module;-) Loops are aggressively modulo-scheduled in respect to
43 # references to input data and Z.hi updates to achieve 12 cycles
44 # timing. To anchor to something else, sha1-sparcv9.pl spends 11.6
45 # cycles to process one byte on UltraSPARC pre-Tx CPU and ~24 on T1.
49 # Add VIS3 lookup-table-free implementation using polynomial
50 # multiplication xmulx[hi] and extended addition addxc[cc]
51 # instructions. 4.52/7.63x improvement on T3/T4 or in absolute
52 # terms 7.90/2.14 cycles per byte. On T4 multi-process benchmark
53 # saturates at ~15.5x single-process result on 8-core processor,
54 # or ~20.5GBps per 2.85GHz socket.
56 $output=pop and open STDOUT,">$output";
61 $Zhi="%o0"; # 64-bit values
68 $nhi="%l0"; # small values and pointers
77 $Xi="%i0"; # input argument block
83 #include "sparc_arch.h"
86 .register %g2,#scratch
87 .register %g3,#scratch
90 .section ".text",#alloc,#execinstr
94 .long `0x0000<<16`,0,`0x1C20<<16`,0,`0x3840<<16`,0,`0x2460<<16`,0
95 .long `0x7080<<16`,0,`0x6CA0<<16`,0,`0x48C0<<16`,0,`0x54E0<<16`,0
96 .long `0xE100<<16`,0,`0xFD20<<16`,0,`0xD940<<16`,0,`0xC560<<16`,0
97 .long `0x9180<<16`,0,`0x8DA0<<16`,0,`0xA9C0<<16`,0,`0xB5E0<<16`,0
98 .type rem_4bit,#object
99 .size rem_4bit,(.-rem_4bit)
101 .globl gcm_ghash_4bit
112 add %o7,rem_4bit-1b,$rem_4bit
119 ldx [$Htblo+$nlo],$Zlo
120 ldx [$Htbl+$nlo],$Zhi
124 ldx [$Htblo+$nhi],$Tlo
126 ldx [$Htbl+$nhi],$Thi
128 ldx [$rem_4bit+$remi],$rem
144 ldx [$Htblo+$nlo],$Tlo
147 ldx [$Htbl+$nlo],$Thi
150 ldx [$rem_4bit+$remi],$rem
153 ldub [$inp+$cnt],$nlo
160 ldx [$Htblo+$nhi],$Tlo
163 ldx [$Htbl+$nhi],$Thi
165 ldx [$rem_4bit+$remi],$rem
178 ldx [$Htblo+$nlo],$Tlo
181 ldx [$Htbl+$nlo],$Thi
184 ldx [$rem_4bit+$remi],$rem
193 be,pn SIZE_T_CC,.Ldone
196 ldx [$Htblo+$nhi],$Tlo
199 ldx [$Htbl+$nhi],$Thi
201 ldx [$rem_4bit+$remi],$rem
217 ldx [$Htblo+$nhi],$Tlo
220 ldx [$Htbl+$nhi],$Thi
222 ldx [$rem_4bit+$remi],$rem
234 .type gcm_ghash_4bit,#function
235 .size gcm_ghash_4bit,(.-gcm_ghash_4bit)
242 .globl gcm_gmult_4bit
250 add %o7,rem_4bit-1b,$rem_4bit
255 ldx [$Htblo+$nlo],$Zlo
256 ldx [$Htbl+$nlo],$Zhi
260 ldx [$Htblo+$nhi],$Tlo
262 ldx [$Htbl+$nhi],$Thi
264 ldx [$rem_4bit+$remi],$rem
279 ldx [$Htblo+$nlo],$Tlo
282 ldx [$Htbl+$nlo],$Thi
285 ldx [$rem_4bit+$remi],$rem
294 ldx [$Htblo+$nhi],$Tlo
297 ldx [$Htbl+$nhi],$Thi
299 ldx [$rem_4bit+$remi],$rem
311 ldx [$Htblo+$nlo],$Tlo
314 ldx [$Htbl+$nlo],$Thi
317 ldx [$rem_4bit+$remi],$rem
325 ldx [$Htblo+$nhi],$Tlo
328 ldx [$Htbl+$nhi],$Thi
330 ldx [$rem_4bit+$remi],$rem
342 .type gcm_gmult_4bit,#function
343 .size gcm_gmult_4bit,(.-gcm_gmult_4bit)
347 # Straightforward 128x128-bit multiplication using Karatsuba algorithm
348 # followed by pair of 64-bit reductions [with a shortcut in first one,
349 # which allowed to break dependency between reductions and remove one
350 # multiplication from critical path]. While it might be suboptimal
351 # with regard to sheer number of multiplications, other methods [such
352 # as aggregate reduction] would require more 64-bit registers, which
353 # we don't have in 32-bit application context.
355 ($Xip,$Htable,$inp,$len)=map("%i$_",(0..3));
357 ($Hhl,$Hlo,$Hhi,$Xlo,$Xhi,$xE1,$sqr, $C0,$C1,$C2,$C3,$V)=
358 (map("%o$_",(0..5,7)),map("%g$_",(1..5)));
360 ($shl,$shr)=map("%l$_",(0..7));
362 # For details regarding "twisted H" see ghash-x86.pl.
374 srax $Hhi,63,$C0 ! broadcast carry
375 addcc $Hlo,$Hlo,$Hlo ! H<<=1
381 stx $Hlo,[%i0+8] ! save twisted H
384 sethi %hi(0xA0406080),$V
385 sethi %hi(0x20C0E000),%l0
386 or $V,%lo(0xA0406080),$V
387 or %l0,%lo(0x20C0E000),%l0
389 or %l0,$V,$V ! (0xE0·i)&0xff=0xA040608020C0E000
394 .type gcm_init_vis3,#function
395 .size gcm_init_vis3,.-gcm_init_vis3
397 .globl gcm_gmult_vis3
402 ldx [$Xip+8],$Xlo ! load Xi
404 ldx [$Htable+8],$Hlo ! load twisted H
408 sllx %l7,57,$xE1 ! 57 is not a typo
409 ldx [$Htable+16],$V ! (0xE0·i)&0xff=0xA040608020C0E000
411 xor $Hhi,$Hlo,$Hhl ! Karatsuba pre-processing
413 xor $Xlo,$Xhi,$C2 ! Karatsuba pre-processing
415 xmulxhi $Xlo,$Hlo,$Xlo
417 xmulxhi $Xhi,$Hhi,$C3
421 srlx $V,$sqr,$sqr ! ·0xE0 [implicit &(7<<3)]
423 sllx $sqr,57,$sqr ! ($C0·0xE1)<<1<<56 [implicit &0x7f]
425 xor $C0,$C1,$C1 ! Karatsuba post-processing
427 xor $sqr,$Xlo,$Xlo ! real destination is $C1
433 xmulxhi $C0,$xE1,$Xlo ! ·0xE1<<1<<56
443 stx $C2,[$Xip+8] ! save Xi
448 .type gcm_gmult_vis3,#function
449 .size gcm_gmult_vis3,.-gcm_gmult_vis3
451 .globl gcm_ghash_vis3
456 srln $len,0,$len ! needed on v8+, "nop" on v9
458 ldx [$Xip+8],$C2 ! load Xi
460 ldx [$Htable+8],$Hlo ! load twisted H
464 sllx %l7,57,$xE1 ! 57 is not a typo
465 ldx [$Htable+16],$V ! (0xE0·i)&0xff=0xA040608020C0E000
470 prefetch [$inp+63], 20
473 xor $Hhi,$Hlo,$Hhl ! Karatsuba pre-processing
479 ldx [$inp+16],$C1 ! align data
491 prefetch [$inp+63], 20
494 xor $Xlo,$Xhi,$C2 ! Karatsuba pre-processing
496 xmulxhi $Xlo,$Hlo,$Xlo
498 xmulxhi $Xhi,$Hhi,$C3
502 srlx $V,$sqr,$sqr ! ·0xE0 [implicit &(7<<3)]
504 sllx $sqr,57,$sqr ! ($C0·0xE1)<<1<<56 [implicit &0x7f]
506 xor $C0,$C1,$C1 ! Karatsuba post-processing
508 xor $sqr,$Xlo,$Xlo ! real destination is $C1
514 xmulxhi $C0,$xE1,$Xlo ! ·0xE1<<1<<56
525 stx $C2,[$Xip+8] ! save Xi
530 .type gcm_ghash_vis3,#function
531 .size gcm_ghash_vis3,.-gcm_ghash_vis3
535 .asciz "GHASH for SPARCv9/VIS3, CRYPTOGAMS by <appro\@openssl.org>"
540 # Purpose of these subroutines is to explicitly encode VIS instructions,
541 # so that one can compile the module without having to specify VIS
542 # extensions on compiler command line, e.g. -xarch=v9 vs. -xarch=v9a.
543 # Idea is to reserve for option to produce "universal" binary and let
544 # programmer detect if current CPU is VIS capable at run-time.
546 my ($mnemonic,$rs1,$rs2,$rd)=@_;
547 my %bias = ( "g" => 0, "o" => 8, "l" => 16, "i" => 24 );
549 my %visopf = ( "addxc" => 0x011,
552 "xmulxhi" => 0x116 );
554 $ref = "$mnemonic\t$rs1,$rs2,$rd";
556 if ($opf=$visopf{$mnemonic}) {
557 foreach ($rs1,$rs2,$rd) {
558 return $ref if (!/%([goli])([0-9])/);
562 return sprintf ".word\t0x%08x !%s",
563 0x81b00000|$rd<<25|$rs1<<14|$opf<<5|$rs2,
570 foreach (split("\n",$code)) {
571 s/\`([^\`]*)\`/eval $1/ge;
573 s/\b(xmulx[hi]*|addxc[c]{0,2})\s+(%[goli][0-7]),\s*(%[goli][0-7]),\s*(%[goli][0-7])/
580 close STDOUT or die "error closing STDOUT";